Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20120256275
    Abstract: A manufacturing method of a metal gate structure includes first providing a substrate having a dummy gate formed thereon. The dummy gate includes a high-K gate dielectric layer, a bottom barrier layer, a first etch stop layer and a sacrificial layer sequentially and upwardly stacked on the substrate. Then, the sacrificial layer is removed to form a gate trench with the first etch stop layer exposed on the bottom of the gate trench. After forming the gate trench, a first work function metal layer is formed in the gate trench.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Inventors: Hsin-Fu Huang, Chi-Mao Hsu, Kun-Hsien Lin, Chin-Fu Lin, Tzung-Ying Lee, Min-Chuan Tsai, Yi-Wei Chen, Bin-Siang Tsai, Ted Ming-Lang Guo, Ger-Pin Lin, Yu-Ling Liang, Yen-Ming Chen, Tsai-Yu Wen
  • METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20120248507
    Abstract: A manufacturing method of a metal gate structure includes providing a substrate having at least a first metal oxide layer formed thereon, and transferring the surface of the first metal oxide layer into a second metal oxide layer. The first metal oxide layer includes a metal oxide (M1Ox) of a first metal (M1) and the second metal oxide layer includes a metal oxide ((M1M2Oy) of the first metal and a second metal (M2).
    Type: Application
    Filed: March 28, 2011
    Publication date: October 4, 2012
    Inventors: Chih-Chien Liu, Chun-Yuan Wu, Chin-Fu Lin, Teng-Chun Tsai, Chin-Cheng Chien
  • ADC CALIBRATION
    Publication number: 20120249351
    Abstract: An analog-to-digital converter (ADC) including a plurality of comparators connected to the ADC. The ADC further includes a first pair of terminals and a second pair of terminals connected to each of the plurality of comparators. The ADC further includes a first pair of switches coupled to each of the first pair of terminals and a second pair of switches coupled to each of the second pair of terminals, where the first and second pair of switches are configured to alternate a corresponding comparator between normal operation and a calibration configuration. Comparators other than the corresponding comparator are configured for normal operation if the corresponding comparator is configured to be calibrated.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 4, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fang-Shi Jordan LAI, Kuo-Ming WANG, Hsu-Feng HSUEH, Cheng Yen WENG, Yung-Fu LIN
  • Method and apparatus for analog to digital conversion
    Patent number: 8279102
    Abstract: An analog to digital converter (ADC) comprises an input node having a variable analog input voltage, first and second switched capacitor circuits, an operational amplifier, and a control circuit. The first switched capacitor circuit has first and second capacitors and is coupled to the input node, and the second switched capacitor circuit has third and fourth capacitors and is coupled to the input node. The operational amplifier is configured to be conditionally coupled to only one of the first and second switched capacitor circuits at a time and configured to conditionally provide feedback to the switched capacitor circuits via an output node. The control circuit is coupled to the first and second switched capacitor circuits for conditional coupling to the operational amplifier.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: October 2, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan Lai, Hsu-Feng Hsueh, Cheng Yen Weng, Yung-Fu Lin, Manoj M. Mhala, Tao Wen Chung, Chin-Hao Chang
  • Background calibration of analog-to-digital converters
    Patent number: 8279097
    Abstract: A method of operating an analog-to-digital converter (ADC) includes providing the ADC including a plurality of stages, each including an operational amplifier, and a first capacitor and a second capacitor including a first input end and a second input end, respectively. Each of the first capacitor and the second capacitor includes an additional end connected to a same input of the operational amplifier. The method further includes performing a plurality of signal conversions. Each of the signal conversions includes, in an amplifying phase of one of the plurality of stages, applying a first voltage to the first input end of the one of the plurality of stages, randomly selecting a second voltage from two different voltages; and applying the second voltage to the second input end of the one of the plurality of stages.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: October 2, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fang-Shi Jordan Lai, Kuo-Ming Wang, Hsu-Feng Hsueh, Cheng Yen Weng, Yung-Fu Lin
  • FIN FIELD-EFFECT TRANSISTOR STRUCTURE AND MANUFACTURING PROCESS THEREOF
    Publication number: 20120241863
    Abstract: A fin field-effect transistor structure includes a substrate, a fin channel and a high-k metal gate. The high-k metal gate is formed on the substrate and the fin channel. A process of manufacturing the fin field-effect transistor structure includes the following steps. Firstly, a polysilicon pseudo gate structure is formed on the substrate and a surface of the fin channel. By using the polysilicon pseudo gate structure as a mask, a source/drain region is formed in the fin channel. After the polysilicon pseudo gate structure is removed, a high-k dielectric layer and a metal gate layer are successively formed. Afterwards, a planarization process is performed on the substrate having the metal gate layer until the first dielectric layer is exposed, so that a high-k metal gate is produced.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 27, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Teng-Chun TSAI, Chun-Yuan Wu, Chin-Fu Lin, Chih-Chien Liu, Chin-Cheng Chien
  • Window Covering
    Publication number: 20120227910
    Abstract: A window covering includes a liner positioned adjacent to the rear side of window covering material. The liner is attached to at least one of the window covering material and a first rail to define at least one cavity between the window covering material and the liner. At least one ladder is attached to the liner and positioned in the at least one cavity. The at least one ladder has vertically spaced rungs. At least one lift cord extends from the first rail to a position adjacent to the bottom edge of the window covering material. The at least one cord passes adjacent to the at least one ladder such that the at least one lift cord passes over the rungs of the at least one ladder such that the at least one lift cord alternates from passing behind and in front of successive rungs.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 13, 2012
    Applicant: WHOLE SPACE INDUSTRIES LTD
    Inventor: Tzong-Fu Lin
  • COLOR FILTER ARRAY AND MANUFACTURING METHOD THEREOF
    Publication number: 20120224276
    Abstract: A color filter array and a manufacturing method thereof are provided. The color filter array includes a substrate, a light shielding structure and a plurality of color filter patterns. The substrate has a plurality of unit regions. The light shielding structure is disposed on the substrate and has a plurality of openings exposing the unit regions, and at least one sidewall of each of the openings of the light shielding structure has a plurality recess patterns. The color filter patterns are respectively disposed in the openings of the light shielding structure.
    Type: Application
    Filed: September 25, 2011
    Publication date: September 6, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Cheng-Yue Lin, Shiuan-Fu Lin, Ching-Yu Yang, Sheng-Kuo Chou, Cheng-Hsien Liao
  • TOUCH MODULE AND TOUCH DISPLAY USING THE SAME
    Publication number: 20120223915
    Abstract: A touch module disposed on a display panel of a touch display is provided. The touch module includes a glass substrate, a polymer layer, a lateral-side light sensor and a vertical-side light sensor. The polymer layer is transparent and flexible. The lateral-side and the vertical-side light sensors are sandwiched between the glass substrate and the polymer layer, and disposed on a lateral edge and a vertical edge of the substrate. A transparent transmission layer is formed between the glass substrate and the polymer layer. When a touch event is triggered on the polymer layer, the backlight corresponding to the touch point is transformed into a side-oriented backlight, which is transmitted in the transparent transmission layer and captured by the lateral-side and the vertical-side light sensor.
    Type: Application
    Filed: June 20, 2011
    Publication date: September 6, 2012
    Applicant: Quanta Computer Inc.
    Inventors: Chien-Hung LIN, Hsi-Fu LIN
  • METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20120223397
    Abstract: A method for manufacturing a metal gate structure includes providing a substrate having a high-K gate dielectric layer and a bottom barrier layer sequentially formed thereon, forming a work function metal layer on the substrate, and performing an anneal treatment to the work function metal layer in-situ.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 6, 2012
    Inventors: Chan-Lon Yang, Chi-Mao Hsu, Chun-Yuan Wu, Tzyy-Ming Cheng, Shih-Fang Tzou, Chin-Fu Lin, Hsin-Fu Huang, Min-Chuan Tsai
  • ELECTRICAL CONNECTOR HAVING METAL SHELL WITH RETAINING TAB FOR ENGAGING WITH INSULATIVE HOUSING
    Publication number: 20120225595
    Abstract: An electrical connector includes an insulative housing (1), a plurality of contact terminals (2) arranged in an X direction and a metallic shell (3) covering an outside of the insulative housing thereby forming a mating space (151) with a mating opening (152). The metallic shell (3) has a main plate (30) and a plurality of T-shaped retaining tabs (31) extending into mating space from the main plate and engaging with an inner surface (111) of the side wall (11).
    Type: Application
    Filed: February 28, 2012
    Publication date: September 6, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: HSIU-YUAN HSU, CHUN-FU LIN
  • ADC Calibration Apparatus
    Publication number: 20120212359
    Abstract: An analog-to-digital (ADC) calibration apparatus comprises a calibration buffer, a comparator and a digital calibration block. Each reference voltage is sent to a track-and-hold amplifier as well as the calibration buffer. The comparator compares the output from the track-and-hold amplifier and the output from the calibration buffer and generates a binary number. Based upon a successive approximation method, the digital calibration block finds a correction voltage for ADC offset and nonlinearity compensation. By employing the ADC calibration apparatus, each reference voltage can be calibrated and the corresponding correction voltage can be used to modify the reference voltage during an ADC process.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 23, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fang-Shi Jordan Lai, Chin-Hao Chang, Manoj M. Mhala, Hsu-Feng Hsueh, Yung-Fu Lin, Cheng Yen Weng
  • Laminate for Use in a Fuel Cell and Method for Making the Same
    Publication number: 20120214081
    Abstract: Disclosed is a laminate for use in a fuel cell. The laminate includes at least two field plates and a bonding layer. Each of the flow field plates includes a plate and channels defined therein. The bonding layer is made in the form of an annular strip and sandwiched between the flow field plates, around the channels.
    Type: Application
    Filed: February 21, 2011
    Publication date: August 23, 2012
    Applicant: ATOMIC ENERGY COUNCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Chien-Kuo Liu, Kin-Fu Lin, Kun-Chao Tsai
  • SWITCHED-CAPACITOR CIRCUIT WITH LOW SIGNAL DEGRADATION
    Publication number: 20120212361
    Abstract: A switched-capacitor circuit is disclosed. The switched-capacitor circuit includes a comparator having a first and second input, a first and second sampling capacitor, and a first and second switching circuitry. The first switching circuitry charges the first and second sampling capacitor with an input signal. The second switching circuitry selectively couples the first sampling capacitor with a reference voltage and selectively couples the second sampling capacitor and the first and second input of the comparator to a common voltage. The comparator performs a compare of the input signals against the reference voltage, and outputs a signal.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fang-Shi Lai, Manoj M. Mhala, Yung-Fu Lin, Hsu-Feng Hsueh, Chin-Hao Chang, Cheng Yen Weng
  • Loop Cord Tension Device for Window Coverings
    Publication number: 20120211180
    Abstract: A loop cord tension device assembly includes a housing, a spring member connected to the housing, a loop cord retention member connected to the housing, and a locking body connected to the spring member. The loop cord retention member has a channel sized and configured to receive a portion of a looped cord. The locking body is moveable from a locked position to an unlocked position. The portion of the loop cord received within the channel of the loop cord retention member is not rotatable when the locking body is in the locked position and the portion of the loop cord received within the channel of the loop cord retention member is rotatable when the locking body is in the unlocked position. The loop cord tension device assembly may be connected to the looped cord of a window covering and mounted to a structure to improve child safety.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: WHOLE SPACE INDUSTRIES LTD
    Inventor: Tzong-Fu Lin
  • CLEANING PROCESS FOR SEMICONDUCTOR DEVICE FABRICATION
    Publication number: 20120202156
    Abstract: A method of making an integrated circuit is provided. The method includes providing a substrate having a photosensitive layer. The photosensitive layer is exposed to a radiation beam. The exposed photosensitive layer is developed in a first chamber. In the first chamber, a cleaning process is performed on the developed photosensitive layer. The cleaning process includes using a rinse solution including at least one of ozone, hydrogen peroxide, and oxalic acid.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 9, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Ming-Hsi Yeh, Yu-Fu Lin, Shao-Yen Ku, Chi-Ming Yang, Chin-Hsiang Lin
  • Optical fiber connector configured with separated seat member and lens member
    Patent number: 8235601
    Abstract: An optical fiber connector includes a lens member integrally forming pairs of lens at a front face thereof, a seat member assembly retained on a rear face of the lens member and fiber cables. The seat member defines slim grooves aligned with the lens and the fiber cables are received and retained in the slim grooves.
    Type: Grant
    Filed: October 31, 2010
    Date of Patent: August 7, 2012
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Yen-Chih Chang, Wen-Yi Hsieh, Chien-Hung Lee, Chun-Fu Lin, Chi-Nan Liao
  • METHOD FOR FABRICATING FIN FIELD EFFECT TRANSISTOR
    Publication number: 20120196410
    Abstract: A method for fabricating a fin-FET, wherein the method comprises several steps as follows: A substrate is first provided, and a silicon fin is then formed in the substrate. Next a dielectric layer is formed on the silicon fin and the substrate. A poly silicon layer is subsequently formed on the dielectric layer, and the poly silicon layer is then planarized. Subsequently, a poly silicon gate is formed and a portion of the silicon fin is exposed by patterning the planarized poly silicon layer. A source and a drain are separately formed on two opposite sides of the exposed silicon fin adjacent to the poly silicon gate.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 2, 2012
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Teng-Chun TSAI, Chun-Yuan Wu, Chih-Chien Liu, Chin-Fu Lin, Chin-Cheng Chien
  • Method and apparatus for calibrating sigma-delta modulator
    Patent number: 8228221
    Abstract: In a method of converting an analog signal to digital format, an analog input signal is received and processed using sigma-delta modulation to provide a first digital signal that represents the analog input signal in digital format and to provide a second digital signal that represents a first error introduced during the sigma-delta modulation. A second error that is error introduced during the sigma-delta modulation is estimated. A pre-correction signal is determined based on the first and second digital signals. A difference between the estimated second error and the pre-correction digital signal is determined to provide a digital output signal representing the analog input signal in digital format. An error correction element operable to adjust the digital output signal based on the analog input signal, the digital output signal, and the second digital signal is controlled.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: July 24, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan Lai, Hsu-Feng Hsueh, Cheng Yen Weng, Yung-Fu Lin, Manoj M. Mhala, Tao Wen Chung, Chin-Hao Chang
  • Roman shade having spacer cords with loops
    Patent number: D666043
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: August 28, 2012
    Assignee: Whole Space Industries Ltd
    Inventor: Tzong-Fu Lin