Abstract: A power system for an electric vehicle, an electric vehicle and a motor controller for an electric vehicle are provided. The power system includes: a power battery (10); a charge-discharge socket (20); a three-level bidirectional DC-AC module (30); a motor control switch (40); a charge-discharge control module (50) having a first terminal connected with an AC terminal of the three-level bidirectional DC-AC module (30) and a second terminal connected with the charge-discharge socket (20); and a control module (60) connected with a third terminal of the charge-discharge control module (50) and a third terminal of the motor control switch (40), and configured to control the charge-discharge control module (50) and the motor control switch (40) according to a current working mode of the power system.

Abstract: A semiconductor device is disclosed, which includes: a substrate having a plurality of connecting pads; a semiconductor component having a plurality of bonding pads formed on a surface thereof and corresponding to the connecting pads and a UBM layer formed on the bonding pads; a plurality of conductive elements each having a first conductive portion and a second conductive portion sequentially formed on the UBM layer, wherein the second conductive portion is less in width than the first conductive portion; and a plurality of solder balls formed between the second conductive portions and the connecting pads for connecting the semiconductor component and the substrate, thereby preventing solder bridging from occurring between the adjacent conductive elements and reducing stresses between the conductive elements and the UBM layer.

Abstract: A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided.

Abstract: In one exemplary embodiment, a wireless communication apparatus transmitting data by using several sub-carriers. The wireless communication apparatus comprises a signal modulator, a signal processor, a storage, a computing processor, and a transmitter. The signal modulator generates a modulated signal in time domain based on the data. The signal processor perfoiliis signal processing on the modulated signal, and comprises a window module and a filter module. The window module performs windowing operation on the modulated signal to generate a window-operated signal. The filter module performs filtering operation on the window-operated signal to generate a transmitting signal in time domain. The computing processor perfoiiiis operations of setting up the window module and the filter module according to a window characteristic function and a filter characteristic function. The transmitter transmits the transmitting signal.

Abstract: A method of fabricating a semiconductor package is provided, including: disposing a plurality of semiconductor elements on a carrier through an adhesive layer in a manner that a portion of the carrier is exposed from the adhesive layer; forming an encapsulant to encapsulate the semiconductor elements; removing the adhesive layer and the carrier to expose the semiconductor elements; and forming a build-up structure on the semiconductor elements. Since the adhesive layer is divided into a plurality of separated portions that will not affect each other due to expansion or contraction when temperature changes, the present invention prevents positional deviations of the semiconductor elements during a molding process, thereby increasing the alignment accuracy.

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

Abstract: The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Abstract: A method of performing uplink channel estimation and a base station using the same are provided. The method is applicable to serve at least two UE equipments (UEs) in a communication system. The at least two UEs are located in at least two beam sectors respectively. The base station comprises a plurality of antennas. The method includes: determining whether multipath of the at least two UEs passing through a same beam sector; assigning a first and a second training sequence for a first UE and a second UE of the at least two UEs respectively; receiving a reference signal, wherein the reference signal is transmitted by the first UE and the second UE according to the first and the second training sequence; and performing channel estimation for the first UE and the second UE according to the reference signal, the first and the second training sequence.

Abstract: In some aspects, methods of forming a metal selenide or metal telluride thin film are provided. According to some methods, a metal selenide or metal telluride thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase selenium or tellurium reactant. In some aspects, methods of forming three-dimensional architectures on a substrate surface are provided. In some embodiments, the method includes forming a metal selenide or metal telluride interface layer between a substrate and a dielectric. In some embodiments, the method includes forming a metal selenide or metal telluride dielectric layer between a substrate and a conductive layer.

Abstract: The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Abstract: A method of performing uplink channel estimation and a base station using the same are provided. The method is applicable to serve at least two UE equipments (UEs) in a communication system. The at least two UEs are located in at least two beam sectors respectively. The base station comprises a plurality of antennas. The method includes: determining whether multipath of the at least two UEs passing through a same beam sector; assigning a first and a second training sequence for a first UE and a second UE of the at least two UEs respectively; receiving a reference signal, wherein the reference signal is transmitted by the first UE and the second UE according to the first and the second training sequence; and performing channel estimation for the first UE and the second UE according to the reference signal, the first and the second training sequence.

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract: A charging system for an electric vehicle and an electric vehicle are provided. The charging system comprises: a power battery; a charge-discharge socket; a bidirectional DC/DC module having a first DC terminal connected with a first terminal of the power battery and a second DC terminal connected with a second terminal of the power battery; a bidirectional DC/AC module having a first DC terminal connected with the second terminal of the power battery and a second DC terminal connected with the first terminal of the power battery; a charge-discharge control module having a first terminal connected with the AC terminal of the bidirectional DC/AC module and a second terminal connected with the charge-discharge socket; and a controller module connected with the charge-discharge control module, and configured to control the charge-discharge control module according to a current operation mode of the charging system.

Abstract: Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.

Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.

Abstract: In some aspects, methods of forming a metal chalcogenide thin film are provided. According to some methods, a metal chalcogenide thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase chalcogen reactant. In some aspects, methods of forming three-dimensional structure on a substrate surface are provided. In some embodiments, the method includes forming a metal chalcogenide dielectric layer between a substrate and a conductive layer. In some embodiments the method includes forming an MIS-type contact structure including a metal chalcogenide dielectric layer.

Abstract: A mixed mode compensation circuit for a power converter generate a digital signal according to a reference signal and a feedback signal which is related to the output voltage of the power converter, convert the digital signal into a first analog signal, offset the first analog signal with a variable offset value to generate a second analog signal, and filter out high-frequency components of the second analog signal to generate a third analog signal for stable output voltage of the power converter. The mixed mode compensation does not require large capacitors, and thus the circuit can be integrated into an integrated circuit.

Abstract: The present invention provides a flyback power converter with a programmable output and a control circuit and a control method thereof. The flyback power converter converts an input voltage to a programmable output voltage according to a setting signal, wherein the programmable output voltage switches between different levels. The flyback power converter includes: a transformer circuit, a power switch circuit, a current sense circuit, an opto-coupler circuit, and a control circuit. The control circuit adaptively adjusts an operation signal according to a level of the programmable output voltage, to maintain a same or relatively higher operation frequency of the operation signal when the programmable output voltage switches to a relatively lower level, so as to maintain a phase margin while supplying the same output current.

Abstract: A semiconductor package is disclosed, which includes: a packaging substrate; a semiconductor element disposed on the packaging substrate in a flip-chip manner; a stopping portion formed at edges of the semiconductor element; an insulating layer formed on an active surface of the semiconductor element and the stopping portion; and an encapsulant formed between the packaging substrate and the insulating layer. The insulating layer has a recessed portion formed on the stopping portion and facing the packaging substrate such that during a reliability test, the recessed portion can prevent delamination occurring between the insulating layer and the stopping portion from extending to the active surface of the semiconductor element.

Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.