Abstract: A method performed by a slave device to obtain a host memory address includes: inquiring a description list to obtain information of an allocated memory of a host; dividing the allocated memory into N storage spaces according to the information; using a first memory space of the N storage spaces to store a first level look-up table indicating physical addresses of the N storage spaces; dividing the first memory space into M storage spaces; storing a second level look-up table in the slave device to indicate physical addresses of the M storage spaces; inquiring the second level look-up table according to a logical address and obtaining a first index indicating a physical address of one of the M storage spaces; and inquiring the first level look-up table according to the first index and obtaining a second index indicating a physical address of one of the N storage spaces.

Abstract: Provided is a platinum complex having a structure represented by formula (I): wherein A1 to A3 each independently represent a 5-membered or 6-membered unsaturated ring, A3 is optionally formed between A1 and A2; X1, X2, and X3 each independently represent carbon or nitrogen; R1 represents hydrogen, substituted or unsubstituted C1-C6 alkyl, —CF2H, —CFH2, substituted or unsubstituted C6-C12 aryl or —CmF2m+1, m is an integer of 1 to 5; R2 and R3 each independently represent hydrogen, C1-C12 alkyl, substituted or unsubstituted C1-C6 alkoxyl, substituted or unsubstituted C6-C12 aryl, or —CnF2n+1, n is an integer of 0 to 3; p and q each independently represent an integer of 1 to 2; and when p or q is equal to 2, two R2's or R3's may join to form a C3-C8 aromatic or nitrogen-containing heteroaromatic ring.

Abstract: A composite button is configured to be inserted into a button hole of a protective case for contacting a trigger button of an electronic device. The protective case includes a casing peripheral wall having an inner peripheral surface. The composite button includes a soft material layer having a contact surface suitable for contacting the trigger button, and a soft material connecting surface opposite to said contact surface. A hard material layer is connected to said soft material connecting surface. At least one of the soft and hard material layers has a peripheral flange suitable for abutting against the inner peripheral surface of the casing peripheral wall.

Abstract: An RRAM structure includes a substrate. The substrate is divided into a memory cell region and a logic device region. A metal plug is disposed within the memory cell region. An RRAM is disposed on and contacts the metal plug. The RRAM includes a top electrode, a variable resistive layer, and a bottom electrode. The variable resistive layer is disposed between the top electrode and the bottom electrode. The variable resistive layer includes a first bottom surface. The bottom electrode includes a first top surface. The first bottom surface and the first top surface are coplanar. The first bottom surface only overlaps and contacts part of the first top surface.

Abstract: A touch display device includes a cover plate, a touch module, a frame, and a display module. The touch module is disposed on the cover plate and defines thereon a sensing zone and a peripheral zone connecting each other. The frame is located at a side of the touch module away from the cover plate and includes a plurality of fixing members and an accommodating trough. The fixing members cross the peripheral zone to be fixed to the cover plate. At least one part of the touch module in the peripheral zone is attached to a side of the frame away from the cover plate. The display module is disposed in the accommodating trough and over the sensing zone.

Abstract: A semiconductor device includes a substrate having a memory region and a logic region. A first dielectric layer is disposed on the substrate. A first conductive structure and a second conductive structure are formed in the first dielectric layer and respectively on the memory region and the logic region of the substrate. A memory cell is disposed on the first dielectric layer and directly contacts a top surface of the first conductive structure. A first cap layer is formed on the first dielectric layer and continuously covers a top surface and a sidewall of the memory cell and a top surface of the second conductive structure. A second dielectric layer is formed on the first cap. A third conductive structure is formed in the second dielectric layer and penetrates through the first cap layer to contacts the memory cell.

Abstract: A particles capturing system includes a venturi filter device, a cyclone filter device, a plurality of first nozzles and air to flow through the system. The venturi filter device has an air intake portion, a neck portion and an air outlet portion. The cyclone filter device, disposed in the air outlet portion, has an entrance and an exit. The plurality of first nozzles, disposed inside the venturi filter device, have a height greater than that of the the neck portion. When the air flows, the air enters the venturi filter device via an air inlet of the air intake portion, then orderly passes through the neck portion and the plurality of first nozzles, then enters the cyclone filter device via the entrance, and finally leaves the cyclone filter device via the exit, such that particles in the flowing air can be captured.

Abstract: An RRAM structure includes a substrate. The substrate is divided into a memory cell region and a logic device region. A metal plug is disposed within the memory cell region. An RRAM is disposed on and contacts the metal plug. The RRAM includes a top electrode, a variable resistive layer, and a bottom electrode. The variable resistive layer is disposed between the top electrode and the bottom electrode. The variable resistive layer includes a first bottom surface. The bottom electrode includes a first top surface. The first bottom surface and the first top surface are coplanar. The first bottom surface only overlaps and contacts part of the first top surface.

Abstract: A touch display device includes a cover plate, a touch module, a frame, and a display module. The touch module is disposed on the cover plate and defines thereon a sensing zone and a peripheral zone connecting each other. The frame is located at a side of the touch module away from the cover plate and includes a plurality of fixing members and an accommodating trough. The fixing members cross the peripheral zone to be fixed to the cover plate. At least one part of the touch module in the peripheral zone is attached to a side of the frame away from the cover plate. The display module is disposed in the accommodating trough and over the sensing zone.

Abstract: An electrical connector includes an insulating block and multiple terminals arranged along a left-right direction of the insulating block. The insulating block has multiple opening holes along a vertical direction thereof. Each terminal has a fixing portion fixed to the insulating block. The fixing portion has an adjustment portion. The terminals in one row include multiple first ground terminals, multiple second ground terminals and multiple pairs of differential signal terminals, correspondingly arranged along the left-right direction sequentially as: one of the first ground terminals, one of the pairs of differential signal terminals, one of the second ground terminals, another one of the pairs of differential signal terminals, and another one of the first ground terminals. The adjustment portion of each second ground terminal is exposed in the opening hole along the vertical direction, and the adjustment portion of each first ground terminal is not exposed in the opening hole.

Abstract: A memory device structure includes a substrate, a memory stacked structure, and a spacer. The memory stacked structure is formed on the substrate by stacking a first electrode layer, a memory material layer, and a second electrode layer. The memory material layer has a tilted sidewall, or the memory material layer and the first electrode layer have a tilted sidewall. The tilted sidewall is indented with respect to a sidewall of the second electrode layer. The spacer is disposed on the tilted sidewall.

Abstract: The present invention provides a neurological disorders decision support system that can assist an examiner to diagnose an examinee. The neurological disorders decision support system includes a user module, a screening module, an intelligent calculation module and a diagnosis module. The user module sends an inquiry to the examinee, receives a response message from the examinee, and retrieves a physiological characteristic signal of the examinee. The screening module executes a neurological examination application program to indicate to the examinee to obtain physiological characteristic signals. The screening module outputs response messages and physiological characteristic signals for the intelligent calculation module to execute an algorithm to generate an analysis report. The analysis report assists the examiner for diagnosis, and sends a diagnosis notification to the user module through the diagnosis module. The invention also provides a neurological disorders decision support method.

Abstract: An electrical connector electrically connects a first electrical module and a second electrical module, for insertion by the first electrical module along a first direction. The electrical connector includes a first group of terminals arranged in a row along a second direction, having multiple signal terminals and multiple ground terminals and forming at least one first terminal unit and at least one second terminal unit. Each of the terminals has a contact portion, a tail portion, and a middle portion located between the contact portion and the tail portion. In the second direction, the middle portions of the first terminal unit form a first row of the middle portions, and the middle portions of the second terminal unit form a second row of the middle portions. Viewing from the second direction, the first and second rows of the middle portions are staggered, thus improving the crosstalk.

Abstract: A method for forming a resistive random access memory structure. The resistive random access memory structure includes a bottom electrode; a variable resistance layer disposed on the bottom electrode; a top electrode disposed on the variable resistance layer; a protection layer surrounding the variable resistance layer, wherein a top surface of the protection layer and a top surface of the top electrode are coplanar; and an upper interconnect structure disposed on the top electrode, wherein the upper interconnect structure is electrically connected to the top electrode and directly contacts a sidewall of the protection layer.

Abstract: An electrical module is electrically conducted with an electronic component, and includes multiple conductors having a first row of conductors arranged in a left-right direction and an insulating body fixing the first row of conductors. Each conductor has a contact portion in contact with the electronic component. A distance between each two adjacent contact portions of the conductors in the left-right direction is defined as a contact interval. The first row of conductors have at least one pair of signal conductors and at least two ground conductors. Each two adjacent sides of the pair of signal conductors has one ground conductor. The contact interval from one signal conductor to its adjacent ground conductor is defined as a first contact interval. The contact interval from the other signal conductor to its adjacent ground conductor is defined as a second contact interval. The first and second contact intervals are not equal.

Abstract: The present disclosure provides a protection case assembly for a handheld device. The protection case assembly includes a main case and a frame. The main case has an accommodating space configured to accommodate the handheld device, and an opening disposed correspondingly to a lens module of the handheld device. The frame is detachably disposed in the opening, and includes a groove set configured to receive the main case in the opening.

Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.