Abstract: An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.

Abstract: A communication system, a coordinator and a controlling method thereof are provided. The embodiment of the communication system is used for one or more user equipments. The controlling method includes the following steps. A measurement of a plurality of antenna configurations corresponding to the one or more user equipments is controlled to obtain a plurality of performance values. The performance values of the antenna configurations corresponding to the one or more user equipments are recorded. An embodiment of the communication system includes a plurality of Remote Radio Heads, each of which is electronically connected to a plurality of antennas.

Abstract: A communication system and an operating method thereof are provided. The communication system includes at least one user equipment, at least one remote radio head (RRH), a measuring unit, a set determining unit and an antenna selecting unit. The RRH is electrically connected to a plurality of antennas. The measuring unit is for controlling a measurement of a signal strength of the at least one user equipment. The set determining unit is used for selecting one of a plurality of antenna configuration sets according to the signal strength for the at least one user equipment. Each of the antenna configuration sets includes a plurality of antenna configurations. Each of the antenna configurations is composed of P of a plurality of antennas. The antenna selecting unit is used for allocating one of the antenna configurations from the antenna configuration set which is selected for the at least one user equipment.

Abstract: In some embodiments, a semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: An inflation identification connector and an air mattress system having the same is provided. The inflation identification connector is insertable into a connection seat of a gas delivery host. The connection seat has a light detection component coupled to a controller disposed in the gas delivery host. The inflation identification connector includes a body and an identification structure. The detection result of the light detection component depends on the identification structure and thus is conducive to identification. Upon its insertion into the connection seat, the inflation identification connector is identified by the gas delivery host, enhancing ease of use and protecting manual operation against mistakes. The gas delivery host is not only applicable to different types of air mattresses but also conducive to streamlined management of the air mattress system and reduction of management costs and risks.

Abstract: A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.

Abstract: An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.

Abstract: An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.

Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. A capping layer is disposed on the second III-V compound layer.

Abstract: A printed circuit board used as a voice coil includes N board units stacked over one another, each board unit having a first electrically connecting region and a second electrically connecting region, all of the first electrically connecting regions being stacked over one another, all of the second electrically connecting regions being stacked over one another, each board unit having a first circuit structure, a base, and a second circuit structure arranged from top to bottom, in each two adjacent board units, the first electrically connecting region of the second circuit structure of an upper board unit being electrically connected in series with the first electrically connecting region of the first circuit structure of a lower board unit, in each board unit, the first circuit structure being electrically connected in series with the second circuit structure in the second electrically connecting region.

Abstract: A method, system, and computer product for protecting personal privacy of one or more persons in a photo are provided. The method comprises receiving a photo including a face of at least one person, performing face recognition on the at least one person in the photo, determining a cross-relationship value between another person and the at least one person, based on a degree of closeness between said another person and the at least one person, and determining whether to show said another person the face of the at least one person in the photo, based on the cross-relationship value.

Abstract: A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is over the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located at an interface of the first III-V compound layer and the second III-V compound layer. Slanted field plates are in an opening in a dielectric layer over the second III-V compound layer; the gate electrode is disposed in the opening.

Abstract: The present disclosure relates to a flexible circuit board. The flexible circuit board includes a first conductive trace substrate and a third conductive layer, a second conductive post and a third conductive post. The first conductive trace substrate includes a first insulating layer, a first conductive layer and a second conductive layer formed two opposite surfaces of the first insulating layer. The first conductive layer includes a first signal line, the second conductive layer includes a second signal line, and the first signal line is parallel connected with the second signal line.

Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a first III/V semiconductor layer, and a second III/V semiconductor layer arranged over the first III/V semiconductor layer. Source and drain regions are arranged over the second III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.

Abstract: A printed circuit board used as a voice coil includes N board units stacked over one another, each board unit having a first electrically connecting region and a second electrically connecting region, all of the first electrically connecting regions being stacked over one another, all of the second electrically connecting regions being stacked over one another, each board unit having a first circuit structure, a base, and a second circuit structure arranged from top to bottom, in each two adjacent board units, the first electrically connecting region of the second circuit structure of an upper board unit being electrically connected in series with the first electrically connecting region of the first circuit structure of a lower board unit, in each board unit, the first circuit structure being electrically connected in series with the second circuit structure in the second electrically connecting region.

Abstract: A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a AlxGa(1-X)N (AlGaN) layer over the III-V semiconductor compound, a gate over the AlGaN layer, a passivation film over the gate and over a portion of the AlGaN layer, a source structure, and a drain structure on an opposite side of the gate from the source structure, wherein X ranges from 0.1 to 1. The source structure has a source contact portion and an overhead portion. The overhead portion is over at least a portion of the passivation film between the source contact portion and the gate. A distance between the source contact portion and the gate is less than a distance between the gate and the drain structure.

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.