Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, a second insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, and a conductive film provided between the second electrode and the second insulating film, the conductive film not contacting the first insulating film.

Abstract: A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers extending parallel to the substrate, a first gate electrode formed on first side surfaces of the active areas, the first side surfaces being perpendicular to the substrate, a second gate electrode formed on second side surfaces of the active areas, the second side surfaces being perpendicular to the substrate. The layers are patterned in self-alignment with each other, intersections of the active areas and the first gate electrode form a plurality of memory cells, and the plurality of memory cells in an intersecting plane share the first gate electrode.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, semiconductor pillars, first electrode films, a second electrode film, a first insulating film, a second insulating film, and a contact. The semiconductor pillars are provided on the substrate, extend in a first direction crossing an upper surface of the substrate, and are arranged along second and third directions being parallel to the upper surface and crossing each other. The first electrode films extend in the third direction. The second electrode film is provided between the semiconductor pillars and the first electrode films. The first insulating film is provided between the semiconductor pillars and the second electrode film. The second insulating film is provided between the second electrode film and the first electrode films. The contact is provided at a position on the third direction of the semiconductor pillars and is connected to the first electrode films.

Abstract: According to one embodiment, a semiconductor memory device includes first and second semiconductor layers and a first conductive layer. The first and second semiconductor layers extend in a first direction. The second semiconductor layer is stacked above the first semiconductor layer in a second direction intersecting the first direction. The first conductive layer intersects the first and second semiconductor layers and extends in the second direction. The first conductive layer includes first and second portions intersecting the first and second semiconductor layers respectively. A width of the first portion in the first direction is smaller than a width of the second portion in the first direction. A thickness of the first semiconductor layer in the second direction is larger than a thickness of the second semiconductor layer in the second direction.

Abstract: According to one embodiment, a semiconductor memory device includes: a conductive layer including a first portion and a second portion electrically coupled to the first portion; a first contact plug electrically coupled to the first portion; a first semiconductor layer; a first insulating layer between the second portion and the first semiconductor layer, and between the first portion and the first semiconductor layer; a second contact plug coupled to the first semiconductor layer in a region in which the first insulating layer is formed; a first interconnect; and a first memory cell apart from the second portion in the second direction and storing information between the first semiconductor layer and the first interconnect.

Abstract: A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers extending parallel to the substrate, a first gate electrode formed on first side surfaces of the active areas, the first side surfaces being perpendicular to the substrate, a second gate electrode formed on second side surfaces of the active areas, the second side surfaces being perpendicular to the substrate. The layers are patterned in self-alignment with each other, intersections of the active areas and the first gate electrode form a plurality of memory cells, and the plurality of memory cells in an intersecting plane share the first gate electrode.

Abstract: According to one embodiment, a semiconductor memory device includes: first to fifth interconnects; a semiconductor layer having one end located between the fourth interconnect and the fifth interconnect and other end connected to the first interconnect; a memory cell; a conductive layer having one end connected to the second interconnect and other end connected to the semiconductor layer; a first insulating layer provided to extend between the third and fourth interconnects and the semiconductor layer, and between the fifth interconnect and the conductive layer; an oxide semiconductor layer provided to extend between the fourth and fifth interconnects and the first insulating layer; and a second insulating layer provided to extend between the fourth and fifth interconnects and the oxide semiconductor layer.

Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.

Abstract: A semiconductor memory device includes a first block and a second block arranged adjacent to each other in a Y direction. Each of the first and second blocks includes conductive layers extended in an X direction, memory trenches between the conductive layers, memory pillars provided across two conductive layers with a memory trench interposed therebetween, and transistors provided between the memory pillars and the conductive layers. One of the conductive layers provided at an end of the first block in the Y direction is electrically connected to one of the conductive layers provided at an end of the second block.

Abstract: According to one embodiment, a semiconductor memory device includes: first and second signal lines; a first memory cell storing first information by applying voltage across the first signal line and a first interconnect layer; a second memory cell storing second information by applying voltage across the second signal line and a second interconnect layer; a first conductive layer provided on the first and second signal lines; third and fourth signal lines provided on the first conductive layer; a third memory cell storing third information by applying voltage across the third signal line and a third interconnect layer; and a fourth memory cell storing fourth information by applying voltage across the fourth signal line and a fourth interconnect layer.

Abstract: A semiconductor memory device comprises: a substrate; a first semiconductor portion provided separated from the substrate in a first direction intersecting a surface of the substrate, the first semiconductor portion extending in a second direction intersecting the first direction; a first gate electrode extending in the first direction; a first insulating portion which is provided between the first semiconductor portion and the first gate electrode, includes hafnium (Hf) and oxygen (O), and includes an orthorhombic crystal as a crystal structure; a first conductive portion provided between the first semiconductor portion and the first insulating portion; and a second insulating portion provided between the first semiconductor portion and the first conductive portion. An area of a facing surface of the first conductive portion facing the first semiconductor portion is larger than an area of a facing surface of the first conductive portion facing the first gate electrode.

Abstract: According to one embodiment, a semiconductor memory includes: a first member extending in a first direction perpendicular to a surface of a substrate, and including a first semiconductor layer; first and second interconnects extending in a second direction parallel to the surface of the substrate, the second interconnect neighboring the first interconnect in a third direction; a second member extending in the first direction and above the first member, the second member including a second semiconductor layer; third and a fourth interconnects extending in the second direction, the fourth interconnect neighboring the third interconnect in the third direction; and a third semiconductor layer between the first and the second members, the third semiconductor layer being continuous with the first and the second semiconductor layers.

Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.

Abstract: A semiconductor memory device includes two first electrode films, a first column and a second insulating film. The two first electrode films extend in a first direction and are separated from each other in a second direction. The first column is provided between the two first electrode films and has a plurality of first members and a plurality of insulating members. Each of the first members and each of the insulating members are arranged alternately in the first direction. One of the plurality of first members has a semiconductor pillar, a second electrode film and a first insulating film provided between the semiconductor pillar and the second electrode film. The semiconductor pillar, the first insulating film and the second electrode film are arranged in the second direction. The second insulating film is provided between the first column and one of the two first electrode films.

Abstract: A semiconductor memory device includes: a substrate; a plurality of first semiconductor portions arranged in a first direction intersecting a surface of the substrate; a first gate electrode extending in the first direction, the first gate electrode facing the plurality of first semiconductor portions from a second direction intersecting the first direction; a first insulating portion provided between the first semiconductor portions and the first gate electrode; a first wiring separated from the first gate electrode in the first direction; a second semiconductor portion connected to one end in the first direction of the first gate electrode and to the first wiring; a second gate electrode facing the second semiconductor portion; and a second insulating portion provided between the second semiconductor portion and the second gate electrode.

Abstract: According to one embodiment, a semiconductor memory device includes: a first interconnecting layer; a first signal line; a first memory cell that stores first information between the first interconnecting layer and the first signal line; second to fourth interconnecting layers provided above the first interconnecting layer; fifth to seventh interconnecting layers disposed apart from the second to fourth interconnecting layers; a second signal line coupled to the first signal line; a third signal line coupled to the first and second signal lines and the sixth interconnecting layer; and, first to fifth transistors.

Abstract: A semiconductor memory device includes: a substrate; a plurality of first semiconductor portions arranged in a first direction intersecting a surface of the substrate; a first gate electrode extending in the first direction, the first gate electrode facing the plurality of first semiconductor portions from a second direction intersecting the first direction; a first insulating portion provided between the first semiconductor portions and the first gate electrode; a first wiring separated from the first gate electrode in the first direction; a second semiconductor portion connected to one end in the first direction of the first gate electrode and to the first wiring; a second gate electrode facing the second semiconductor portion; and a second insulating portion provided between the second semiconductor portion and the second gate electrode.

Abstract: A semiconductor memory device includes a first block and a second block arranged adjacent to each other in a Y direction. Each of the first and second blocks includes conductive layers extended in an X direction, memory trenches between the conductive layers, memory pillars provided across two conductive layers with a memory trench interposed therebetween, and transistors provided between the memory pillars and the conductive layers. One of the conductive layers provided at an end of the first block in the Y direction is electrically connected to one of the conductive layers provided at an end of the second block.

Abstract: According to one embodiment, a semiconductor memory device includes: a first semiconductor layer including first to third portions which are arranged along a first direction and differ in position from one another in a second direction; a conductive layer including a fourth portion extending in the second direction and a fifth portion extending in the first direction; a first insulating layer between the fourth portion and the first semiconductor layer and between the fifth portion and the first semiconductor layer; a first contact plug coupled to the fourth portion; a second contact plug coupled to the first semiconductor layer in a region where the first insulating layer is formed; a first interconnect; and a first memory cell apart from the fifth portion in the first direction and storing information between the semiconductor layer and the first interconnect.

Abstract: A semiconductor memory device includes two first electrode films, a first column and a second insulating film. The two first electrode films extend in a first direction and are separated from each other in a second direction. The first column is provided between the two first electrode films and has a plurality of first members and a plurality of insulating members. Each of the first members and each of the insulating members are arranged alternately in the first direction. One of the plurality of first members has a semiconductor pillar, a second electrode film and a first insulating film provided between the semiconductor pillar and the second electrode film. The semiconductor pillar, the first insulating film and the second electrode film are arranged in the second direction. The second insulating film is provided between the first column and one of the two first electrode films.