Abstract: A trench DMOS transistor device that comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of first conductivity type over the substrate, wherein the epitaxial layer has a lower majority carrier concentration than the substrate; (c) a trench extending into the epitaxial layer from an upper surface of the epitaxial layer; (d) an insulating layer lining at least a portion of the trench; (e) a conductive region within the trench adjacent the insulating layer; (f) a body region of a second conductivity type provided within an upper portion of the epitaxial layer and adjacent the trench; (g) a source region of first conductivity type within an upper portion of the body region and adjacent the trench; and (h) one or more low resistivity deep regions extending into the device from an upper surface of the epitaxial layer. The low resistivity deep region acts to provide electrical contact with the substrate, which is a common drain region for the device.

Abstract: A Schottky rectifier includes a semiconductor structure having first and second opposing faces each extending to define an active semiconductor region and a termination semiconductor region. The semiconductor structure includes a cathode region of the first conductivity type adjacent the first face and a drift region of the first conductivity type adjacent the second face. The drift region has a lower net doping concentration than that of the cathode region. A plurality of trenches extends from the second face into the semiconductor structure and defines a plurality of mesas within the semiconductor structure. At least one of the trenches is located in each of the active and the termination semiconductor regions. A first insulating region is located adjacent the semiconductor structure in the plurality of trenches. A second insulating region electrically isolates the active semiconductor region from the termination semiconductor region.

Abstract: A trench DMOS transistor having overvoltage protection includes a substrate of a first conductivity type and a body region of a second conductivity type formed over the substrate. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and overlies the body region. A conductive electrode is deposited in the trench so that it overlies the insulating layer. A source region of the first conductivity type is formed in the body region adjacent to the trench. An undoped polysilicon layer overlies a portion of the insulating layer. A plurality of cathode regions of the first conductivity type are formed in the undoped polysilicon layer. At least one anode region is in contact with adjacent ones of the plurality of cathode regions.

Abstract: A method for making trench DMOS is provided that utilizes polycide and refractory techniques to make trench DMOS which exhibit low gate resistance, low gate capacitance, reduced distributed RC gate propagation delay, and improved switching speeds for high frequency applications.

Abstract: A trench MOSFET includes a plurality of trench segments in an upper surface of an epitaxial layer, extending through a second conductivity type region into a first conductivity type epitaxial region, segment at least partially separated from an adjacent segment by a terminating region, and the trench segments defining a plurality of polygonal body regions within the second conductivity type. A first insulating layer at least partially lines each trench and a plurality of first conductive regions are provided within the trench segments adjacent to the first layer. Each of the conductive regions is connected to an adjacent first conductive region by a connecting conductive region, overlying the terminating region, that bridges at least one of the terminating regions and a plurality of first conductivity type source regions are within upper portions of the polygonal body regions and adjacent the trench segments, the source regions positioned outside the terminating regions.

Abstract: A Schottky rectifier is provided. The Schottky rectifier comprises: (a) a semiconductor region having first and second opposing faces, with the semiconductor region comprising a cathode region of first conductivity type adjacent the first face and a drift region of the first conductivity type adjacent the second face, and with the drift region having a lower net doping concentration than that of the cathode region; (b) one or more trenches extending from the second face into the semiconductor region and defining one or more mesas within the semiconductor region; (c) an insulating region adjacent the semiconductor region in lower portions of the trench; (d) and an anode electrode that is (i) adjacent to and forms a Schottky rectifying contact with the semiconductor at the second face, (ii) adjacent to and forms a Schottky rectifying contact with the semiconductor region within upper portions of the trench and (iii) adjacent to the insulating region within the lower portions of the trench.

Abstract: A trench MOSFET device comprising: (a) a silicon substrate of a first conductivity type (preferably N-type conductivity); (b) a silicon epitaxial layer of the first conductivity type over the substrate, the epitaxial layer having a lower majority carrier concentration than the substrate; (c) a body region of a second conductivity type (preferably P-type conductivity) within an upper portion of the epitaxial layer; (d) a trench having trench sidewalls and a trench bottom, which extends into the epitaxial layer from an upper surface of the epitaxial layer and through the body region of the device; (f) an oxide region lining the trench, which comprises a lower segment covering at least the trench bottom and upper segments covering at least upper regions of the trench sidewalls; (g) a conductive region within the trench adjacent the oxide region; and (h) a source region of the first conductivity type within an upper portion of the body region and adjacent the trench.

Abstract: A trench DMOS transistor device that comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of first conductivity type over the substrate, wherein the epitaxial layer has a lower majority carrier concentration than the substrate; (c) a trench extending into the epitaxial layer from an upper surface of the epitaxial layer; (d) an insulating layer lining at least a portion of the trench; (e) a conductive region within the trench adjacent the insulating layer; (f) a body region of a second conductivity type provided within an upper portion of the epitaxial layer and adjacent the trench; (g) a source region of first conductivity type within an upper portion of the body region and adjacent the trench; and (h) one or more low resistivity deep regions extending into the device from an upper surface of the epitaxial layer. The low resistivity deep region acts to provide electrical contact with the substrate, which is a common drain region for the device.

Abstract: A trench MOSFET device and method of making the same.

Abstract: A trench DMOS transistor having overvoltage protection includes a substrate of a first conductivity type and a body region of a second conductivity type formed over the substrate. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and overlies the body region. A conductive electrode is deposited in the trench so that it overlies the insulating layer. A source region of the first conductivity type is formed in the body region adjacent to the trench. An undoped polysilicon layer overlies a portion of the insulating layer. A plurality of cathode regions of the first conductivity type are formed in the undoped polysilicon layer. At least one anode region is in contact with adjacent ones of the plurality of cathode regions.

Abstract: A method is provided for forming shallow and deep dopant implants adjacent source regions of a first conductivity type within an upper portion of an epitaxial layer in a trench MOSFET device.

Abstract: An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions.

Abstract: In integrated circuits produced by etching and damascene techniques, it is common for cracking to occur in dielectric material surrounding an interconnect metal layer integrated into the device, presumably as a result of the transfer of stresses from the interconnect metal layer to the surrounding dielectric material. The present invention addresses this problem by providing an interconnect metal layer that comprises rounded comers which are believed to reduce the stresses transferred to a surrounding dielectric layer.

Abstract: A method for making trench DMOS is provided that utilizes polycide and refractory techniques to make trench DMOS which exhibit low gate resistance, low gate capacitance, reduced distributed RC gate propagation delay, and improved switching speeds for high frequency applications.

Abstract: A method for making trench DMOS is provided that improves the breakdown voltage of the oxide layer in a device having at least a first trench disposed in the active region of the device and a second trench disposed in the termination region of the device. In accordance with the method, mask techniques are used to thicken the oxide layer in the vicinity of the top corner of the second trench, thereby compensating for the thinning of this region (and the accompanying reduction in breakdown voltage) that occurs due to the two-dimensional oxidation during the manufacturing process.

Abstract: A merged device is that comprises a plurality of MOSFET cells and a plurality of Schottky rectifier cells, as well as a method of designing and making the same. According to an embodiment of the invention, the MOSFET cells comprise: (a) a source region of first conductivity type formed within an upper portion of a semiconductor region, (b) a body region of second conductivity type formed within a middle portion of the semiconductor region, (c) a drain region of first conductivity type formed within a lower portion of the semiconductor region, and (d) a gate region provided adjacent the source region, the body region, and the drain region. The Schottky diode cells in this embodiment are disposed within a trench network and comprise a conductor portion in Schottky rectifying contact with the lower portion of the semiconductor region. At least one MOSFET cell gate region is positioned along a sidewall of the trench network and adjacent at least one Schottky diode cell in this embodiment.

Abstract: A trench DMOS transistor cell is provided that includes a substrate of a first conductivity type and a body region located on the substrate, which has a second conductivity type. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and a conductive electrode is placed in the trench overlying the insulating layer. A source region of the first conductivity type is located in the body region adjacent to the trench. The trench has sidewalls that define a polygon in the plane of the substrate so that adjacent sidewalls contact one another at an angle greater than 90 degrees.

Abstract: An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions.

Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. At least one doped column having a dopant of a second conductivity type is located in the epitaxial layer, adjacent a sidewall of the trench. The trench is etched using an etchant gas that also serves as a dopant source for the formation of the doped column. For example, if a p-type dopant such as boron is desired, BCl3 may be used as the etchant gas. Alternatively, if an n-type dopant such as phosphorus is required, PH3 may be used as the etchant gas. The dopant present in the gas is incorporated into the silicon defining the surfaces of the trench. This dopant is subsequently diffused to form the doped column surrounding the trench.

Abstract: A Schottky rectifier is provided. The Schottky rectifier comprises: (a) a semiconductor region having first and second opposing faces, with the semiconductor region comprising a cathode region of first conductivity type adjacent the first face and a drift region of the first conductivity type adjacent the second face, and with the drift region having a lower net doping concentration than that of the cathode region; (b) one or more trenches extending from the second face into the semiconductor region and defining one or more mesas within the semiconductor region; (c) an insulating region adjacent the semiconductor region in lower portions of the trench; (d) and an anode electrode that is (i) adjacent to and forms a Schottky rectifying contact with the semiconductor at the second face, (ii) adjacent to and forms a Schottky rectifying contact with the semiconductor region within upper portions of the trench and (iii) adjacent to the insulating region within the lower portions of the trench.