Patents by Inventor Girish Dixit

Girish Dixit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6913680
    Abstract: A method and associated apparatus includes depositing metal on a plating surface of an object immersed in an electrolyte solution prior to bulk deposition on the plating surface. In one aspect, the method further includes applying a voltage between an anode and the plating surface to enhance the concentration of metal ions in the electrolyte solution that is contained in a feature on the plating surface prior to the bulk deposition on the plating surface.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: July 5, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Bo Zheng, Hougong Wang, Girish Dixit, Fusen Chen
  • Publication number: 20050136185
    Abstract: A method for depositing a passivation layer on a substrate surface using one or more electroplating techniques is provided. Embodiments of the method include selectively depositing an initiation layer on a conductive material by exposing the substrate surface to a first electroless solution, depositing a passivating material on the initiation layer by exposing the initiation layer to a second electroless solution, and cleaning the substrate surface with an acidic solution. In another aspect, the method includes applying ultrasonic or megasonic energy to the substrate surface during the application of the acidic solution. In still another aspect, the method includes using the acidic solution to remove between about 100 ? and about 200 ? of the passivating material. In yet another aspect, the method includes cleaning the substrate surface with a first acidic solution prior to the deposition of the initiation layer.
    Type: Application
    Filed: October 29, 2004
    Publication date: June 23, 2005
    Inventors: Sivakami Ramanathan, Deenesh Padhi, Srinivas Gandikota, Girish Dixit
  • Patent number: 6905622
    Abstract: Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: June 14, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
  • Patent number: 6899816
    Abstract: Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: May 31, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
  • Patent number: 6878245
    Abstract: Embodiments of the invention generally provide an apparatus and method for replenishing organic molecules in an electroplating bath. The replenishment process of the present invention may occur on a real-time basis, and therefore, the concentration of organics minimally varies from desired concentration levels. The replenishment method generally includes conducting pre-processing depletion measurements in order to determine organic depletion rates per current density applied in the electroplating system. Once the organic depletion rates per current density are determined, these depletion rates may be applied to an electroplating processing recipe to calculate the volume of organic depletion per recipe step. The calculated volume of organic depletion per recipe step may then be used to determine the volume of organic molecule replenishment per unit of time that is required per recipe step in order to maintain a desired concentration of organics in the plating solution.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: April 12, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Sivakami Ramanathan, Muhammad Atif Malik, Girish A. Dixit
  • Patent number: 6869516
    Abstract: A method for cleaning the electrical contact areas or substrate contact areas of an electrochemical plating contact ring is provided. Embodiments of the method include positioning a substrate on a substrate support member having one or more electrical contacts, chemically plating a metal layer on at least a portion of a surface of the substrate, removing the processed substrate from the support member, and cleaning the one or more electrical contacts with a vapor mixture comprising an alcohol. In another aspect, the method includes spraying the vapor mixture on the electrical contacts while rotating the substrate support member.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 22, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Dmitry Lubomirsky, Michael X. Yang, Girish A. Dixit, Vincent E. Burkhart, Allen L. D'Ambra, Yeuk-Fai Edwin Mok, Harald Herchen
  • Publication number: 20050056536
    Abstract: A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
    Type: Application
    Filed: September 3, 2004
    Publication date: March 17, 2005
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Wei Wang, Ashok Sinha
  • Publication number: 20050014361
    Abstract: Methods are provided for depositing a dielectric material for use as an anti-reflective coating and sacrificial dielectric material in damascene formation. In one aspect, a process is provided for processing a substrate including depositing an acidic dielectric layer on the substrate by reacting an oxygen-containing organosilicon compound and an acidic compound, depositing a photoresist material on the acidic dielectric layer, and patterning the photoresist layer. The acidic dielectric layer may be used as a sacrificial layer in forming a feature definition by etching a partial feature definition, depositing the acidic dielectric material, etching the remainder of the feature definition, and then removing the acidic dielectric material to form a feature definition.
    Type: Application
    Filed: May 18, 2004
    Publication date: January 20, 2005
    Inventors: Son Nguyen, Michael Armacost, Mehul Naik, Girish Dixit, Ellie Yieh
  • Publication number: 20040259384
    Abstract: A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high capacitively-coupled RF bias for planarizing deposition (204) limits the charge build up on the underlying structure (104, 106, 108).
    Type: Application
    Filed: August 5, 2003
    Publication date: December 23, 2004
    Inventors: Somnath S. Nag, Girish A. Dixit, Srikanth Krishnan
  • Publication number: 20040248409
    Abstract: A method and system of processing a semiconductor substrate includes, in one or more embodiments, depositing a protective layer on the substrate surface comprising a conductive element disposed in a dielectric material; processing the protective layer to expose the conductive element; electrolessly depositing a metallic passivating layer onto the conductive element; and removing at least a portion of the protective layer from the substrate after electroless deposition. In another aspect, a method and system of processing a semiconductor includes depositing a metallic passivating layer onto a substrate surface comprising a conductive element, masking the passivating layer to protect the underlying conductive element of the substrate surface, removing the unmasked passivating layer, and removing the mask from the passivating layer.
    Type: Application
    Filed: March 30, 2004
    Publication date: December 9, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Srinivas Gandikota, Mehul Naik, Suketu A. Parikh, Girish A. Dixit
  • Patent number: 6824612
    Abstract: A method and apparatus for plating substrates, wherein the apparatus includes a central substrate transfer enclosure having at least one substrate transfer robot positioned therein. A substrate activation chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. A substrate plating chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. A substrate spin rinse dry chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot, and an annealing chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. At least one substrate pod loader in communication with the substrate transfer chamber and accessible to the at least one substrate transfer robot is also provided.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: November 30, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Joseph J. Stevens, Dmitry Lubomirsky, Ian Pancham, Donald J. Olgado, Howard E. Grunes, Yeuk-Fai Edwin Mok, Girish Dixit
  • Patent number: 6824666
    Abstract: An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: November 30, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Muhammad Atif Malik, Sivakami Ramanathan, Girish A. Dixit, Robin Cheung
  • Patent number: 6821909
    Abstract: A method for depositing a passivation layer on a substrate surface using one or more electroplating techniques is provided. Embodiments of the method include selectively depositing an initiation layer on a conductive material by exposing the substrate surface to a first electroless solution, depositing a passivating material on the initiation layer by exposing the initiation layer to a second electroless solution, and cleaning the substrate surface with an acidic solution. In another aspect, the method includes applying ultrasonic or megasonic energy to the substrate surface during the application of the acidic solution. In still another aspect, the method includes using the acidic solution to remove between about 100 Å and about 200 Å of the passivating material. In yet another aspect, the method includes cleaning the substrate surface with a first acidic solution prior to the deposition of the initiation layer.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: November 23, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Sivakami Ramanathan, Deenesh Padhi, Srinivas Gandikota, Girish A. Dixit
  • Patent number: 6808611
    Abstract: Embodiments of the invention provide an electro-analytical method for determining the concentration of an organic additive in an acidic or basic metal plating bath using an organic chemical analyzer. The method includes preparing a supporting-electrolyte solution, preparing a testing solution including the supporting-electrolyte solution and a standard solution, measuring an electrochemical response of the supporting-electrolyte solution using the organic chemical analyzer, and implementing an electro-analytical technique to determine the concentration of the organic additive in the plating bath from the electrochemical response measurements. The method is performed for independently analyzing one organic additive component in a plating bath containing multi-component organic additives, regardless of knowledge of the concentration of other organic additives and with minimal interference among organic additives.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: October 26, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Zhi-wen Sun, Chunman Yu, Brian Metzger, David W. Nguyen, Girish Dixit
  • Patent number: 6797620
    Abstract: A method and apparatus is provided for filling apertures formed in a substrate surface by depositing materials that selectively inhibit or limit the formation or growth of subsequent layers used to fill an aperture. In one aspect, a method is provided for processing a substrate including providing a substrate having a field and apertures formed therein, wherein the apertures each have a bottom and sidewalls, depositing a seed layer on the bottom and sidewalls of the apertures, depositing a growth-inhibiting layer on at least one of the field of the substrate or an upper portion of the sidewalls of the apertures, and depositing a conductive layer on the growth-inhibiting layer and the seed layer. Deposition of the growth-inhibiting layer improves fill of the aperture from the bottom of the aperture up to the field of the substrate.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: September 28, 2004
    Assignee: Applied Materials, Inc.
    Inventors: John S. Lewis, Srinivas Gandikota, Sivakami Ramanathan, Girish Dixit, Robin Cheung, Fusen Chen
  • Patent number: 6787006
    Abstract: A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: September 7, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Wei Wang, Ashok K. Sinha
  • Patent number: 6773569
    Abstract: A cyclic voltammetric method for measuring the concentration of additives in a plating solution. The method generally includes providing the plating solution, having an unknown concentration of an additive to be measured therein and cycling the potential of an inert working electrode through a series of measurement steps. The series of measurement steps includes a metal stripping step including pulsing from an open circuit potential to a metal stripping potential between about 0.2 V and about 0.8 V, and holding the metal stripping potential until a corresponding current nears 0 mA/cm. The series of measurement steps further includes a cleaning step including pulsing from the metal stripping potential to a cleaning potential between about 1.2 V and about 1.6 V, and holding the cleaning potential for about 2 seconds to about 10 seconds. The series of measurement steps then includes a pre-plating step including pulsing from the cleaning potential to a pre-plating potential between about −0.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: August 10, 2004
    Assignee: Applied Materials Inc.
    Inventors: Zhi-Wen Sun, Nicolay Kovarsky, Chunman Yu, Girish Dixit
  • Publication number: 20040118699
    Abstract: A method for plating a homogenous copper-palladium alloy. The method includes providing a plating solution to an electrochemical plating cell. The plating solution includes a copper ion source at a concentration of between about 0.1 M and about 1.0 M and a palladium ion source at a concentration of between about 0.0005 M and about 0.1 M. The method further includes supplying an electrical deposition bias to a plating surface. The electrical deposition bias is configured to simultaneously deposit copper ions and palladium ions onto the plating surface.
    Type: Application
    Filed: October 2, 2003
    Publication date: June 24, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Srinivas Gandikota, Girish Dixit
  • Patent number: 6746591
    Abstract: A method and apparatus for electrochemically depositing a metal onto a substrate. The apparatus generally includes a head assembly having a cathode and a wafer holder disposed above the cathode. The apparatus further includes a process kit disposed below the head assembly, the process kit including an electrolyte container configured to receive and maintain a fluid electrolyte therein, and an anode disposed in the electrolyte container. The apparatus further includes a power supply in electrical communication with the cathode and the anode, the power supply being configured to provide a varying amplitude electrical signal to the anode and cathode.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: June 8, 2004
    Assignee: Applied Materials Inc.
    Inventors: Bo Zheng, Renren He, Girish Dixit
  • Publication number: 20040087141
    Abstract: A method for depositing a passivation layer on a substrate surface using one or more electroplating techniques is provided. Embodiments of the method include selectively depositing an initiation layer on a conductive material by exposing the substrate surface to a first electroless solution, depositing a passivating material on the initiation layer by exposing the initiation layer to a second electroless solution, and cleaning the substrate surface with an acidic solution. In another aspect, the method includes applying ultrasonic or megasonic energy to the substrate surface during the application of the acidic solution. In still another aspect, the method includes using the acidic solution to remove between about 100 Å and about 200 Å of the passivating material. In yet another aspect, the method includes cleaning the substrate surface with a first acidic solution prior to the deposition of the initiation layer.
    Type: Application
    Filed: October 30, 2002
    Publication date: May 6, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Sivakami Ramanathan, Deenesh Padhi, Srinivas Gandikota, Girish A. Dixit