Abstract: A method performed by a User Equipment (UE) for transmitting a Hybrid Automatic Repeat Request-Acknowledgment (HARQ-ACK) codebook is provided.

Abstract: A stacked via structure including a first dielectric layer, a first conductive via, a first redistribution wiring, a second dielectric layer and a second conductive via is provided. The first dielectric layer includes a first via opening. The first conductive via is in the first via opening. A first level height offset is between a top surface of the first conductive via and a top surface of the first dielectric layer. The first redistribution wiring covers the top surface of the first conductive via and the top surface of the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer and the first redistribution wiring. The second dielectric layer includes a second via opening. The second conductive via is in the second via opening. The second conductive via is electrically connected to the first redistribution wiring through the second via opening of the second dielectric layer.

Abstract: The present disclosure relates to a method and apparatus for knowledge graph construction, storage medium and electronic device. The method for knowledge graph construction, comprises: identifying an entity concept from a title text of a target web page and at least one entity corresponding to the entity concept from a body text of the target web page; constructing a syntax parse tree of the title text based on syntax parse rules of a language to which the title text belongs, and determining, from the syntax parse tree, a modifier for modifying the entity concept; and generating a knowledge graph based on the entity concept, the modifier, and the at least one entity. Through the solution of the present disclosure, knowledge graphs with high accuracy and high recall rates are constructed without structured processing on target web pages.

Abstract: This invention in one aspect relates to a mixed-kernel heterojunction transistor, comprising a monolayer film formed of an atomically thin material, and a network of carbon nanotubes (CNTs) vertically stacked over the monolayer film to define an overlap region of the CNT network with the monolayer film, and non-overlap regions of the monolayer film and the CNT network, wherein the overlap region is a mixed-kernel van der Waals heterojunction.

Abstract: Provided is improved methodology for the nucleation of certain metal nitride substrate surfaces utilizing certain silicon-containing halides, silicon-containing amides, and certain metal precursors, in conjunction with nitrogen-containing reducing gases. While utilizing a pretreatment step, the methodology shows greatly improved nucleation wherein a microelectronic device substrate having such a metal nitride film deposited thereon has a thickness of about 10 ? to about 15 ? and less than about 1% of void area. Once such nucleation has been achieved, traditional layer-upon-layer deposition can rapidly take place.

Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Abstract: A method includes the following steps. A photoresist is exposed to a first light-exposure through a first mask, wherein the first mask includes a first stitching region, and a first portion of the photoresist corresponding to a first opaque portion of the first stitching region is unexposed. The photoresist is exposed to a second light-exposure through a second mask, wherein the second mask includes a second stitching region, and a second portion of the photoresist corresponding to a second opaque portion of the second stitching region is unexposed and is overlapping with the first portion of the photoresist.

Abstract: The present disclosure provides an interaction method and apparatus of a virtual space, a device, and a medium, the method includes: presenting an interaction navigation panel, which includes interaction objects, in a virtual space in response to a wake-up instruction of the virtual space; in response to a triggering operation on an interaction object, determining a target display panel of an interaction page associated with the interaction object; if the target display panel is a close-range panel, waking up the close-range panel and displaying the interaction page on the close-range panel; and if the target display panel is a long-range panel, waking up the long-range panel and displaying the interaction page on the long-range panel. The close-range panel and the long-range panel are configured to display independently and in different positions. The present disclosure can improve the interactivity and flexibility of the user when interacting with the virtual space.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a die, an underfill layer, a patterned dielectric layer and a plurality of conductive terminals. The die has a front surface and a back surface opposite to the front surface. The underfill layer encapsulates the die, wherein a surface of the underfill layer and the back surface of the die are substantially coplanar to one another. The patterned dielectric layer is disposed on the back surface of the die. The conductive terminals are disposed on and in contact with a surface of the patterned dielectric layer and partially embedded in the patterned dielectric layer to be in contact with the die, wherein a portion of the surface of the patterned dielectric layer that directly under each of the conductive terminals is substantially parallel with the back surface of the die.

Abstract: A method of forming a shell of a soft pack battery is provided. The method includes steps of adjusting temperature of a thin sheet material for the shell to a working temperature, applying a difference of fluid pressure to the thin sheet material as forming pressure, and a two-stage forming step. In a first-stage preforming step, a preform with a first depth is formed by the thin sheet material and at least one compensation portion is formed on the preform. In a second-stage final-forming step, the perform is molded into the final formed part with a second depth. Thereby the shell with a higher depth-thickness ratio is manufactured and the thin sheet material is uniformly deformed. The compensation portion is used for compensation of deformation at corners of the bottom of the final molded part. Thus thinning rate is less than 30% and yield rate is increased.

Abstract: A semiconductor device having a redistribution structure and a method of forming the same are provided. A semiconductor device includes a semiconductor structure, a redistribution structure over and electrically coupled the semiconductor structure, and a connector over and electrically coupled to the redistribution structure. The redistribution structure includes a base via and stacked vias electrically interposed between the base via and the connector. The stacked vias are laterally spaced apart from the base via.

Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Abstract: A device includes a sensor die having a sensing region at a top surface of the sensor die, an encapsulant at least laterally encapsulating the sensor die, a conductive via extending through the encapsulant, and a front-side redistribution structure on the encapsulant and on the top surface of the sensor die, wherein the front-side redistribution structure is connected to the conductive via and the sensor die, wherein an opening in the front-side redistribution structure exposes the sensing region of the sensor die, and wherein the front-side redistribution structure includes a first dielectric layer extending over the encapsulant and the top surface of the sensor die, a metallization pattern on the first dielectric layer, and a second dielectric layer extending over the metallization pattern and the first dielectric layer.

Abstract: In an embodiment, a device includes: a molding compound; an integrated circuit die encapsulated in the molding compound; a through via adjacent the integrated circuit die; and a redistribution structure over the integrated circuit die, the molding compound, and the through via, the redistribution structure electrically connected to the integrated circuit die and the through via, the redistribution structure including: a first dielectric layer disposed over the molding compound; a first conductive via extending through the first dielectric layer; a second dielectric layer disposed over the first dielectric layer and the first conductive via; and a second conductive via extending through the second dielectric layer and into a portion of the first conductive via, an interface between the first conductive via and the second conductive via being non-planar.

Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.

Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).

Abstract: An aspect of the disclosure relates to a transmitter including a phase lock loop (PLL) configured to generate a digital-to-analog (DAC) sampling signal and a local oscillator (LO) signal; a digital-to-analog (DAC) converter configured to convert a transmit digital signal into a transmit analog signal based on the DAC sampling signal; and a mixer configured to frequency upconvert the transmit analog signal based on the LO signal.

Abstract: A pellicle for an EUV photo mask includes a first layer; a second layer; and a main layer disposed between the first layer and second layer and including a plurality of nanotubes. At least one of the first layer or the second layer includes a two-dimensional material in which one or more two-dimensional layers are stacked. In one or more of the foregoing and following embodiments, the first layer includes a first two-dimensional material and the second layer includes a second two-dimensional material.

Abstract: A method for mobility enhancement in wireless communication systems is provided. The method is performed by a User Equipment (UE) configured with a first Small Data Transmission (SDT) configuration by a first cell. The method includes receiving a Radio Resource Control (RRC) release message including a suspend configuration from the first cell; transitioning to an RRC INACTIVE state in response to receiving the RRC release message; receiving, in the RRC INACTIVE state, a System Information Block Type 1 (SIB1) including a second SDT configuration from a second cell; camping on the second cell in response to receiving the SIB1 from the second cell; and while the UE is camping on the second cell, refraining from using the first SDT configuration to initiate an SDT procedure associated with the second cell in a case that the UE does not support performing the SDT procedure associated with the second cell.

Abstract: A wireless communication method and apparatus for handling radio resource collision are provided. The wireless communication method includes receiving a Radio Resource Control (RRC) configuration indicating a first Control Resource Set (CORESET) pool index associated with a Physical Uplink Control Channel (PUCCH) designated to carry Uplink Control Information (UCI); determining whether the PUCCH overlaps one or more Physical Uplink Shared Channels (PUSCHs) in time domain; after determining that the PUCCH overlaps at least one of the one or more PUSCHs in the time domain, multiplexing the UCI on a particular PUSCH of the one or more PUSCHs that is associated with the first CORESET pool index; and transmitting the UCI via the particular PUSCH.