Abstract: A pixel circuit includes a driving transistor, a first transistor, a second transistor, and an anti-leakage unit. The anti-leakage unit includes a first anti-leakage transistor and a second anti-leakage transistor. One of a source electrode and a drain electrode of the first anti-leakage transistor is electrically connected to one of a source electrode and a drain electrode of the first transistor and one of a source electrode and a drain electrode of the second transistor.

Abstract: A pellicle for an EUV photo mask includes a first layer, a second layer, and a main membrane disposed between the first layer and second layer. The main membrane includes a plurality of co-axial nanotubes, each of which includes an inner tube and one or more outer tubes surrounding the inner tube, and two of the inner tube and one or more outer tubes are made of different materials from each other.

Abstract: A device includes a carbon nanotube having a channel region and dopant-free source/drain regions at opposite sides of the channel region, a first metal oxide layer interfacing a first one of the dopant-free source/drain regions of the carbon nanotube, a second metal oxide layer interfacing a second one of the dopant-free source/drain regions of the carbon nanotube and a gate structure over the channel region of the carbon nanotube, and laterally between the first metal oxide layer and the second metal oxide layer.

Abstract: A method of fabricating a redistribution circuit structure including the following steps is provided. A conductive via is formed. A photosensitive dielectric layer is formed to cover the conductive via. The photosensitive dielectric layer is partially removed to reveal the conductive via at least through an exposure and development process. A redistribution wiring is formed on the photosensitive dielectric layer and the revealed conductive via.

Abstract: A method of PUCCH transmission performed by a UE is provided. The method includes receiving, from a BS, a plurality of PUCCH configurations configured for a plurality of cells, a first PUCCH configuration of the plurality of PUCCH configurations including one or more first spatial relation information for a first cell of the plurality of cells, and a second PUCCH configuration of the plurality of PUCCH configurations including one or more second spatial relation information for a second cell of the plurality of cells; receiving, from the BS on a PDSCH, an activation message for activating at least one first spatial relation information or at least one second spatial relation information; and performing a first PUCCH transmission on the first cell by using a first spatial setting corresponding to the at least one first spatial relation information indicated in the activation message.

Abstract: An aqueous formulation includes a PEDF-derived short peptide (PDSP) having the sequence of one of SEQ ID NO: 1, 2, 3, 5, 6, 8 or 9; boric acid at a concentration of 0.01 mM-923 mM; and a non-ionic tonicity agent. The pH value is around 5.5-8.4. The non-ionic tonicity agent is glycerin, sucrose, mannitol, or sorbitol. A concentration of the PDSP is 0.01%-1% w/v.

Abstract: A cathode includes a disordered rocksalt phase material and a coating layer disposed on a surface of the disordered rocksalt phase material. The coating layer may include one or more of an oxide, a phosphate, a phosphide, or a fluoride.

Abstract: The disclosure provides a method of channel scheduling for narrowband Internet of Things (NB-IoT) in a non-terrestrial network (NTN) and a user equipment using the same. The method includes: transmitting an uplink signal ending in a first subframe; determining a monitoring window starting from a second subframe according to the first subframe and a time offset; and monitoring a downlink signal corresponding to the uplink signal according to the monitoring window.

Abstract: A smart space system includes: a cabin, including: a bottom surface; and a first screen, located on a side wall of the cabin and connected to the bottom surface; an interactive human-machine interface, including: a display system, having an imaging device, wherein the imaging device is configured to project multiple multimedia images onto the first screen; and a controller, signal-connected to the interactive human-machine interface to issue a control command to the interactive human-machine interface, so that the multimedia images are connected to form a first continuous image, so that images of the first continuous image appear coherent on the first screen.

Abstract: A method for patterning a boron-containing hard mask includes patterning an oxide hard mask formed on a boron-containing hard mask, and patterning the boron-containing hard mask using the patterned oxide hard mask, wherein the oxide hard mask comprises silicon oxide (SiO2), the boron-containing hard mask is doped with one or more metal elements, and the patterning of the boron-containing hard mask comprises etching the boron-containing hard mask through openings of the patterned oxide hard mask using an etching gas mixture comprising chlorine (Cl2), hydrogen bromide (HBr), and oxygen (O2).

Abstract: Methods, systems, and devices for contact foot wet pullback with liner wet punch are described. A first etching operation may be performed on a stack of materials and a first insulative material to form a plurality of segments including contacts, the contacts formed from a first conductive material of the stack of materials and extending at least partially through the first insulative material. A first liner material may be deposited over the segments and the first insulative material, and a directional gas bias operation may be performed to transform a portion of the first liner material in contact with an extension of the contacts into a second liner material. A second etching operation may be performed to remove the second liner material and expose a surface of the extension, and a third etching operation may be performed remove at least a portion of the extension.

Abstract: An apparatus and a method for effectively exhausting evaporated material are provided. In an embodiment the apparatus includes a hot plate and an exhaust hood assembly suspended over the hot plate. The exhaust hood assembly includes a trench plate, a cover plate over the trench plate and a single exhaust pipe header over and attached to a single exhaust opening of the cover plate. During operation, the exhaust hood assembly reduces the amount of condensation and also collects any remaining condensation in order to help prevent condensation from impacting further manufacturing steps.

Abstract: A method for forming an interconnect structure is provided. The method includes the following operations. A contact is formed over a substrate. An interlayer dielectric (ILD) layer is formed over the contact and the substrate. An opening is formed in the ILD layer thereby exposing a portion of the contact. A densified dielectric layer is formed at an exposed surface of the ILD layer by the opening and an oxide layer over the portion of the contact by irradiating a microwave on the exposed surface of the ILD layer.

Abstract: The present invention pertains to methods of coating antimicrobial peptides on the biomaterial and the biomaterial coated thereby. The coating solution described herein comprises one or more antimicrobial peptides (AMPs) dissolved in a buffer containing an anionic surfactant, wherein the AMPs are amphipathic and cationic.

Abstract: A semiconductor package including a plurality of semiconductor devices, an insulating layer, and a redistribution layer is provided. The insulating layer is disposed over the semiconductor device. The redistribution layer is disposed over the insulating layer and electrically connected to the semiconductor device. The redistribution layer includes a conductive line portion. The semiconductor package has a stitching zone, and the insulating layer has a ridge structure on a surface away from the semiconductor device and positioned within the stitching zone.

Abstract: A transistor includes a gate structure, a spacer laterally surrounding the gate structure. a channel layer underlying the gate structure and comprising a two-dimensional (2D) material, and a source/drain contact laterally separated from the gate structure by the spacer and laterally coupled to the channel layer.

Abstract: Embodiments include a method for forming an integrated circuit package. A first dielectric layer is deposited over a wafer, the first dielectric layer overlapping a package region and a scribe line region of the wafer. A first metallization pattern is formed extending along and through the first dielectric layer. A second dielectric layer is deposited over the first metallization pattern and the first dielectric layer, the second dielectric layer overlapping the package region and the scribe line region. The second dielectric layer is removed from the scribe line region, the second dielectric layer remaining in the package region. After the second dielectric layer is removed from the scribe line region, a second metallization pattern is formed extending along and through the second dielectric layer. The wafer and the first dielectric layer are sawed in the scribe line region.

Abstract: An electronic device includes a memory usage identification circuit and a system-level cache (SLC). The memory usage identification circuit obtains a memory usage indicator that depends on memory usage of a storage space allocated in a system memory at which memory access is requested by a physical address. The SLC includes a cache memory and a cache controller. The cache controller performs cache management upon the cache memory according to the physical address and the memory usage indicator.

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

Abstract: The present disclosure describes methods, devices, and storage medium for displaying an azimuth in a virtual scene, which belongs to the field of computer technologies. The method includes obtaining, by a device, an orientation azimuth of a virtual object in a virtual scene. The device includes a memory storing instructions and a processor in communication with the memory. The method further includes obtaining, by the device, a plurality of azimuths, angles between the plurality of azimuths and the orientation azimuth being no larger than a preset angle, the plurality of azimuths comprising first azimuths and second azimuths. The method also includes symmetrically distributing, by the device, the first azimuths and the second azimuths centered and on two sides of the orientation azimuth to obtain a target horizontal bar dial; and displaying, by the device, the target horizontal bar dial in a visual field image of the virtual object.