Patents by Inventor Hisashi Kaneko
Hisashi Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090067086Abstract: A storage device includes plural recording media, a housing configured to accommodate the plural recording media, a plate that is fixed and extends round between two adjacent recording media in the housing, plural sliders each of which is mounted with a magnetic head that is configured to record information in or reproduce the information from a corresponding one of the plural recording media, and plural arms, each of which is mounted with one of the plural sliders only on a single surface, and configured to move the one of the plural sliders.Type: ApplicationFiled: July 17, 2008Publication date: March 12, 2009Applicant: FUJITSU LIMITEDInventors: Hisashi Kaneko, Yoshiharu Matsuda
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Patent number: 7495866Abstract: A fixing member is spaced from a head actuator by a predetermined distance. A flexible printed circuit board extends at least from the head actuator to the fixing member. The flexible printed circuit board is superposed on the surface of the fixing member. A viscoelastic layer and a protecting layer are overlaid on the surface of the flexible printed circuit board. A clip clips all the fixing member, the flexible printed circuit board, the viscoelastic layer and the protecting layer together. When a head slider is positioned, the head actuator changes its attitude relative to a recording disk. The inertial force based on the rotation causes the first flexible printed circuit board to vibrate when the actuator block stops rotating. The viscoelastic layer serves to absorb this residual vibration of the first flexible printed circuit board. Vibration of the flexible printed circuit board can be suppressed.Type: GrantFiled: July 19, 2004Date of Patent: February 24, 2009Assignee: Fujitsu LimitedInventors: Mitsuhiro Izumi, Mitsuaki Yoshida, Hisashi Kaneko, Tsuneyori Ino, Yukihiro Komura, Shinji Fujimoto, Kei Funabashi
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Publication number: 20080296165Abstract: A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.Type: ApplicationFiled: May 27, 2008Publication date: December 4, 2008Inventors: Junji KUNISAWA, Mitsuko ODAGAKI, Natsuki MAKINO, Koji MISHIMA, Kenji NAKAMURA, Hiroaki INOUE, Norio KIMURA, Tetsuo MATSUDA, Hisashi KANEKO, Nobuo HAYASAKA, Katsuya OKUMURA, Manabu TSUJIMURA, Toshiyuki MORITA
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Publication number: 20080299766Abstract: A method for fabricating a semiconductor device, includes forming a first dielectric film above a substrate, forming an opening in the first dielectric film, forming a catalytic characteristic film using at least one of a metal having catalytic characteristics and a conductive oxide having catalytic characteristics as its material on sidewalls and at a bottom of the opening, depositing a conductive material film using a conductive material in the opening in which the catalytic characteristic film is formed on the sidewalls and at the bottom, removing the catalytic characteristic film formed on the sidewalls of the opening, and forming a second dielectric film above the first dielectric film and the conductive material film after the removing.Type: ApplicationFiled: May 29, 2008Publication date: December 4, 2008Inventors: Seiichi OMOTO, Hisashi Kaneko, Masahiko Hasunuma
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Patent number: 7453046Abstract: A fixing member is spaced from a head actuator by a predetermined distance. A flexible printed circuit board extends at least from the head actuator to the fixing member. The flexible printed circuit board is superposed on the surface of the fixing member. A viscoelastic layer and a protecting layer are overlaid on the surface of the flexible printed circuit board. A clip clips all the fixing member, the flexible printed circuit board, the viscoelastic layer and the protecting layer together. When a head slider is positioned, the head actuator changes its attitude relative to a recording disk. The inertial force based on the rotation causes the first flexible printed circuit board to vibrate when the actuator block stops rotating. The viscoelastic layer serves to absorb this residual vibration of the first flexible printed circuit board. Vibration of the flexible printed circuit board can be suppressed.Type: GrantFiled: January 26, 2007Date of Patent: November 18, 2008Assignee: Fujitsu LimitedInventors: Mitsuhiro Izumi, Mitsuaki Yoshida, Hisashi Kaneko, Tsuneyori Ino, Yukihiro Komura, Shinji Fujimoto, Kei Funabashi
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Publication number: 20080251385Abstract: A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.Type: ApplicationFiled: May 7, 2008Publication date: October 16, 2008Inventors: Junji Kunisawa, Mitsuko Odagaki, Natsuki Makino, Koji Mishima, Kenji Nakamura, Hiroaki Inoue, Norio Kimura, Tetsuo Matsuda, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura, Manabu Tsujimura, Toshiyuki Morita
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Publication number: 20080237863Abstract: A semiconductor device, which is comprised of a copper wiring layer which is formed above a semiconductor substrate, a pad electrode layer which conducts electrically to the copper wiring layer and has an alloy, which contains copper and a metal whose oxidation tendency is higher than copper, formed to extend to the bottom surface, and an insulating protective film which has an opening extended to the pad electrode layer, is provided.Type: ApplicationFiled: April 22, 2008Publication date: October 2, 2008Applicant: Kabushiki Kaisha TosibaInventors: Hiroshi Toyoda, Mitsuhiro Nakao, Masahiko Hasunuma, Hisashi Kaneko, Atsuko Sakata, Toshiaki Komukai
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Patent number: 7414815Abstract: A magnetic disk device comprises a magnetic disk in which a data zone is formed. An actuator has a voice coil and a head slider carrying a magnetic head, the actuator being swung to move the magnetic head over the disk between an innermost position of the data zone and an outermost position of the data zone. A magnet has a magnetization center and is opposed to the voice coil so that a voice coil motor which swings the actuator is formed, the magnet having a north pole and a south pole confronting each other via the magnetization center. The magnetic disk device is provided so that a deviation of a center of the voice coil from the magnetization center when the magnetic head is in the innermost position of the data zone is substantially equal to a deviation of the center of the voice coil from the magnetization center when the magnetic head is in the outermost position of the data zone.Type: GrantFiled: June 27, 2007Date of Patent: August 19, 2008Assignee: Fujitsu LimitedInventors: Shinji Fujimoto, Masato Shibuya, Hisashi Kaneko, Tsuneyori Ino, Yukihiro Komura, Mitsuhiro Izumi, Kei Funabashi
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Patent number: 7387717Abstract: A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.Type: GrantFiled: August 1, 2003Date of Patent: June 17, 2008Assignees: Ebara Corporation, Kabushiki Kaisha ToshibaInventors: Junji Kunisawa, Mitsuko Odagaki, Natsuki Makino, Koji Mishima, Kenji Nakamura, Hiroaki Inoue, Norio Kimura, Tetsuo Matsuda, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura, Manabu Tsujimura, Toshiyuki Morita
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Publication number: 20080102628Abstract: A method for manufacturing a semiconductor device includes forming, on a substrate having a recessed portion on a surface, a plating film which is at least buried in the recessed portion and has a higher impurity concentration in an upper portion than in a lower portion, thermally treating the plating film, and removing the thermally treated plating film except for a portion buried in the recessed portion.Type: ApplicationFiled: October 29, 2007Publication date: May 1, 2008Inventors: Masahiko Hasunuma, Hisashi Kaneko, Hiroshi Toyoda
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Publication number: 20080081466Abstract: A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second film on the first film in which the alignment mark material is embedded, irradiating the second film formed in a predetermined region including a position where the alignment mark material is embedded with a processing light, thereby to remove the second film to an extent that a portion of the second film remains in the predetermined region, and exposing the portion of the second film remaining in the predetermined region to an etching environment for etching the second film.Type: ApplicationFiled: September 25, 2007Publication date: April 3, 2008Inventors: Mie MATSUO, Hisashi KANEKO
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Patent number: 7336448Abstract: A magnetic disk device comprises a magnetic disk in which a data zone is formed. An actuator has a voice coil and a head slider carrying a magnetic head, the actuator being swung to move the magnetic head over the disk between an innermost position of the data zone and an outermost position of the data zone. A magnet has a magnetization center and is opposed to the voice coil so that a voice coil motor which swings the actuator is formed, the magnet having a north pole and a south pole confronting each other via the magnetization center. The magnetic disk device is provided so that a deviation of a center of the voice coil from the magnetization center when the magnetic head is in the innermost position of the data zone is substantially equal to a deviation of the center of the voice coil from the magnetization center when the magnetic head is in the outermost position of the data zone.Type: GrantFiled: July 29, 2004Date of Patent: February 26, 2008Assignee: Fujitsu LimitedInventors: Shinji Fujimoto, Masato Shibuya, Hisashi Kaneko, Tsuneyori Ino, Yukihiro Komura, Mitsuhiro Izumi, Kei Funabashi
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Publication number: 20080037176Abstract: A disk apparatus includes a ramp which holds a tip end of an arm at a position away from a disk, and a slit shroud having an airflow control plate. A side surface of the airflow control plate is opposed to a side surface of the disk, the airflow control plate spreads to a position where the airflow control plate is superposed on the tip end of the arm held by the ramp. The airflow control plate has the same thickness as that of the disk, and is flush with the disk 12.Type: ApplicationFiled: January 5, 2007Publication date: February 14, 2008Inventors: Yoshiharu Matsuda, Hisashi Kaneko, Masaya Suwa, Toru Watanabe, Takuma Kido, Yasuo Suzuki
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Publication number: 20080018355Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.Type: ApplicationFiled: June 27, 2007Publication date: January 24, 2008Inventors: Kiyoshi TAKEKOSHI, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
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Patent number: 7314827Abstract: A method of manufacturing a semiconductor device according to an aspect of the present invention comprises forming a plated film on a substrate which has a recessed portion on its surface so as to bury in the recessed portion by a plating method; forming over the plated film a compressive stress-applying film which is composed of a material having a thermal expansion coefficient of 60% or less compared with a thermal expansion coefficient of a metal composing the plated film; heat-treating while applying a compressive stress to the plated film by the compressive stress-applying film; and removing the compressive stress-applying film and the plated film which is not buried in the recessed portion.Type: GrantFiled: July 15, 2005Date of Patent: January 1, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Toyoda, Sachiyo Ito, Masahiko Hasunuma, Hisashi Kaneko
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Patent number: 7308395Abstract: According to an aspect of the present invention, there is provided a simulation circuit pattern evaluation method including: designing an aggregate of simulation circuit patterns, which simulate a circuit pattern of a semiconductor integrated circuit, by combining plural geometrical structure defining parameters respectively having at least two states in such a manner that the respective states appear the same number of times in the respective geometrical structure defining parameters; forming the aggregate of the simulation circuit patterns on a substrate; and evaluating the formed aggregate of the simulation circuit patterns.Type: GrantFiled: January 15, 2004Date of Patent: December 11, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Hisashi Kaneko, Motoya Okazaki, Hiroyuki Toshima
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Publication number: 20070253114Abstract: A magnetic disk device comprises a magnetic disk in which a data zone is formed. An actuator has a voice coil and a head slider carrying a magnetic head, the actuator being swung to move the magnetic head over the disk between an innermost position of the data zone and an outermost position of the data zone. A magnet has a magnetization center and is opposed to the voice coil so that a voice coil motor which swings the actuator is formed, the magnet having a north pole and a south pole confronting each other via the magnetization center. The magnetic disk device is provided so that a deviation of a center of the voice coil from the magnetization center when the magnetic head is in the innermost position of the data zone is substantially equal to a deviation of the center of the voice coil from the magnetization center when the magnetic head is in the outermost position of the data zone.Type: ApplicationFiled: June 27, 2007Publication date: November 1, 2007Applicant: FUJITSU LIMITEDInventors: Shinji Fujimoto, Masato Shibuya, Hisashi Kaneko, Tsuneyori Ino, Yukihiro Komura, Mitsuhiro Izumi, Kei Funabashi
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Publication number: 20070254474Abstract: A method for manufacturing a semiconductor device includes forming a copper anti-diffusion film on a copper trench wiring layer, and forming an opening portion in the copper anti-diffusion film by laser aberration, the opening portion being formed in a region corresponding to an alignment region used for lithography process for forming an aluminum wiring on the copper trench wiring layer.Type: ApplicationFiled: April 27, 2007Publication date: November 1, 2007Inventors: Hideo Shinomiya, Jun Hirota, Mie Matsuo, Hisashi Kaneko
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Publication number: 20070204243Abstract: A stress analysis method is provided: including dividing, by using a division unit, an inside of a chip into a plurality of analysis areas, deriving, by using a composite property derivation unit, a composite property into which physical property values of a plurality of materials included in an analysis area are compounded, about each of the plurality of analysis areas on the basis of wiring structure data for each of the plurality of analysis areas, and creating, by using a stress analysis unit, a three-dimensional model of a finite element method which uses each analysis area as an element, to apply the composite property to each element, and to perform a stress analysis.Type: ApplicationFiled: February 7, 2007Publication date: August 30, 2007Inventors: Sachiyo Ito, Masahiko Hasunuma, Hisashi Kaneko
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Patent number: 7242206Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.Type: GrantFiled: July 13, 2005Date of Patent: July 10, 2007Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba, Ibiden Co., Ltd.Inventors: Kiyoshi Takekoshi, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido