Abstract: A cathode potential is applied to a conductive layer formed on a substrate having a depression pattern. A plating solution in electrical contact with an anode is supplied to the conductive layer to form a plating film on the conductive layer. At this time, the plating solution is supplied by causing an impregnated member containing the plating solution to face the conductive layer. Since the plating solution stays in the depression, a larger amount of plating solution is supplied than on the upper surface of the substrate, and the plating rate of the plating film in the depression increases. Consequently, the plating film can be preferentially formed in the depression such as a groove or hole.

Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

Abstract: A fixing member is spaced from a head actuator by a predetermined distance. A flexible printed circuit board extends at least from the head actuator to the fixing member. The flexible printed circuit board is superposed on the surface of the fixing member. A viscoelastic layer and a protecting layer are overlaid on the surface of the flexible printed circuit board. A clip clips all the fixing member, the flexible printed circuit board, the viscoelastic layer and the protecting layer together. When a head slider is positioned, the head actuator changes its attitude relative to a recording disk. The inertial force based on the rotation causes the first flexible printed circuit board to vibrate when the actuator block stops rotating. The viscoelastic layer serves to absorb this residual vibration of the first flexible printed circuit board. Vibration of the flexible printed circuit board can be suppressed.

Abstract: A magnetic disk apparatus includes an actuator including a magnetic head, a coil which forms a voice coil motor, and a coil arm which supports the coil, wherein the magnetic head can be rotated or swung by the voice coil motor so as to be positioned at any position on a magnetic disk, a magnet which forms the voice coil motor with the coil, and a latch mechanism for controlling the actuator so that the actuator is situated at a designated latch position in a non-operation condition. The latch mechanism is formed by the magnet and a magnetic metal piece provided to the coil arm, an extended part is formed at the magnetic metal piece, and the extended part is formed and positioned at a strong magnetic force generation part of the magnet when the actuator is positioned at the latch position.

Abstract: A magnetic disk device comprises a magnetic disk in which a data zone is formed. An actuator has a voice coil and a head slider carrying a magnetic head, the actuator being swung to move the magnetic head over the disk between an innermost position of the data zone and an outermost position of the data zone. A magnet has a magnetization center and is opposed to the voice coil so that a voice coil motor which swings the actuator is formed, the magnet having a north pole and a south pole confronting each other via the magnetization center. The magnetic disk device is provided so that a deviation of a center of the voice coil from the magnetization center when the magnetic head is in the innermost position of the data zone is substantially equal to a deviation of the center of the voice coil from the magnetization center when the magnetic head is in the outermost position of the data zone.

Abstract: A cathode potential is applied to a conductive layer formed on a substrate having a depression pattern. A plating solution in electrical contact with an anode is supplied to the conductive layer to form a plating film on the conductive layer. At this time, the plating solution is supplied by causing an impregnated member containing the plating solution to face the conductive layer. Since the plating solution stays in the depression, a larger amount of plating solution is supplied than on the upper surface of the substrate, and the plating rate of the plating film in the depression increases. Consequently, the plating film can be preferentially formed in the depression such as a groove or hole.

Abstract: A method of forming a cap film comprises a first polishing step of performing a polishing operation at selectivity of R1 (=removal rate for the cap film/removal rate for the insulating film), and a second polishing step of performing a polishing operation at selectivity of R2 (=removal rate for the cap film/removal rate for the insulating film). Each of the polishing operations is performed by using a slurry having the condition of R1>R2. By performing the polishing operations at different selectivity, the cap film free from problems such as dishing of the cap film and the residual cap film on side walls of a recess is formed. Consequently, a semiconductor device having an excellent RC characteristic can be provided.

Abstract: A method of manufacturing a semiconductor device includes subjecting a semiconductor wafer, which includes a copper layer formed above a semiconductor substrate and covered with an insulating film, to a dry etching using a fluorocarbon gas to partially remove the insulating film, thereby at least partially exposing a surface of the copper layer. The copper layer, the surface of which is at least partially exposed is subjected to a nitrogen plasma treatment. The semiconductor wafer having the nitrogen plasma-treated copper layer is exposed to atmosphere, and then the semiconductor wafer is subjected to a surface treatment.

Abstract: According to an aspect of the present invention, there is provided a simulation circuit pattern evaluation method including: designing an aggregate of simulation circuit patterns, which simulate a circuit pattern of a semiconductor integrated circuit, by combining plural geometrical structure defining parameters respectively having at least two states in such a manner that the respective states appear the same number of times in the respective geometrical structure defining parameters; forming the aggregate of the simulation circuit patterns on a substrate; and evaluating the formed aggregate of the simulation circuit patterns.

Abstract: Disclosed is a semiconductor device comprising a porous film formed above a semiconductor substrate, the porous film having at least one burying concave selected from the group consisting of a trench and a hole, a conductive barrier layer formed on the inner surface of the burying concave, a conductive member buried in the burying concave with the conductive barrier layer interposed between the porous film and the conductive member, and a mixed layer formed between the porous film and the conductive barrier layer, and containing a component of the porous film and a component of the conductive barrier layer.

Abstract: One via contact through which upper and lower interconnections of a multilevel interconnection are connected to each other is provided when the width or volume of the lower interconnection is not larger than a given value. A plurality of via contacts are arranged at regular intervals, each of which is not larger than a given value, in an effective diffusion region of voids included in the lower interconnection, when the width or volume of the lower interconnection exceeds a given value.

Abstract: Disclosed is a method of manufacturing an electronic device, comprising forming a concave portion on the surface of a base member, forming an electrically conductive seed layer on that surface of the base member on which a plated film is to be formed, and applying an electrolytic plating treatment with the seed layer used as a common electrode under the condition that a substance for accelerating the electrolytic plating is allowed to be present in the concave portion of the base member in an amount larger than that on the surface of the base member to form a plated film.

Abstract: An electronic device manufacturing method comprises forming an insulating film above a substrate, forming a to-be-filled region which includes at least one of an interconnection groove and a hole in the insulating film, forming a first conductive film containing a catalyst metal which accelerates electroless plating, so as to line an internal surface of the to-be-filled region, forming a second conductive film on the first conductive film by the electroless plating, so as to line the internal surface of the to-be-filled region via the first conductive film, and forming a third conductive film on the second conductive film by electroplating, so as to fill the to-be-filled region via the first conductive film and the second conductive film.

Abstract: The present invention relates to a plating method and a plating apparatus which can attain embedding of copper into fine interconnection patterns with use of a plating liquid having high throwing power and leveling properties, and which can make film thickness of a plated film substantially equal between an interconnection region and a non-interconnection region. A plating method comprises filling a plating liquid containing metal ions and an additive into a plating space formed between a substrate and an anode disposed closely to the substrate so as to face the substrate, and changing concentration of the additive in the plating liquid filled into the plating space during a plating process.

Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.

Abstract: A thermal component is mounted on the front surface of an isolator sheet within a first specific area. A thermally-conductive material is located on the back surface of the isolator sheet on the back of the first specific area. An electrically-conductive material is located on the front surface of the isolator sheet within a second specific area. A thermally-insulating material is located on the back surface of the isolator sheet on the back of the second specific area. The flexible printed circuit board unit of this type allows heat of the thermal component to efficiently radiate from the thermally-conductive material. An increase in temperature can be suppressed in the thermal component. Heat can reliably stay in the electrically-conductive material when a solder material is applied to the surface of the electrically-conductive material. The solder material is allowed to reliably fuse.

Abstract: A semiconductor device, which is comprised of a copper wiring layer which is formed above a semiconductor substrate, a pad electrode layer which conducts electrically to the copper wiring layer and has an alloy, which contains copper and a metal whose oxidation tendency is higher than copper, formed to extend to the bottom surface, and an insulating protective film which has an opening extended to the pad electrode layer, is provided.

Abstract: One via contact through which upper and lower interconnections of a multilevel interconnection are connected to each other is provided when the width or volume of the lower interconnection is not larger than a given value. A plurality of via contacts are arranged at regular intervals, each of which is not larger than a given value, in an effective diffusion region of voids included in the lower interconnection, when the width or volume of the lower interconnection exceeds a given value.

Abstract: In an electroplating apparatus, an electrolytic agent is filled into the portion between an anode and a dummy cathode which is opposite substantially face to face and parallel to the anode, and an electric current is supplied to this portion, thereby suppressing changes in properties of a black film during the period in which plating to a substrate to be processed is stopped. In particular, by applying an electric current to the anode immediately before plating to the substrate is resumed, the film formation characteristics of plating to the substrate can be maximally stabilized. This can reduce the consumption power and dissolution of the anode. This apparatus is particularly effective in copper plating in which the formation of a black film is significant.

Abstract: An electronic device manufacturing method comprises forming an insulating film above a substrate, forming a to-be-filled region which includes at least one of an interconnection groove and a hole in the insulating film, forming a first conductive film containing a catalyst metal which accelerates electroless plating, so as to line an internal surface of the to-be-filled region, forming a second conductive film on the first conductive film by the electroless plating, so as to line the internal surface of the to-be-filled region via the first conductive film, and forming a third conductive film on the second conductive film by electroplating, so as to fill the to-be-filled region via the first conductive film and the second conductive film.