Patents by Inventor Hisashi Kato

Hisashi Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220262744
    Abstract: Semiconductor memory device includes: a first and second member each extending in a first direction in a boundary part between a first and second block region and arranged in the first direction; a support pillar arranged between the first and second member at the boundary part; conductive layers separated from one another and arranged in a third direction and split by the first and second member, and the support pillar into a first and second portion; and a memory pillar penetrating through the conductive layers. The support pillar includes a lower and upper pillar. A side face of the lower pillar and an extension of a side face of the upper pillar are displaced from each other in a plane based on a second and the third direction.
    Type: Application
    Filed: August 25, 2021
    Publication date: August 18, 2022
    Applicant: Kioxia Corporation
    Inventors: Mitsunori MASAKI, Hisashi KATO, Kazuhiro NOJIMA, Shoichi MIYAZAKI, Akira YOTSUMOTO, Kanako SHIGA, Yu HIROTSU, Osamu MATSUURA
  • Publication number: 20220173032
    Abstract: According to one embodiment, a semiconductor memory device includes first and second conductor layers, a first pillar, a first contact, and a source line drive circuit. The first pillar is passing through the second conductor layers. The first pillar includes a first semiconductor layer and a second insulator layer. The first semiconductor layer includes a side surface partially in contact with the first conductor layer. The first contact is passing through the second conductor layers. The first contact includes a third conductor layer and a third insulator layer. The third conductor layer includes a side surface partially in contact with the first conductor layer. The source line drive circuit is electrically coupled to the first conductor layer via the first contact.
    Type: Application
    Filed: February 9, 2022
    Publication date: June 2, 2022
    Applicant: KIOXIA CORPORATION
    Inventor: Hisashi KATO
  • Patent number: 11347452
    Abstract: An information processing apparatus manages whether each of a plurality of print plug-ins is in an enabled state or in a disabled state, the plurality of print plug-ins adding at least a search function to an operating system operating on the information processing apparatus, and, if a search for a printer is instructed and the plurality of print plug-ins includes a print plug-in in the disabled state, performs a search for a printer by a print plug-in in the enabled state, and displays a detection result and a setting screen for setting the print plug-in in the disabled state to the enabled state.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: May 31, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hisashi Kato
  • Publication number: 20220123616
    Abstract: A coil substrate includes a flexible substrate having first and second ends, a first coil formed on first surface of the substrate such that the first coil has center space and first wiring surrounding the space, and an second coil formed on second surface of the substrate such that the second coil has center space and second wiring surrounding the space and is positioned directly below the first coil. Each of the first and second wirings has outer and inner ends such that each wiring is formed in spiral shape between the outer and inner ends, a number of turns in the first coil is greater than a number of turns in the second coil, a width of the first wiring is substantially constant from the outer end to the inner end, and a width of the second wiring is not constant from the outer end to the inner end.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 21, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Publication number: 20220115927
    Abstract: A coil substrate includes a flexible substrate having a first end and a second end, and coils formed on the substrate such that the coils extend from the first end to the second end of the substrate. The coils are formed such that each coil includes a center space and a wiring formed around the center space, each coil is formed such that the wiring includes one or more first wirings, one or more second wirings facing the first wiring(s) via the center space, and one or more third wirings connecting the first and second wiring(s) and that the first wiring(s) is positioned closer to the first end than the second wiring(s), and the wiring in each coil is formed such that a width w1 of the first wiring(s), a width w2 of the second wiring(s), and a width w3 of the third wiring(s) are substantially equal to each other.
    Type: Application
    Filed: September 30, 2021
    Publication date: April 14, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Publication number: 20220110210
    Abstract: A coil substrate includes a first flexible substrate, a coil formed on the first flexible substrate, a second flexible substrate extending from the first flexible substrate, and a wiring that is formed on the second flexible substrate and is electrically connected to the coil formed on the first flexible substrate. The second flexible substrate includes a first portion extending from the first flexible substrate and a second portion extending from the first portion such that the second portion is formed along the first flexible substrate and that the second flexible substrate forms a gap between the second portion and the first flexible substrate.
    Type: Application
    Filed: September 29, 2021
    Publication date: April 7, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Patent number: 11282782
    Abstract: According to one embodiment, a semiconductor memory device includes first and second conductor layers, a first pillar, a first contact, and a source line drive circuit. The first pillar is passing through the second conductor layers. The first pillar includes a first semiconductor layer and a second insulator layer. The first semiconductor layer includes a side surface partially in contact with the first conductor layer. The first contact is passing through the second conductor layers. The first contact includes a third conductor layer and a third insulator layer. The third conductor layer includes a side surface partially in contact with the first conductor layer. The source line drive circuit is electrically coupled to the first conductor layer via the first contact.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: March 22, 2022
    Assignee: KIOXIA CORPORATION
    Inventor: Hisashi Kato
  • Patent number: 11283317
    Abstract: A coil substrate for a motor includes a flexible substrate, and multiple coils formed on a surface of the flexible substrate. Each of the coils has a wiring having first wiring portions and second wiring portions extending from the first wirings respectively and is formed such that the first wiring portions extend parallel with respect to each other and that the second wiring portions extend not parallel to the first wirings, and the flexible substrate is formed to be formed around a magnet of a motor such that the first wiring portions form an angle that is substantially perpendicular to a rotation direction of the motor.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: March 22, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Haruhiko Morita, Hitoshi Miwa, Shinobu Kato, Toshihiko Yokomaku, Hisashi Kato, Takahisa Hirasawa, Tetsuya Muraki, Takayuki Furuno
  • Publication number: 20220084938
    Abstract: A semiconductor memory device according to an embodiment includes a substrate, conductive layers, pillars, and contacts. The substrate includes first and second areas, and block areas. The conductive layers are divided for each of the block areas. The conductive layers includes terraced portions. The contacts are respectively provided on the terraced portions for each of the block areas. The second area includes a first sub area and a second sub area. The first sub area includes a first stepped structure. The second sub area includes a second stepped structure and a first pattern. The first pattern is continuous with any one of the conductive layers. The first pattern is arranged between the first stepped structure and the second stepped structure.
    Type: Application
    Filed: March 15, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventor: Hisashi KATO
  • Publication number: 20220078912
    Abstract: A coil substrate includes a flexible substrate having a first end and a second end on the opposite side with respect to the first end, and coils formed on the flexible substrate such that the coils are positioned substantially in a row between the first end and second end of the flexible substrate. The coils are formed such that the number of coils is K and that the coils include the first coil positioned close to the first end and the K-th coil positioned to form a predetermined distance between the K-th coil and the second end, where K is an integer equal to or greater than 2.
    Type: Application
    Filed: August 24, 2021
    Publication date: March 10, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Publication number: 20220069657
    Abstract: A coil substrate includes a flexible substrate having a first end and a second end on the opposite side with respect to the first end, and coils formed on the flexible substrate in substantially one row between the first end and the second end of the flexible substrate such that each of the coils has a center space and wirings surrounding the center space. The wirings in each of the coils include parallel wirings formed substantially parallel to a row direction extending from the first end toward the second end and perpendicular wirings formed substantially perpendicular to the row direction, and the coils are formed such that a thickness of the perpendicular wirings is greater than a thickness of the parallel wirings.
    Type: Application
    Filed: August 20, 2021
    Publication date: March 3, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Patent number: 11264855
    Abstract: A coil substrate includes a flexible substrate, and a coil including a wiring and formed on the flexible substrate. The flexible substrate has a cut penetrating through the flexible substrate such that the cut is formed to extend along a portion of the coil.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: March 1, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Haruhiko Morita, Hitoshi Miwa, Shinobu Kato, Toshihiko Yokomaku, Hisashi Kato, Takahisa Hirasawa, Tetsuya Muraki, Takayuki Furuno
  • Publication number: 20220060074
    Abstract: A coil substrate includes a flexible substrate, and coils formed on the flexible substrate such that the coils are positioned substantially in a raw and that each coil has a center space and wirings surrounding the center space. The coils are formed such that each coil includes first wirings on a first surface of the flexible substrate, second wirings on a second surface of the flexible substrate on the opposite side with respect to the first surface, and via conductors penetrating through the flexible substrate and connecting the first and second wirings, and the coils are positioned such that a m-th coil has the second wirings positioned below the center space of a (m+1)-th coil and that a (m+2)-th coil has the first coils positioned on the center space of a (m+1)-th coil, where in is an integer equal to or greater than 1.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 24, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Publication number: 20220020769
    Abstract: A method of producing a semiconductor memory device includes, when three directions crossing each other are set to first, second, and third directions, respectively, laminating a plurality of first laminates and a plurality of second laminates on a semiconductor substrate in the third direction. The method further includes forming ends of the plurality of first laminates in shapes of steps extending in the first direction, and forming ends of the plurality of second laminates in shapes of steps extending in both directions of the first direction and the second direction.
    Type: Application
    Filed: October 1, 2021
    Publication date: January 20, 2022
    Applicant: Toshiba Memory Corporation
    Inventors: Tadashi Iguchi, Murato Kawai, Toru Matsuda, Hisashi Kato, Megumi Ishiduki
  • Publication number: 20220021262
    Abstract: A motor coil substrate includes a flexible substrate, and coils formed on the flexible substrate. The flexible substrate is wound N times where N is 2 or larger, the coils are formed in a multiple of 3, the flexible substrate includes a first flexible substrate and a second flexible substrate extending from the first flexible substrate and wound around the first flexible substrate, the flexible substrate has a first end and a second end on an opposite side with respect to the first end such that the first flexible substrate has a first end of the flexible substrate, the second flexible substrate is positioned on an outer side of the first flexible substrate, and the coils are formed such that a coil or coils formed on the first flexible substrate partially overlap with a coil or coils formed on the second flexible substrate.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 20, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Haruhiko MORITA, Hitoshi MIWA, Shinobu KATO, Toshihiko YOKOMAKU, Hisashi KATO, Takahisa HIRASAWA, Tetsuya MURAKI, Takayuki FURUNO
  • Patent number: 11201515
    Abstract: A motor coil substrate includes a flexible substrate, and multiple coils formed on the flexible substrate such that each of the coils has a spiral shape. The flexible substrate has multiple folding lines formed and the multiple coils positioned such that the flexible substrate is folded at the folding lines and wound around a magnet and that an m-th coil and an (m+1)-th coil of the coils partially overlap one another when folded at the folding lines.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: December 14, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Haruhiko Morita, Hitoshi Miwa, Shinobu Kato, Toshihiko Yokomaku, Hisashi Kato, Takahisa Hirasawa, Tetsuya Muraki, Takayuki Furuno
  • Publication number: 20210384214
    Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 9, 2021
    Applicant: Toshiba Memory Corporation
    Inventors: Takuya INATSUKA, Tadashi IGUCHI, Murato KAWAI, Hisashi KATO, Megumi ISHIDUKI
  • Patent number: 11152391
    Abstract: A method of producing a semiconductor memory device includes, when three directions crossing each other are set to first, second, and third directions, respectively, laminating a plurality of first laminates and a plurality of second laminates on a semiconductor substrate in the third direction. The method further includes forming ends of the plurality of first laminates in shapes of steps extending in the first direction, and forming ends of the plurality of second laminates in shapes of steps extending in both directions of the first direction and the second direction.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: October 19, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Tadashi Iguchi, Murato Kawai, Toru Matsuda, Hisashi Kato, Megumi Ishiduki
  • Patent number: 11143695
    Abstract: An inspection device is provided, which is capable of detecting a short circuit failure even when a connector is provided on a wiring board. The inspection device is configured to inspect a short circuit failure generated at any connected part of a plurality of pins 153 to a wiring board via solder. The plurality of pins 153 is included in a connector provided on the wiring board. The inspection device includes: a wiring 11 connected to certain pins 153 of the plurality of pins 153; a second wiring 12 connected to remaining pins 153 of the plurality of pins 153; and a tester unit connected to the first wiring 11 and to the second wiring 12 so as to inspect insulation between the certain pins 153 and the remaining pins 153.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: October 12, 2021
    Assignee: DENSO CORPORATION
    Inventor: Hisashi Kato
  • Patent number: 11127750
    Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: September 21, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takuya Inatsuka, Tadashi Iguchi, Murato Kawai, Hisashi Kato, Megumi Ishiduki