Patents by Inventor Ho-Jin Lee

Ho-Jin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150170579
    Abstract: A device for driving a light-emitting diode, a light-emitting device, and a display device are disclosed. The disclosed light-emitting diode driving device may include: a first transistor having a first conductive electrode connected with a source voltage terminal and having a second conductive electrode connected with an input terminal of the light-emitting diode; a second transistor having a control electrode connected with the second conductive electrode of the first transistor; and a capacitor having one end connected with a data voltage terminal and having the other end connected with a first node, which is connected with a control electrode of the first transistor and with a first conductive electrode of the second transistor.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 18, 2015
    Inventors: Ho-Jin Lee, Yong-Chan Kim, Sung-Young Seo
  • Patent number: 9053521
    Abstract: An image processing apparatus is provided. The image processing apparatus for image signal processor (ISP) realization may include a Static Random Access Memory (SRAM) for each function module. A unified SRAM to store at least one line data of an input image for each of a plurality of functions modules within the image processing apparatus is further provided.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: June 9, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Sun Jeon, Ho Jin Lee, Joon Hyuk Cha, Shi Hwa Lee, Young Su Moon, Hyun Sang Park
  • Publication number: 20150137326
    Abstract: A semiconductor device includes a semiconductor substrate having a top surface and a bottom surface facing each other, an interlayer dielectric layer provided on the top surface of the semiconductor substrate and including an integrated circuit, an inter-metal dielectric layer provided on the interlayer dielectric layer and including at least one metal interconnection electrically connected to the integrated circuit, an upper dielectric layer disposed on the inter-metal dielectric layer, a through-electrode penetrating the inter-metal dielectric layer, the interlayer dielectric layer, and the semiconductor substrate, a via-dielectric layer surrounding the through-electrode and electrically insulating the through-electrode from the semiconductor substrate. The via-dielectric layer includes one or more air-gaps between the upper dielectric layer and the interlayer dielectric layer.
    Type: Application
    Filed: August 19, 2014
    Publication date: May 21, 2015
    Inventors: Pil-Kyu KANG, Byung Lyul PARK, SungHee KANG, TAESEONG KIM, TAEYEONG KIM, KWANGJIN MOON, Jae-Hwa PARK, SUKCHUL BANG, Seongmin SON, JIN HO AN, Ho-Jin LEE, JEONGGI JIN
  • Patent number: 9025089
    Abstract: A touch panel device in which a support portion is provided to include an actuator for generating vibration giving an excellent sense of touch without the need for a separate mounting space. To this end, the touch panel device having a front cover portion, a touch sensor unit divided into an upper transparent electrode layer and a lower transparent electrode layer, and a substrate provided under the touch sensor portion includes an actuator for delivering vibration to the front cover portion, a reinforcing portion having the actuator attached thereto to attach the actuator to the touch sensor unit, and a support portion formed on the substrate to provide an opening in a first side thereof and a closed second side, such that the actuator is inserted into and coupled to the opening and the support portion supports the actuator to deliver the vibration of the actuator to the front cover portion.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ho-Jin Lee
  • Publication number: 20150093896
    Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Inventors: Kyu-Ha Lee, Ho-Jin Lee, Pil-Kyu Kang, Byung Lyul Park, Hyunsoo Chung, Gilheyun Choi
  • Publication number: 20150054013
    Abstract: A light emitting device module including a first and second lead frames, a light emitting device electrically connected to the first and second lead frames, the light emitting device includes a light emitting structure having a first conduction type semiconductor layer, an active layer, and a second conduction type semiconductor layer, a resin layer surrounding the light emitting device, a PSR (photo solder resist) layer disposed between the first and second lead frames and the second lead frame and a sidewall disposed at the peripheral area of the light emitting device and including an inclined plane formed on at least one side surface thereof.
    Type: Application
    Filed: October 2, 2014
    Publication date: February 26, 2015
    Applicant: LG Innotek Co., Ltd.
    Inventors: Jun Seok PARK, Ho Jin LEE
  • Patent number: 8952543
    Abstract: A semiconductor device including a lower layer, an insulating layer on a first side of the lower layer, an interconnection structure in the insulating layer, a via structure in the lower layer. The via structure protrudes into the insulating layer and the interconnection structure.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: February 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Jin Lee, Pil-Kyu Kang, Kyu-Ha Lee, Byung-Lyul Park, Hyun-Soo Chung, Gil-Heyun Choi
  • Patent number: 8941216
    Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: January 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Ha Lee, Ho-Jin Lee, Pil-Kyu Kang, Byung Lyul Park, Hyunsoo Chung, Gilheyun Choi
  • Patent number: 8933561
    Abstract: Provided is a semiconductor device. The semiconductor device may include a first semiconductor chip that includes a first through silicon via having a first protrusion height and a second through silicon via having a second protrusion height greater than the first protrusion height which are penetrating at least a portion of the first semiconductor chip, a second semiconductor chip may be electrically connected to the first through silicon via, and a third semiconductor chip may be electrically connected to the second through silicon via.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: SeYoung Jeong, Hogeon Song, Chungsun Lee, Ho-Jin Lee
  • Patent number: 8927426
    Abstract: Semiconductor devices having through-vias and methods for fabricating the same are described. The method may include forming a hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a sacrificial layer partially filling the hole, forming a through-via in the hole partially filled with the sacrificial layer, forming a via-insulating layer between the through-via and the substrate, and exposing the through-via through a bottom surface of the substrate. Forming the sacrificial layer may include forming an insulating flowable layer on the substrate, and constricting the insulating flowable layer to form a solidified flowable layer.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Jin Lee, Pil-Kyu Kang, Kyu-Ha Lee, Gilheyun Choi, YongSoon Choi, Byung Lyul Park, Hyunsoo Chung
  • Patent number: 8878215
    Abstract: Disclosed is a light emitting device module. The light emitting device module includes a first lead frame and a second lead frame electrically separated from each other, a light emitting device electrically connected to the first lead frame and the second lead frame, the light emitting device includes a light emitting structure having a first conduction type semiconductor layer, an active layer, and a second conduction type semiconductor layer, a dam disposed at the peripheral area of the light emitting device, a resin layer surrounding the light emitting device and disposed at the inner area of the dam, and a reflective member disposed at the peripheral area of the dam and including an inclined plane formed on at least one side surface thereof.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: November 4, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jun Seok Park, Ho Jin Lee
  • Publication number: 20140217322
    Abstract: A lithium-ion capacitor includes a non-aqueous electrolyte solution that includes (A) a compound represented by the following general formula (1), (B) a cyclic carbonate ester that includes at least one carbon-carbon unsaturated bond, and (C) a carboxylic ester, the non-aqueous electrolyte solution having a ratio (MB/MC) of 0.001 to 0.5, the ratio (MB/MC) being the ratio of the content (MB) (mmol/g) of the cyclic carbonate ester (B) to the content (MC) (mmol/g) of the carboxylic ester (C). Z+.[X(CN)m(Y)n]???(1) wherein X is at least one element selected from boron, aluminum, silicon, phosphorus, and arsenic, Y is a halogen, Z is lithium or magnesium, m is an integer from 3 to 6, and n is an integer from 0 to 5, provided that m+n?3.
    Type: Application
    Filed: January 17, 2012
    Publication date: August 7, 2014
    Applicant: JSR CORPORATION
    Inventors: Kinji Yamada, Ho-Jin Lee, Toshimitsu Kikuchi, Taisuke Kasahara, Hiromoto Katsuyama
  • Publication number: 20140200034
    Abstract: A method and apparatus for providing positional information using wireless fidelity (WiFi) information is provided. A method of providing positional information at a mobile terminal may include collecting WiFi access point (AP) information by scanning for a WiFi AP in a vicinity of the mobile terminal, extracting facility information associated with a facility associated with the WiFi AP, and determining the positional information of the mobile terminal based on the extracted facility information.
    Type: Application
    Filed: November 21, 2013
    Publication date: July 17, 2014
    Applicant: NAVER BUSINESS PLATFORM CORP.
    Inventors: Ho Jin LEE, Eun Yong CHEONG, Byung-Jo KIM, Byeongryeol SIM, Jaewook YOO
  • Publication number: 20140124901
    Abstract: Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode.
    Type: Application
    Filed: January 13, 2014
    Publication date: May 8, 2014
    Inventors: Ho-jin Lee, Kang-wook Lee, Myeong-soon Park, Ju-iI Choi, Son-kwan Hwang
  • Publication number: 20140110894
    Abstract: A wafer carrier includes a base having a cavity provided at the center of the base and an outer sidewall extending along and away from an edge of the base to define the cavity. The cavity is configured to be filled with an adhesive layer. The wafer carrier is configured to be bonded to a wafer with an adhesive layer in the cavity of base such that the outer sidewall faces and is in contact with an edge of the wafer and the cavity faces a center of the wafer.
    Type: Application
    Filed: August 12, 2013
    Publication date: April 24, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ho-Jin Lee, Pil-kyu Kang, Taeyeong Kim, Byung Lyul Park, Kyu-Ha Lee, Gilheyun Choi
  • Patent number: 8678438
    Abstract: A seat belt apparatus for a vehicle including an anchor metal plate coupled with a vehicle body by a fastening bolt to extensively support a seat belt and upper and lower covers to receive the anchor metal plate. A contact rib is formed on at least one side portion of the inner surface of the upper cover, and a sidewall is formed on a side portion of the lower cover to make contact with the contact rib. An arc-type rib is formed on the bottom plate of the lower cover corresponding to an outer peripheral portion of at least one side portion of the base portion of the anchor metal plate, and a connection rib is formed between the arc-type rib and the sidewall. An arc-type slot is formed on the bottom plate of the lower cover.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 25, 2014
    Assignee: Autoliv Development AB
    Inventors: Byoung-Gae You, Sung-Suk Ko, Ho-Jin Lee
  • Publication number: 20140077462
    Abstract: Disclosed is an integrated fluorine gasket manufactured by injection molding for hydrogen fuel cells. In particular, a fluorine compound having a fluorine content of about 60 to 75 parts by weight based on 100 parts by weight of a fluoroelastomer is disposed in a gasket. The resulting fluorine gasket is integrated with a thin bipolar plate having a thickness of about 200 ?m or less to have a thickness of about 750 ?m or less by injection molding on the thin bipolar plate and by cross-linking.
    Type: Application
    Filed: December 14, 2012
    Publication date: March 20, 2014
    Applicants: HYUNDAI MOTOR COMPANY, E.I. DU PONT DE NEMOURS AND COMPANY, DONGA MANUFACTURING CORP.
    Inventors: Bo Ki Hong, Byeong Heon Jeong, Seung Kyung Ko, Stephen Bowers, Ho Jin Lee, Yoon Gue Choi
  • Patent number: 8665771
    Abstract: Disclosed is a communication method of a satellite mobile communication system. The communication method of a satellite mobile communication system, includes: receiving system information indicating frame intervals in which first user equipments using a satellite radio interface in commonality with a terrestrial radio interface do not perform communications from a base station; accessing the base station in the rest frame intervals other than frame intervals in which the first user equipments do not perform communications, based on the system information; transmitting the system information from the base station to second user equipments using a satellite radio interface optimized for satellite environment; and accessing the base station in the rest frame intervals based on the system information received in the second user equipments.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: March 4, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung Hyun Nam, Hee Wook Kim, Kun Seok Kang, Do Seob Ahn, Ho Jin Lee
  • Publication number: 20140057430
    Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
    Type: Application
    Filed: November 5, 2013
    Publication date: February 27, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ho-Jin LEE, Tae-Je CHO, Dong-Hyeon JANG, Ho-Geon SONG, Se-Young JEONG, Un-Byoung KANG, Min-Seung YOON
  • Publication number: 20140048952
    Abstract: Semiconductor device including through via structure and redistribution structures is provided. The semiconductor device may include internal circuits on a first side of a substrate, a through via structure vertically penetrating the substrate to be electrically connected to one of the internal circuits, a redistribution structure on a second side of the substrate and electrically connected to the through via structure, and an insulating layer between the second side of the substrate and the redistribution structure. The redistribution structure may include a redistribution barrier layer and a redistribution metal layer, and the redistribution barrier layer may extend on a bottom surface of the redistribution metal layer and may partially surround a side of the redistribution metal layer.
    Type: Application
    Filed: July 17, 2013
    Publication date: February 20, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Ha Lee, Pil-Kyu Kang, Tae-Yeong Kim, Ho-Jin Lee, Byung-Lyul Park, Gil-Heyun Choi