Patents by Inventor Ho-Jin Lee

Ho-Jin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9633606
    Abstract: A device for driving a light-emitting diode, a light-emitting device, and a display device are disclosed. The disclosed light-emitting diode driving device may include: a first transistor having a first conductive electrode connected with a source voltage terminal and having a second conductive electrode connected with an input terminal of the light-emitting diode; a second transistor having a control electrode connected with the second conductive electrode of the first transistor; and a capacitor having one end connected with a data voltage terminal and having the other end connected with a first node, which is connected with a control electrode of the first transistor and with a first conductive electrode of the second transistor.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: April 25, 2017
    Assignee: Foundation of Soongsil University-Industry Cooperation
    Inventors: Ho-Jin Lee, Yong-Chan Kim, Sung-Young Seo
  • Publication number: 20170110445
    Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.
    Type: Application
    Filed: December 27, 2016
    Publication date: April 20, 2017
    Inventors: PIL-KYU KANG, Byung Lyul Park, Taeyeong Kim, Yeun-Sang Park, Dosun Lee, Ho-Jin Lee, Jinho Chun, JU-IL CHOI, Yi Koan Hong
  • Publication number: 20170086164
    Abstract: Disclosed is a location information determining method and system for providing a variety of services based on a location. The location information determining method includes receiving cell information; and determining location information that matches the cell information as location information of a mobile terminal from a location information database that stores location information that matches a plurality of pieces of cell information, respectively.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Applicant: NAVER Business Platform Corp.
    Inventors: Weongi PARK, Ho Jin Lee, Jaewook Yoo, Eun Yong Cheong, Byeong-Ryeol Sim, Byung-Jo Kim
  • Patent number: 9583373
    Abstract: A wafer carrier includes a base having a cavity provided at the center of the base and an outer sidewall extending along and away from an edge of the base to define the cavity. The cavity is configured to be filled with an adhesive layer. The wafer carrier is configured to be bonded to a wafer with an adhesive layer in the cavity of base such that the outer sidewall faces and is in contact with an edge of the wafer and the cavity faces a center of the wafer.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Jin Lee, Pil-kyu Kang, Taeyeong Kim, Byung Lyul Park, Kyu-Ha Lee, Gilheyun Choi
  • Publication number: 20170053872
    Abstract: Integrated circuit (IC) devices are provided including a substrate having a first sidewall defining a first through hole that is a portion of a through-silicon via (TSV) space, an interlayer insulating layer having a second sidewall and a protrusion, wherein the second sidewall defines a second through hole providing another portion of the TSV space and communicating with the first through hole, and the protrusion protrudes toward the inside of the TSV space and defines an undercut region in the first through hole, a TSV structure penetrating the substrate and the interlayer insulating layer and extending through the first through hole and the second through hole, and a via insulating layer surrounding the TSV structure in the first through hole and the second through hole.
    Type: Application
    Filed: August 12, 2016
    Publication date: February 23, 2017
    Inventors: Ho-jin Lee, Byung-lyul Park, Jin-ho An
  • Publication number: 20170047270
    Abstract: Provided herein are semiconductor devices with through electrodes and methods of fabricating the same. The methods may include providing a semiconductor substrate having top and bottom surfaces facing each other, forming on the top surface of the semiconductor substrate a main via having a hollow cylindrical structure and a metal line connected to the main via, forming an interlayered insulating layer on the top surface of the semiconductor substrate to cover the main via and the metal line, removing a portion of the semiconductor substrate to form a via hole exposing a portion of a bottom surface of the main via, and forming in the via hole a through electrode that is electrically connected to the main via. The bottom surface of the main via is overlapped by a circumference of the via hole, when viewed in a plan view.
    Type: Application
    Filed: July 7, 2016
    Publication date: February 16, 2017
    Inventors: Ho-Jin Lee, Byung Lyul Park, Kwangjin Moon, Jisoon Park, Jin Ho An
  • Publication number: 20170018845
    Abstract: An antenna apparatus includes: a first antenna part configured to transmit and receive signals in a first frequency band; a coupling part connected to the first antenna part; and a second antenna part connected to the coupling part and configured to transmit and receive signals in a second frequency band different from the first frequency band, wherein the second antenna part encloses surfaces of a three-dimensional shape together with the first antenna part and the coupling part.
    Type: Application
    Filed: April 25, 2016
    Publication date: January 19, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Jin LEE, Jong Yun KIM
  • Patent number: 9530706
    Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: December 27, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Byung Lyul Park, Taeyeong Kim, Yeun-Sang Park, Dosun Lee, Ho-Jin Lee, Jinho Chun, Ju-il Choi, Yi Koan Hong
  • Publication number: 20160301145
    Abstract: An antenna apparatus includes, a substrate, a first antenna pattern extending from the substrate in a lateral direction and configured to transmit and receive first communications signals, and a second antenna pattern spaced apart from the first antenna pattern, extending from the substrate in another lateral direction, and configured to transmit and receive second communications signals.
    Type: Application
    Filed: March 21, 2016
    Publication date: October 13, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Jin LEE, Hee Jun PARK, Jong Yun KIM
  • Publication number: 20160268182
    Abstract: A semiconductor device includes a semiconductor substrate, a circuit layer including an interlayer insulating layer on an upper surface of the substrate, and a conductive via penetrating through the interlayer insulating layer and the substrate, and electrically connected to the circuit layer. The device further includes an insulating layer surrounding the conductive via, and located between the conductive via and the substrate and between the conductive via and interlayer insulating layer, and a buffer layer located between the insulating layer and the conductive via, and overlapping at least a portion of the interlayer insulating layer in a depth direction of the conductive via.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 15, 2016
    Inventors: HO-JIN LEE, BYUNG LYUL PARK, JIN HO AN
  • Publication number: 20160233155
    Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
    Type: Application
    Filed: April 15, 2016
    Publication date: August 11, 2016
    Inventors: Ho-Jin LEE, Tae-Je CHO, Dong-Hyeon JANG, Ho-Geon SONG, Se-Young JEONG, Un-Byoung KANG, Min-Seung YOON
  • Patent number: 9392029
    Abstract: Disclosed are the examples of an interworking system and related methods. The interworking system can be configured to implement a session initiation protocol (SIP) message routing method that may include checking a transmitting subject and a transmission method of a SIP message, applying a network address translation based on the checked message's transmitting subject and its transmission method, and specifying the address of the node selected based on the checked message's transmitting subject in routing path information.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: July 12, 2016
    Assignee: KT Corporation
    Inventors: Jang-won Lee, Ho-Jin Lee, Sang-Man Bak
  • Publication number: 20160198305
    Abstract: A method and apparatus for providing positional information using wireless fidelity (WiFi) information is provided. A method of providing positional information at a mobile terminal may include collecting WiFi access point (AP) information by scanning for a WiFi AP in a vicinity of the mobile terminal, extracting facility information associated with a facility associated with the WiFi AP, and determining the positional information of the mobile terminal based on the extracted facility information.
    Type: Application
    Filed: March 11, 2016
    Publication date: July 7, 2016
    Inventors: Ho-Jin LEE, Eun Yong CHEONG, Byung-Jo KIM, Byeongryeol SIM, Jaewook YOO
  • Publication number: 20160192140
    Abstract: Provided is a method and/or apparatus for providing a wireless location service using a beacon signal. A wireless location service method may include collecting a plurality of beacon signals from each of a plurality of beacon transceivers positioned around a user, and determining a current location of the user based on at least one of a virtual point and the plurality of beacon signals, the virtual point positioned in a space in which the beacon transceivers are provided.
    Type: Application
    Filed: November 12, 2015
    Publication date: June 30, 2016
    Inventors: Weongi PARK, Ho Jin LEE, Hyang Sub LIM, Daewoong KIM
  • Publication number: 20160192141
    Abstract: Provided is a location based service providing method and system for automatically changing a setting of a mobile terminal based on a location of the mobile terminal determined based on cell information. A location based service providing method performed by a location based service providing system may include receiving information for verifying a location of a mobile terminal from the mobile terminal, determining location information that matches the information in a location information database as a current location of the mobile terminal, and changing a setting of the mobile terminal to be a user setting in response to the current location of the mobile terminal corresponding to a location registered in advance to apply the user setting.
    Type: Application
    Filed: November 12, 2015
    Publication date: June 30, 2016
    Inventors: Weongi PARK, Ho Jin Lee, Jaewook Yoo, Eun Yong Cheong, Byeong-Ryeol Sim, Byung-Jo Kim, Junghoon Kim, Sungpil Choi
  • Patent number: 9376420
    Abstract: The present invention provides a 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt, a process for the preparation thereof, and a pharmaceutical composition comprising the same. The 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt effectively increases the LXR transcriptional activity, and therefore can be usefully applied for preventing or treating a dysfunction in cholesterol metabolism, such as cholesterol gallstone, hyperlipidemia, or coronary atherosclerosis.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: June 28, 2016
    Assignee: YUHAN CORPORATION
    Inventors: Chan-Sun Park, Young-Hwan Kim, Gyu-Jin Lee, Youn Hur, Eun-Hye Jung, Hee-Jae Tak, Seung-Yub Shin, Ho-Jin Lee, Chun-Ho Lee, Koo-Yeon Lee
  • Patent number: 9374663
    Abstract: A method and apparatus for providing positional information using wireless network information is provided. A method of providing positional information at a mobile terminal may include collecting WI-FI access point (AP) information by scanning for a WI-FI AP in a vicinity of the mobile terminal, extracting facility information associated with a facility associated with the WI-FI AP, and determining the positional information of the mobile terminal based on the extracted facility information.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: June 21, 2016
    Assignee: Naver Business Platform Corp.
    Inventors: Ho Jin Lee, Eun Yong Cheong, Byung-Jo Kim, Byeongryeol Sim, Jaewook Yoo
  • Publication number: 20160163590
    Abstract: Disclosed is a method of manufacturing a semiconductor device. A preliminary wafer-carrier assembly is formed in such a way that a wafer structure having a plurality of via structures is adhered to a light-penetrating carrier by a photodegradable adhesive. A wafer-carrier assembly having an optical shielding layer for inhibiting or preventing a light penetration is formed such that the wafer structure, the carrier and the adhesive are covered with the optical shielding layer except for the backside of the wafer structure through which the via structures are exposed. An interconnector is formed on the backside of the wafer structure such that the via structures make contact with the interconnector, and the wafer structure and the carrier are separated from each other by irradiating a light to the wafer-carrier assembly. Accordingly, the adhesive is inhibited or prevented from being dissolved during a plasma process on the wafer-carrier assembly.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 9, 2016
    Inventors: Deokyoung Jung, Seong-Min Son, Jin-Ho An, Byung-Lyul Park, Ji-Soon Park, Ho-Jin Lee
  • Patent number: 9362172
    Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: June 7, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Ha Lee, Ho-Jin Lee, Pil-Kyu Kang, Byung Lyul Park, Hyunsoo Chung, Gilheyun Choi
  • Publication number: 20160155686
    Abstract: Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Ho-Jin LEE, Byunglyul PARK, Jisoon PARK, Jinho AN