Abstract: A method and apparatus for providing positional information using wireless fidelity (WiFi) information is provided. A method of providing positional information at a mobile terminal may include collecting WiFi access point (AP) information by scanning for a WiFi AP in a vicinity of the mobile terminal, extracting facility information associated with a facility associated with the WiFi AP, and determining the positional information of the mobile terminal based on the extracted facility information.

Abstract: Provided is a method and/or apparatus for providing a wireless location service using a beacon signal. A wireless location service method may include collecting a plurality of beacon signals from each of a plurality of beacon transceivers positioned around a user, and determining a current location of the user based on at least one of a virtual point and the plurality of beacon signals, the virtual point positioned in a space in which the beacon transceivers are provided.

Abstract: Provided is a location based service providing method and system for automatically changing a setting of a mobile terminal based on a location of the mobile terminal determined based on cell information. A location based service providing method performed by a location based service providing system may include receiving information for verifying a location of a mobile terminal from the mobile terminal, determining location information that matches the information in a location information database as a current location of the mobile terminal, and changing a setting of the mobile terminal to be a user setting in response to the current location of the mobile terminal corresponding to a location registered in advance to apply the user setting.

Abstract: The present invention provides a 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt, a process for the preparation thereof, and a pharmaceutical composition comprising the same. The 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt effectively increases the LXR transcriptional activity, and therefore can be usefully applied for preventing or treating a dysfunction in cholesterol metabolism, such as cholesterol gallstone, hyperlipidemia, or coronary atherosclerosis.

Abstract: A method and apparatus for providing positional information using wireless network information is provided. A method of providing positional information at a mobile terminal may include collecting WI-FI access point (AP) information by scanning for a WI-FI AP in a vicinity of the mobile terminal, extracting facility information associated with a facility associated with the WI-FI AP, and determining the positional information of the mobile terminal based on the extracted facility information.

Abstract: Disclosed is a method of manufacturing a semiconductor device. A preliminary wafer-carrier assembly is formed in such a way that a wafer structure having a plurality of via structures is adhered to a light-penetrating carrier by a photodegradable adhesive. A wafer-carrier assembly having an optical shielding layer for inhibiting or preventing a light penetration is formed such that the wafer structure, the carrier and the adhesive are covered with the optical shielding layer except for the backside of the wafer structure through which the via structures are exposed. An interconnector is formed on the backside of the wafer structure such that the via structures make contact with the interconnector, and the wafer structure and the carrier are separated from each other by irradiating a light to the wafer-carrier assembly. Accordingly, the adhesive is inhibited or prevented from being dissolved during a plasma process on the wafer-carrier assembly.

Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.

Abstract: Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.

Abstract: In a method, a first opening is formed in a first insulating interlayer on a first substrate. A first conductive pattern structure contacting a first diffusion prevention insulation pattern and having a planarized top surface is formed in the first opening. Likewise, a second conductive pattern structure contacting a second diffusion prevention insulation pattern is formed in a second insulating interlayer on a second substrate. A plasma treatment process is performed on at least one of the first and second substrates having the first and second conductive pattern structures thereon, respectively. The first and second conductive pattern structures are contacted to each other to bond the first and second substrates.

Abstract: An indoor map constructing apparatus may include an information extractor configured to extract cloud point information from scan information about each point inside a target facility of which an indoor map is to be constructed, and an indoor map constructer configured to construct the indoor map of the target facility based on the cloud point information about each point.

Abstract: A radiator frame having an antenna radiator formed on a surface thereof and a method of manufacturing the same are provided. The radiator frame includes: a radiator including an antenna pattern portion configured to transmit or receive a signal, and a connection terminal portion configured to electrically connect the antenna pattern portion and a circuit board; and a molding frame connected to the radiator such that the antenna pattern portion is exposed at one surface of the molding frame and the connection terminal portion is exposed at another surface of the molding frame opposing the one surface of the molding frame. The connection terminal portion may include a plated layer exposed at the other surface of the molding frame to contact the circuit board.

Abstract: In a method, a first opening is formed in a first insulating interlayer on a first substrate. A first conductive pattern structure contacting a first diffusion prevention insulation pattern and having a planarized top surface is formed in the first opening. Likewise, a second conductive pattern structure contacting a second diffusion prevention insulation pattern is formed in a second insulating interlayer on a second substrate, plasma treatment process is performed on at least one of the first and second substrates having the first and second conductive pattern structures thereon, respectively. The first and second conductive pattern structures are contacted to each other to bond the first and second substrates.

Abstract: Semiconductor device including through via structure and redistribution structures is provided. The semiconductor device may include internal circuits on a first side of a substrate, a through via structure vertically penetrating the substrate to be electrically connected to one of the internal circuits, a redistribution structure on a second side of the substrate and electrically connected to the through via structure, and an insulating layer between the second side of the substrate and the redistribution structure. The redistribution structure may include a redistribution barrier layer and a redistribution metal layer, and the redistribution barrier layer may extend on a bottom surface of the redistribution metal layer and may partially surround a side of the redistribution metal layer.

Abstract: Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode.

Abstract: In one embodiment, the method includes forming a conductive via structure in a base layer. The base layer has a first surface and a second surface, and the second surface is opposite the first surface. The method further includes removing the second surface of the base layer to expose the conductive via structure such that the conductive via structure protrudes from the second surface, and forming a first lower insulating layer over the second surface such that an end surface of the conductive via structure remains exposed by the first lower insulating layer.

Abstract: The present invention provides a 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt, a process for the preparation thereof, and a pharmaceutical composition comprising the same. The 4,5-dihydro-1H-pyrazole derivative or its pharmaceutically acceptable salt effectively increases the LXR transcriptional activity, and therefore can be usefully applied for preventing or treating a dysfunction in cholesterol metabolism, such as cholesterol gallstone, hyperlipidemia, or coronary atherosclerosis.

Abstract: A microelectronic device includes a substrate having a trench extending therethrough between an active surface thereof and an inactive surface thereof opposite the active surface, a conductive via electrode extending through the substrate between sidewalls of the trench, and an insulating layer extending along the inactive surface of the substrate outside the trench and extending at least partially into the trench. The insulating layer defines a gap region in the trench that separates the substrate and the via electrode. Related devices and methods of fabrication are also discussed.

Abstract: A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.

Abstract: A transaction splitting apparatus and method are provided in which neighboring sub-transactions accessing a predetermined bank in each memory may access different banks. The transaction splitting apparatus includes a first processing unit to split a transaction into at least one sub-transaction, the transaction accessing a first bank among a plurality of banks comprised in a memory, and a second processing unit to translate an address of the at least one sub-transaction, to interleave the at least one sub-transaction using the plurality of banks.