Patents by Inventor Hoon Ahn

Hoon Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240050976
    Abstract: The present disclosure relates to a coating die for a lithium secondary battery. The coating die includes an upper die plate, a lower die plate, and a shim assembly interposed between the upper die plate and the lower die plate. The shim assembly includes a body shim and one or more spacer shims, and the spacer shims are formed to be individually removable from the coating die such that the number and position of the spacer shims are adjustable.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 15, 2024
    Applicant: LG Energy Solution, Ltd.
    Inventors: Yoonju Han, Byoung Hoon Ahn, Hyeong Geun Chae, Hyunwoo Choi
  • Publication number: 20240034891
    Abstract: An electrode insulating coating composition according to the present disclosure includes boehmite particles, a dispersant, a binder, and a non-aqueous solvent, wherein the dispersant includes a phenolic compound containing two or more aromatic rings, and is included in an amount of 1.2 to 8.8 parts by weight with respect to 100 parts by weight of the boehmite particles.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 1, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Houng Sik YOO, Dong Hyun KIM, Sung Chul PARK, Sang A CHOI, Seong Keun JANG, Sang Hoon CHOY, Hyeon CHOI, Sung Soo YOON, Byoung Hoon AHN
  • Patent number: 11888133
    Abstract: A battery module cooling structure includes: a battery module fixed to a vehicle body; and a cooling block disposed under the battery module and configured to reduce heat generated by the battery module. The cooling block includes: an upper panel closing an upper portion of the cooling block, the upper panel having corner regions including an inlet hole configured to take in cooling water and an outlet hole configured to discharge the cooling water; a lower panel spaced downward from the upper panel and closing a lower portion of the cooling block; an inlet pipe coupled to an upper portion of the upper panel, and configured to take in the cooling water; and an outlet pipe coupled to the upper portion of the upper panel at a position spaced apart from the inlet pipe, and configured to discharge the cooling water.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: January 30, 2024
    Assignee: Hyundai Mobis Co., Ltd.
    Inventor: Ki Hoon Ahn
  • Patent number: 11876038
    Abstract: A semiconductor device includes a substrate provided with an integrated circuit and a contact, an interlayer dielectric layer covering the integrated circuit and the contact, a through electrode penetrating the substrate and the interlayer dielectric layer, a first intermetal dielectric layer on the interlayer dielectric layer, and first and second wiring patterns in the first intermetal dielectric layer. The first wiring pattern includes a first conductive pattern on the through electrode, and a first via penetrating the first intermetal dielectric layer and connecting the first conductive pattern to the through electrode. The second wiring pattern includes a second conductive pattern on the contact, and a second via penetrating the first intermetal dielectric layer and connecting the second conductive pattern to the contact. A first width in a first direction of the first via is greater than a second width in the first direction of the second via.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: January 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shaofeng Ding, Jeong Hoon Ahn, Yun Ki Choi
  • Publication number: 20240014414
    Abstract: A fuel cell system includes: an oxygen concentration module to produce oxygen-enriched air by separating nitrogen from air, and a first air supply line connected to the oxygen concentration module to supply air to the oxygen concentration module. The fuel cell system further includes: a heating unit provided in the first air supply line to selectively heat air by using waste heat discharged from an external heat source provided outside a fuel cell stack, a second air supply line connected to the oxygen concentration module and configured to supply air to the oxygen concentration module independently of the first air supply line, a cooling unit provided in the second air supply line and configured to selectively cool air by using outside cold energy, and a stack connection line which connects the oxygen concentration module and the fuel cell stack and supplies the oxygen-enriched air to the fuel cell stack.
    Type: Application
    Filed: December 13, 2022
    Publication date: January 11, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Jin Young Park, Hee Sung Yoon, Sang Hoon Ahn, Nam Woo Lee, Tae Woo Kim
  • Publication number: 20240014111
    Abstract: Disclosed are a fan-out packaging device and a method of manufacturing the fan-out packaging device, and more particularly a fan-out packaging device using a bridge, the fan-out packaging device including a bridge formed at one side of a fan-out package having two or more dies integrated therein, at least one trace formed at the bridge, and a connection terminal formed at an end of the trace, the connection terminal being in contact with a contact terminal of the fan-out package, wherein the different dies integrated in the fan-out package are electrically connected to each other via the bridge.
    Type: Application
    Filed: March 15, 2023
    Publication date: January 11, 2024
    Inventors: Byung Joon HAN, Byung Hoon AHN
  • Patent number: 11871553
    Abstract: A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, the intermediate connection layer including a connection pattern electrically connected to the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, the etch stop layer covering a top surface of the connection pattern, and a penetration contact extended from the first metal layer toward a bottom surface of the substrate penetrating the connection region.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shaofeng Ding, Jeong Hoon Ahn, Yun Ki Choi
  • Patent number: 11850626
    Abstract: A die for coating an insulating liquid may include a die body configured to be positioned on a current collector with a certain space and discharge an insulating liquid; and a discharge portion configured to be formed on one surface where the insulating liquid of the die body is discharged, and form a discharge path and a discharge port where the insulating liquid is discharged, wherein the discharge portion includes a first discharge portion positioned at a front region side of a coating direction of the insulating liquid, and a second discharge portion positioned at a rear region side of the coating direction of the insulating liquid, an insulating liquid discharge path is formed between the first discharge portion and the second discharge portion, and an insulating liquid discharge port is formed between an end of the first discharge portion and an end of the second discharge portion.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: December 26, 2023
    Inventors: Chang Hun Lee, Seong Wook Hong, Dong Hun Song, Byoung Hoon Ahn, Chae Gyu Lee, Sang Hoon Choy, Shin Wook Jeon
  • Publication number: 20230395541
    Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.
    Type: Application
    Filed: August 10, 2023
    Publication date: December 7, 2023
    Inventors: Jinho Park, Chin Kim, Yongseung Bang, Jiyeon Baek, Jeong Hoon Ahn
  • Patent number: 11832188
    Abstract: An electronic device is provided. The electronic device includes a first communication circuit, a second communication circuit, a processor configured to be electrically connected with the first communication circuit and the second communication circuit, and a memory configured to be electrically connected with the processor. The memory includes instructions, when executed by the processor, cause the processor to obtain location information of the electronic device, transmit a first message for requesting to change a state of the electronic device to a network, receive a first response message to the transmitted first message from the network, transmit a second message for requesting a parameter for an operation cycle of the second communication circuit to the network, receive a second response message to the second message from the network, and change the operation cycle of the second communication circuit to a value corresponding to a current state of the electronic device.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: November 28, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji Young Cha, Hye Jeong Kim, Jung Hoon Ahn
  • Patent number: 11804459
    Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: October 31, 2023
    Inventors: Jinho Park, Chin Kim, Yongseung Bang, Jiyeon Baek, Jeong Hoon Ahn
  • Patent number: 11798883
    Abstract: A semiconductor device includes an integrated circuit (IC) and an interlayer dielectric layer on the substrate, a contact through the interlayer dielectric layer and electrically connected to the IC, a wiring layer on the interlayer dielectric layer with a wiring line electrically connected to the contact, a first passivation layer on the wiring layer, first and second pads on the first passivation layer, and a through electrode through the substrate, the interlayer dielectric layer, the wiring layer, and the first passivation layer to connect to the first pad. The first pad includes a first head part on the first passivation layer, and a protruding part that extends into the first passivation layer from the first head part, the protruding part surrounding a lateral surface of the through electrode in the first passivation layer, and the second pad is connected to the IC through the wiring line and the contact.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: October 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shaofeng Ding, Jeong Hoon Ahn, Yun Ki Choi
  • Patent number: 11791267
    Abstract: A semiconductor device includes a substrate, a first electrode including a first hole, a first dielectric layer on an upper surface of the first electrode and on an inner surface of the first hole, a second electrode on the first dielectric layer, a second dielectric layer on the second electrode, a third electrode on the second dielectric layer and including a second hole, and a first contact plug extending through the second electrode and the second dielectric layer and extending through the first hole and the second hole. A sidewall of the first contact plug is isolated from direct contact with the sidewall of the first hole and a sidewall of the second hole, and has a step portion located adjacent to an upper surface of the second electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: October 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinho Park, Shaofeng Ding, Yongseung Bang, Jeong Hoon Ahn
  • Publication number: 20230317596
    Abstract: A semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface; an active pattern extending in a first direction on the first surface of the substrate; a first source/drain contact including a first portion connected to a source/drain region of the active pattern, and a second portion extending from the first portion in the first direction or in a second direction intersecting the first direction; a power rail providing a voltage on the second surface of the substrate; a through electrode connected to the power rail and penetrating the substrate; and a landing pad connecting the through electrode and the second portion of the source/drain contact.
    Type: Application
    Filed: February 8, 2023
    Publication date: October 5, 2023
    Inventors: Ji Hyung KIM, Jae Hee OH, Je Gwan HWANG, Jeong Hoon AHN
  • Publication number: 20230314118
    Abstract: Strain sensors are attached to a workpiece, and resistance values of the strain sensors are measured with time while cutting the workpiece with a milling cutting machine. A power spectrum in a frequency domain is obtained by Fourier-transforming the resistance values measured with time. A power peak is found in the power spectrum to be outputted as a magnitude of vibration occurring during machining the workpiece. By attaching a strain sensor to a stamper of a plastic working machine, a resistance value of the strain sensor is measured while pressing a workpiece on a die with the stamper. A magnitude of the strain corresponding to the measured resistance value is used to obtain a corresponding plastic working force. By attaching the strain sensor directly to the workpiece, it is possible to monitor the state of the plastic working and/or cutting process of the workpiece with high precision at low cost.
    Type: Application
    Filed: July 10, 2020
    Publication date: October 5, 2023
    Applicants: Seoul National University R&DB Foundation, Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Sung Hoon AHN, Soohong MIN, Gilyong LEE, Tae Hun LEE, Sang Wook LEE, Daniel ZONTAR
  • Publication number: 20230317539
    Abstract: A semiconductor package includes a circuit board, an interposer structure on the circuit board, a first semiconductor chip and a second semiconductor chip on the interposer structure, the first and the second semiconductor chips electrically connected to the interposer structure and spaced apart from each other, and a mold layer between the first and second semiconductor chips, the mold layer separating the first and second semiconductor chips. A slope of a side wall of the mold layer is constant as the side wall extends away from an upper side of the interposer structure, and an angle defined by a bottom side of the mold layer and the side wall of the mold layer is less than or equal to ninety degrees.
    Type: Application
    Filed: November 15, 2022
    Publication date: October 5, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Bo In NOH, Jeong Hoon AHN, Yun Ki CHOI
  • Patent number: 11772339
    Abstract: Methods and apparatus for automating the fiber laying process during the repair of composite structures made of fiber-reinforced plastic material based on the three-dimensional printing technique. Continuous fiber rovings (e.g., carbon fibers) impregnated with liquid epoxy can be directly printed onto the damaged surface of the composite structure (e.g., an aircraft component made of carbon fiber-reinforced plastic) without human manipulation in an autonomous manner.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: October 3, 2023
    Assignee: The Boeing Company
    Inventors: Jeong-Beom Ihn, Sung-Hoon Ahn, Gil-Yong Lee, Hyung-Soo Kim, Min-Soo Kim, Ho-Jin Kim, Soo-Hong Min
  • Patent number: 11771159
    Abstract: Disclosed are modularized garment manufacturing method and system for small quantity batch production of garments. Basic components constituting an ordered garment are generated by analyzing shape graphic data of the ordered garment. For each basic component, basic patterns are generated for each dimension of the ordered garment. The basic patterns are compared with reference garment patterns stored in a garment pattern database to determine a pattern category of each basic pattern. Based on the pattern category of the basic patterns and information on garment production lines currently in operation, subdivided work modules are determined for each basic pattern.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: October 3, 2023
    Assignees: Hojeon Limited, Seoul National University R&DB Foundation
    Inventors: Young Chul Park, Sung Hoon Ahn, Eun Suk Suh, Sung Min Kim, Seong Cheol Kim, Woo Kyun Jung
  • Patent number: 11764345
    Abstract: Disclosed is a coating apparatus for producing an electrode, which has a reduced defect rate in the coating process. The coating apparatus includes a die unit having an inlet through which the electrode slurry is introduced and an inner space for accommodating the introduced electrode slurry; a shim unit mounted in the die unit and configured to form an outlet together with the die unit so that the electrode slurry is discharged therethrough; and a cover member configured to surround an outer surface of the die unit and the shim unit so that the electrode slurry is not leaked at the outer surface, except for the outlet.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: September 19, 2023
    Inventors: Woo-Ha Kim, In-Seong Kim, Il-Jae Moon, Byoung-Hoon Ahn, Jung-Min Yang, Sang-Hoon Choy
  • Patent number: 11759633
    Abstract: The present disclosure relates to neural electrode technology for measuring a biosignal of a human or applying a neural signal to the human, and a neural electrode assembly includes a body that is inserted into a uterus in a non-invasive manner, a recording neural electrode formed to measure a uterine contraction-evoked neural signal, the recording neural electrode being coupled to the body, and a stimulating neural electrode formed to stimulate a nerve entering the uterus to suppress the uterine contraction, the stimulating neural electrode being coupled to the body.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 19, 2023
    Assignees: Korea University Research and Business Foundation, Korea Institute of Science and Technology
    Inventors: Ki Hoon Ahn, Soo Hyun Lee