Abstract: A semiconductor package is provided. The semiconductor package includes: a first stack including a first semiconductor substrate; a through via that penetrates the first semiconductor substrate in a first direction; a second stack that includes a second face facing a first face of the first stack, on the first stack; a first pad that is in contact with the through via, on the first face of the first stack; a second pad including a concave inner side face that defines an insertion recess, the second pad located on the second face of the second stack; and a bump that connects the first pad and the second pad, wherein the bump includes a first upper bump on the first pad, and a first lower bump between the first upper bump and the first pad.

Abstract: The present invention relates to long-acting insulin analogues having an increased in vivo half-life in which the amino acid at position 22 of the B-chain of native insulin is substituted and one or more amino acids of the A-chain or B-chain of native insulin are additionally substituted, and to long-acting insulin analogue derivatives having a further increased in vivo half-life in which an albumin-binding domain is additionally fused to the long-acting insulin analogues. The insulin analogues or insulin analogue derivatives according to the present invention have a significantly increased in vivo half-life, and thus can provide convenience to diabetic patients who self-administer insulin by injection.

Abstract: Provided is an interposer structure. The interposer structure comprises an interposer substrate, an interlayer insulating film which covers a top surface of the interposer substrate, a capacitor structure in the interlayer insulating film and a wiring structure including a first wiring pattern and a second wiring pattern spaced apart from the first wiring pattern, on the interlayer insulating film, wherein the capacitor structure includes an upper electrode connected to the first wiring pattern, a lower electrode connected to the second wiring pattern, and a capacitor dielectric film between the upper electrode and the lower electrode.

Abstract: The present invention relates to a method for producing an animal model of preterm birth and an animal model of preterm birth produced by the method. The animal model of the present invention can be effectively applied to investigate the causes and symptoms of preterm birth induced by cervical injury. The mortality rate of the animal model according to the present invention is low until preterm birth despite its induced preterm birth. In addition, the animal model of the present invention is produced in a higher yield than any other existing model. Furthermore, the preterm birth of the animal model according to the present invention is induced at a desired time point. Due to these advantages, the animal model of the present invention can be effectively applied to investigate the causes and mechanisms of preterm birth. The mortality rate of premature neonates born from the animal model of the present invention is considerably low and the premature neonates are immature.

Abstract: An electronic device is provided. The electronic device includes a first communication circuit, a second communication circuit, a processor configured to be electrically connected with the first communication circuit and the second communication circuit, and a memory configured to be electrically connected with the processor. The memory includes instructions, when executed by the processor, cause the processor to obtain location information of the electronic device, transmit a first message for requesting to change a state of the electronic device to a network, receive a first response message to the transmitted first message from the network, transmit a second message for requesting a parameter for an operation cycle of the second communication circuit to the network, receive a second response message to the second message from the network, and change the operation cycle of the second communication circuit to a value corresponding to a current state of the electronic device.

Abstract: Provided is a stack molding machine including an upper mold having formed therein a first runner and a first gate serving as a path of a resin material, a first intermediate plate provided under and combined with the upper mold, and having formed therein a first molding connected to the first gate to mold at least a portion on a first substrate placed under the first intermediate plate, a dummy plate provided under and spaced a certain distance apart from the first intermediate plate, a second intermediate plate provided under the dummy plate, and having formed therein a second molding connected to a second gate to mold at least a portion under a second substrate placed under the dummy plate, and a lower mold having formed therein a second runner and the second gate serving as a path of the resin material, and combined with the second intermediate plate.

Abstract: The present invention relates to a novel nicotinamide compound, a method for preparing the same, and a herbicide comprising the compound. The compound of the present invention is useful as a herbicide for foliar treatment or soil treatment because it has high safety for wheat or corn and has excellent herbicidal activity against grassy weeds, sedge weeds or broadleaf weeds.

Abstract: A non-naturally occurring chimeric polypeptide having an activity provided by a TGF-beta family member is disclosed. The chimeric polypeptide of an embodiment comprises two or more domains or fragments from parental TGF-beta proteins operably linked such that the resulting polypeptide is capable of modulating a pathway associated with a TGF-beta family member. In one embodiment, the pathway is a SMAD or DAXX pathway.

Abstract: In a vehicle including a shift-by-wire (SBW) transmission which may be parked in the neutral gear position of the transmission, method for controlling parking thereof includes determining whether the vehicle is in a situation in which neutral parking is required according to sensor information, when the vehicle is stopped, outputting first information configured to get a confirmation on whether a driver intends to perform the neutral parking from the driver, when the controller concludes that the vehicle is in the situation in which the neutral parking is required and when a park (P) gear position is input or an ignition of the vehicle is turned off, and controlling the SBW transmission to shift to a neutral (N) gear position, when there is an agreement input as a response to the first information.

Abstract: A semiconductor device includes an integrated circuit (IC) and an interlayer dielectric layer on the substrate, a contact through the interlayer dielectric layer and electrically connected to the IC, a wiring layer on the interlayer dielectric layer with a wiring line electrically connected to the contact, a first passivation layer on the wiring layer, first and second pads on the first passivation layer, and a through electrode through the substrate, the interlayer dielectric layer, the wiring layer, and the first passivation layer to connect to the first pad. The first pad includes a first head part on the first passivation layer, and a protruding part that extends into the first passivation layer from the first head part, the protruding part surrounding a lateral surface of the through electrode in the first passivation layer, and the second pad is connected to the IC through the wiring line and the contact.

Abstract: A semiconductor device includes a substrate having a first region, a second region, a first buffer region, and a second buffer region. A plurality of conductive lines is disposed on the first region of the substrate. An inductor is disposed on the second region of the substrate, and a dummy pattern is disposed on the first buffer region of the substrate. The first buffer region is provided between the first region and the second region. The second buffer region is provided between the first buffer region and the second region.

Abstract: Provided is a method of fabricating a battery protection circuit package, the method including preparing a complex package substrate obtained by connecting a flexible printed circuit board (PCB) including at least one external connection terminal for connection to an external device, to a rigid PCB for mounting components thereon, mounting the complex package substrate on a lead frame including at least one metal tab for connection to a battery cell, and encapsulating at least portions of the complex package substrate and the lead frame with a molded part while exposing the at least one metal tab and the at least one external connection terminal.

Abstract: A semiconductor device includes a first conductive lower wiring disposed at a first metal level and that extends in a first direction, a first upper wiring structure connected to the first conductive lower wiring and that includes a first conductive upper wiring and a first conductive upper via, where the first conductive upper wiring is disposed at a second metal level higher than the first metal level and extends in a second direction different from the first direction, and a conductive insertion pattern disposed between the first conductive lower wiring and the first upper wiring structure and connected to the first conductive upper via. An upper surface of the conductive insertion pattern has a first width in the first direction, and a bottom surface of the first conductive upper via has a second width in the first direction that is less than the first width.

Abstract: Provided is a method of fabricating a battery protection circuit package, the method including preparing a complex package substrate obtained by connecting a flexible printed circuit board (PCB) including at least one external connection terminal for connection to an external device, to a rigid PCB for mounting components thereon, mounting the complex package substrate on a lead frame including at least one metal tab for connection to a battery cell, and encapsulating at least portions of the complex package substrate and the lead frame with a molded part while exposing the at least one metal tab and the at least one external connection terminal.

Abstract: A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, a through contact below the first metal layer penetrating the connection region, an upper portion of the through contact protruding above the etch stop layer, and a protection insulating pattern on the etch stop layer covering the upper portion of the through contact. The protection insulating pattern covers an upper side surface of the through contact and a top surface of the through contact.

Abstract: A semiconductor device includes a substrate provided with an integrated circuit and a contact, an interlayer dielectric layer covering the integrated circuit and the contact, a through electrode penetrating the substrate and the interlayer dielectric layer, a first intermetal dielectric layer on the interlayer dielectric layer, and first and second wiring patterns in the first intermetal dielectric layer. The first wiring pattern includes a first conductive pattern on the through electrode, and a first via penetrating the first intermetal dielectric layer and connecting the first conductive pattern to the through electrode. The second wiring pattern includes a second conductive pattern on the contact, and a second via penetrating the first intermetal dielectric layer and connecting the second conductive pattern to the contact. A first width in a first direction of the first via is greater than a second width in the first direction of the second via.

Abstract: A semiconductor device includes a semiconductor substrate including a connection region, a pair of epitaxial patterns provided at the semiconductor substrate, a capacitor disposed between the pair of epitaxial patterns, a middle connection layer on the capacitor, an interconnection layer on the middle connection layer, and a through-via provided under the interconnection layer and penetrating the connection region of the semiconductor substrate. The capacitor includes an upper portion of the semiconductor substrate between the pair of epitaxial patterns, a metal electrode on the upper portion of the semiconductor substrate, and a dielectric pattern disposed between the upper portion of the semiconductor substrate and the metal electrode. The through-via is connected to the capacitor through the interconnection layer and the middle connection layer.

Abstract: A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, the intermediate connection layer including a connection pattern electrically connected to the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, the etch stop layer covering a top surface of the connection pattern, and a penetration contact extended from the first metal layer toward a bottom surface of the substrate penetrating the connection region.

Abstract: A battery module cooling structure includes: a battery module fixed to a vehicle body; and a cooling block disposed under the battery module and configured to reduce heat generated by the battery module. The cooling block includes: an upper panel closing an upper portion of the cooling block, the upper panel having corner regions including an inlet hole configured to take in cooling water and an outlet hole configured to discharge the cooling water; a lower panel spaced downward from the upper panel and closing a lower portion of the cooling block; an inlet pipe coupled to an upper portion of the upper panel, and configured to take in the cooling water; and an outlet pipe coupled to the upper portion of the upper panel at a position spaced apart from the inlet pipe, and configured to discharge the cooling water.

Abstract: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.