Abstract: A semiconductor device includes a semiconductor substrate including a chip region and an edge region around the chip region, a lower insulating layer on the semiconductor substrate, a chip pad on the lower insulating layer on the chip region, an upper insulating layer provided on the lower insulating layer to cover the chip pad, the upper and different insulating layers including different materials, and a redistribution chip pad on the chip region and connected to the chip pad. The upper insulating layer includes a first portion on the chip region having a first thickness, a second portion on the edge region having a second thickness, and a third portion on the edge region, the third portion extending from the second portion, spaced from the first portion, and having a decreasing thickness away from the second portion. The second thickness is smaller than the first thickness.

Abstract: Provided is an electronic device including a body part, a glass member disposed on the body part, a display disposed on the glass member, a support part rotatably connected to the body part, a sensor including an eye tracking camera and a front camera configured to capture an image of a front side of a user, and a processor operatively connected to the display and the sensor, wherein the processor is configured to output at least one content via the display, recognize at least one object by the front camera, obtain the user's gaze dwell time for the object by the eye tracking camera, based on the gaze dwell time being longer than or equal to a reference time, obtain an area occupied by the object in a field of view (FOV) of the front camera, based on the area, output the at least one content on a region having no overlap with the object, or reduce a size of the at least one content and output the at least one content on one side of the display, and based on the user's gaze dwell time for the object being less

Abstract: Disclosed is a semiconductor device comprising a peripheral word line disposed on a substrate, a lower dielectric pattern covering the peripheral word line and including a first part that covers a lateral surface of the peripheral word line and a second part that covers a top surface of the peripheral word line, a contact plug on one side of the peripheral word line and penetrating the first and second parts, and a filling pattern in contact with the second part of the lower dielectric pattern and penetrating at least a portion of the second part. The contact plug includes a contact pad disposed on a top surface of the lower dielectric pattern, and a through plug penetrating the first and second parts. The filling pattern surrounds a lateral surface of the contact pad. The first and second parts include the same material.

Abstract: A semiconductor device includes a gate stack including a gate insulating layer and a gate electrode on the gate insulating layer. The gate insulating layer includes a first dielectric layer and a second dielectric layer on the first dielectric layer, and a dielectric constant of the second dielectric layer is greater than a dielectric constant of the first dielectric layer. The semiconductor device also includes a first spacer on a side surface of the gate stack, and a second spacer on the first spacer, wherein the second spacer includes a protruding portion extending from a level lower than a lower surface of the first spacer towards the first dielectric layer, and a dielectric constant of the second spacer is greater than the dielectric constant of the first dielectric layer and less than a dielectric constant of the first spacer.

Abstract: A semiconductor memory device includes; a lower stacked structure including lower metallic lines stacked in a first direction on a substrate, an upper stacked structure including a first upper metallic line and a second upper metallic line sequentially stacked on the lower stacked structure, a vertical structure penetrating the upper stacked structure and lower stacked structure and including a channel film, a connection pad disposed on the vertical structure, contacted with the channel film and doped with N-type impurities, a first cutting line cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, a second cutting line spaced apart from the first cutting line in a second direction different from the first direction, and cutting the lower metallic lines, the first upper metallic line and the second upper metallic line, and sub-cutting lines cutting the first upper metallic line and the second upper metallic line between the first cutting line and the second cuttin

Abstract: Inventive concepts relate to a semiconductor memory device. The semiconductor memory device comprising, a substrate comprising an NMOS region and a PMOS region, a first gate pattern the NMOS region of the substrate, and a second gate pattern disposed on the PMOS region of the substrate. The first gate pattern comprises a first high-k layer, a diffusion mitigation pattern, an N-type work function pattern, and a first gate electrode, which are sequentially stacked on the substrate, the second gate pattern comprises a second high-k layer and a second gate electrode which are sequentially stacked on the substrate, the diffusion mitigation pattern is in contact with the first high-k layer, a stacked structure of the first gate electrode is the same as that of the second gate electrode, and the second gate pattern does not comprise the N-type work function pattern.

Abstract: The present disclosure relates to an organ extracellular matrix-derived scaffold for culture and transplantation of an organoid and a method of preparing the same.

Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a conductive pad on a first surface of the semiconductor substrate, a passivation layer on the first surface of the semiconductor substrate, the passivation layer having a first opening that exposes the conductive pad, an organic dielectric layer on the passivation layer, the organic dielectric layer having a second opening, and a bump structure on the conductive pad and in the first and second openings. The organic dielectric layer includes a material different from a material of the passivation layer. The second opening is spatially connected to the first opening and exposes a portion of the passivation layer. The bump structure includes a pillar pattern in contact with the passivation layer and the organic dielectric layer.

Abstract: Disclosed is a film bulk acoustic resonator (FBAR) type filter including a substrate including two or more cavities on a top surface thereof, a lower electrode formed above the substrate, a piezoelectric layer formed above the lower electrode, two or more upper electrodes formed above the piezoelectric layer, and a package layer including a wall vertically extending while surrounding a periphery of certain areas in which the cavities and the lower electrode are formed and a roof disposed above the wall while being spaced apart from the upper electrodes to seal the certain areas.

Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.

Abstract: A composition for removing edge beads from a metal-containing resist, and a method of forming patterns including step of removing edge beads using the same are provided. The composition for removing edge beads from a metal-containing resist includes an organic solvent, and a heptagonal ring compound substituted with at least one hydroxyl group (—OH). The heptagonal ring compound has at least two double bonds in the ring.

Abstract: A semiconductor device includes a lower insulating film that includes a first and second trenches on a substrate, a first wiring in the first trench, a second wiring in the second trench, a capping insulating film including an insulating recess portion and an insulating liner portion, an upper insulating film on the capping insulating film, and an upper contact that penetrates the capping insulating film and connects to the first wiring, The insulating recess portion is in the second trench and the insulating liner portion extends along an upper surface of the lower insulating film. The upper contact includes a contact recess portion in the first trench, an extended portion connected to the contact recess portion, and a plug portion connected to the extended portion inside the upper insulating film. A width of the extended portion is greater than a width of the plug portion.

Abstract: The method includes forming a first dielectric layer on a substrate, forming a via in the first dielectric layer, sequentially forming a first metal pattern, a first metal oxide pattern, a second metal pattern, and an antireflective pattern on the first dielectric layer, and performing an annealing process to react the first metal oxide pattern and the second metal pattern with each other to form a second metal oxide pattern. The forming the second metal oxide pattern includes forming the second metal oxide pattern by a reaction between a metal element of the second metal pattern and an oxygen element of the first metal oxide pattern.

Abstract: A metal-containing photoresist developer composition, and a method of forming patterns including a step of developing using the same are provided. The metal-containing photoresist developer composition includes an organic solvent, and a heptagonal ring compound substituted with at least one hydroxy group (—OH). The heptagonal ring compound has at least two double bonds in the ring.

Abstract: According to an example embodiment, an electronic device monitors an occurrence of private information from a connected external device and provides, in an expanded screen region, the private information of the external device from which the private information occurs in response to screen expansion.

Abstract: Provided is a nonvolatile memory device. The nonvolatile memory device includes a conductive plate, a barrier conductive film extending along a surface of the conductive plate, a mold structure including a plurality of gate electrodes sequentially stacked on the barrier conductive film, a channel hole penetrating the mold structure to expose the barrier conductive film, an impurity pattern being in contact with the barrier conductive film, and formed in the channel hole, and a semiconductor pattern formed in the channel hole, extending from the impurity pattern along a side surface of the channel hole, and intersecting the plurality of gate electrodes.

Abstract: An electronic device includes first and second touch screen displays and a processor configured to: based on receiving a first touch input on the first touch screen display and a second touch input on the second touch screen display at substantially a same time while displaying a first execution screen in a single window on the first and second touch screen displays, determine whether the first and second touch inputs are a screen split gesture when the first and second touch inputs start within a first boundary area of the first touch screen display and a second boundary area of the second touch screen display, respectively, and are released after moving a distance at substantially the same time; and display the first execution screen in a first split window on the first touch screen display and display a second execution screen in a second split window on the second touch screen display based on the screen split gesture.

Abstract: A semiconductor substrate with oxide single crystal heterostructures, to which a sacrificial layer, an epitaxy functional oxide thin film having a perovskite structure and a metal layer are grown on an oxide single crystal substrate, prepared another metal layer on a semiconductor substrate, and bonded the metal layer of the oxide single crystal substrate to the metal layer of the semiconductor substrate to be face each other, and separated the oxide single crystal substrate by selectively etching and removing only the sacrificial layer after the bonding.

Abstract: Disclosed is a copolymer including a first part including an aromatic vinyl-based monomer and a conjugated diene-based monomer; and a second part including an aromatic vinyl-based monomer and a conjugated diene-based monomer, wherein the content of the aromatic vinyl-based monomer is 35 to 45% by weight based on a total weight of the copolymer, and the copolymer satisfies Equation 1 below: V1>V2??<Equation 1> wherein V1 is a vinyl content in the first part, and V2 is a vinyl content in the second part.