Patents by Inventor Hsiu Chen

Hsiu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10834613
    Abstract: A beam alignment method for an antenna array is provided. In the method, a base station uses multi-modal beam patterns for transmitting several synchronization signals. User equipment scans the synchronization signals, determines a synchronization signal with the strongest received power and a receive beam direction corresponding thereto, and transmits an initial access message including index information indicating the strongest synchronization signal.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: November 10, 2020
    Assignee: National Tsing Hua University
    Inventors: Yuh-Ren Tsai, Wen-Hsiu Chen, Chin-Liang Wang
  • Publication number: 20200350113
    Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 5, 2020
    Inventors: Feng-Lung CHIEN, Tsang-Feng WU, Yuan HAN, Tzu-Chieh KAO, Chien-Hung LIN, Kuang-Lun LEE, Hsiang-Hui HSU, Shu-Yi TSUI, Kuo-Jui LEE, Kun-Ying LEE, Mao-Chun CHEN, Tai-Hsien YU, Wei-Yu CHEN, Yi-Ju LI, Kuei-Yuan CHANG, Wei-Chun LI, Ni-Ni LAI, Sheng-Hao LUO, Heng-Sheng PENG, Yueh-Hui KUAN, Hsiu-Chen LIN, Yan-Bing ZHOU, Chris T. Burket
  • Publication number: 20200294966
    Abstract: The disclosure provides a method of forming a package structure, and the method includes: bonding a die to a wafer; performing a thinning process on the die, wherein the die has a first total thickness variation (TTV) after performing the thinning process; forming a dielectric layer on the wafer to cover sidewalls and a top surface the die; performing a first removal process to remove a first portion of the dielectric layer and expose the top surface of the die; and performing a second removal process to remove a second portion of the dielectric layer and a portion of the die, wherein after performing the second removal process, the die has a second TTV less than the first TTV.
    Type: Application
    Filed: May 31, 2020
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Ebin Liao, Hong-Ye Shih, Wen-Chih Chiou, Jia-Ling Ko
  • Publication number: 20200292796
    Abstract: An optical fingerprint sensing module includes an image sensing device, a light source and a light shielding structure. The image sensing device is configured to sense light transmitted from a fingerprint of a finger on a display panel. The image sensing device includes a light sensing plane having a first geometric center. The light source includes a light emitting plane having a second geometric center. The first geometric center is separated from the second geometric center by a distance from 2 mm to 20 mm. The light shielding structure is disposed between the image sensing device and the light source. In examples, the optical fingerprint sensing module further includes a field angle controller to constrain light pass there through with a field angle of 5-60 degrees. A display device including an optical fingerprint sensing module is disclosed herein as well.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Inventors: Feng-Jung KUO, Min HUANG, Jung-Chung LEE, Chi-Ting CHEN, Li-Yuan CHANG, I-Hsiu CHEN, Chin-Hui HUANG
  • Publication number: 20200286879
    Abstract: A method of manufacturing a semiconductor package structure includes: bonding a die to a wafer; forming a dielectric material layer on the wafer to cover a top surface and sidewalls of the die; performing a removal process to remove a portion of the dielectric material layer, so as to at least expose a portion of the top surface of the die, wherein the dielectric material layer comprises a protruding part over the top surface of the die after performing the removal process; and performing a planarization process to planarize top surfaces of the die and the dielectric material layer, and thereby forming a dielectric layer laterally aside the die.
    Type: Application
    Filed: May 25, 2020
    Publication date: September 10, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Chen-Hua Yu, Ming-Fa Chen, Wen-Chih Chiou
  • Publication number: 20200266267
    Abstract: A metal-oxide-semiconductor (MOS) transistor includes a substrate. The substrate has a plurality of trenches extending along a first direction and located on a top portion of the substrate. A gate structure line is located on the substrate and extends along a second direction intersecting with the first direction and crossing over the trenches. A first doped line is located in the substrate, located at a first side of the gate structure line, and crosses over the trenches. A second doped line is located in the substrate, located at a second side of the gate structure line, and crosses over the trenches.
    Type: Application
    Filed: March 19, 2019
    Publication date: August 20, 2020
    Applicant: United Microelectronics Corp.
    Inventors: HSIANG-HUA HSU, Liang-An Huang, Sheng-Chen Chung, Chen-An Kuo, Chiu-Te Lee, Chih-Chung Wang, Kuang-Hsiu Chen, Ke-Feng Lin, Yan-Huei Li, Kai-Ting Hu
  • Publication number: 20200251166
    Abstract: A circuit to program a programmable memory cell, such as an OTP (One-Time-Programmable) memory cell, by using a current source to output a current to a bit-line of the OTP memory cell, wherein the amount of the current outputted from the current source can be adjusted according to a feedback signal from the OTP memory cell.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 6, 2020
    Inventors: SHIH-HSIU CHEN, WEI-FAN WU, HSUAN-CHI SU, WEI HUAN CHEN, CHING-HSIANG LIN, YUNG-CHIEN LEE, SHUI-SHOU WANG, WEN-HUA YU
  • Publication number: 20200251171
    Abstract: A circuit to program a programmable memory cell, such as an OTP (One-Time-Programmable) memory cell, by using by using an additional conductive path from a bit line (or a source line) to a source line (or a bit line) of the OTP (One-Time-Programmable) memory cell via an internal parasitic diode for programming the OTP memory cell.
    Type: Application
    Filed: May 28, 2019
    Publication date: August 6, 2020
    Inventors: SHIH-HSIU CHEN, WEI-FAN WU, HSUAN-CHI SU, WEI HUAN CHEN, CHING-HSIANG LIN, YUNG-CHIEN LEE, SHUI-SHOU WANG, WEN-HUA YU
  • Publication number: 20200245698
    Abstract: A sensing element has a signaling yarn and a single core wire that is intersecting with the signaling yarn. A sensing control system includes the sensing element, a sensing control module, and a central control module. The sensing control module is configured to output a scanning signal to the sensing element, receive a sensing signal corresponding to the sensing component, and generate a sensing result according to the sensing signal. The central control module is electrically connected to the sensing control module, and is configured to control a component according to the sensing result. Thereby, the sensing element of the application can be manufactured by a simple process and has a relatively small volume, and achieve the sensing operation in conjunction with the sensing control system.
    Type: Application
    Filed: November 5, 2019
    Publication date: August 6, 2020
    Inventors: Shih-Hsiu Chen, Ching-Feng Fan
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20200244782
    Abstract: An operating method of a communication device includes performing a wireless scan procedure by utilizing a radio communication technology to receive advertising data broadcasted by an external device; determining a connection interval corresponding to the external device according to one or more policies stored in the communication device under a condition that at least one of a device name and an address of the advertising data matches the one or more policies; and building a wireless connection with the external device for communication in the connection interval.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Inventors: Kai-Hsiu CHEN, Cheng-Kang LIN, Yao-Te TSAI
  • Patent number: 10700202
    Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
    Type: Grant
    Filed: October 28, 2018
    Date of Patent: June 30, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Kai-Hsiang Wang, Chao-Nan Chen, Shi-You Liu, Chun-Wei Yu, Yu-Ren Wang
  • Publication number: 20200193120
    Abstract: A fingerprint identification apparatus for detecting a fingerprint image of a finger is provided. The fingerprint identification apparatus includes a display, an optical sensor, and a control device. The display is configured to emit light and has a fingerprint imaging area. The control device drives a region of the display at the periphery of the fingerprint imaging area to emit light to the finger when the finger touches the fingerprint imaging area, and the optical sensor is configured to receive light reflected from the finger touching the fingerprint imaging area to determine the fingerprint image of the finger.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventor: I-Hsiu Chen
  • Patent number: 10677490
    Abstract: A compensational control method includes the steps of: controlling a plurality of indoor air conditioning apparatuses to be in operation according to a target temperature; receiving continuously an operating parameter and an environmental datum from each of the indoor air conditioning apparatus; determining whether there is a specific indoor air conditioning apparatus that needs support; acquiring an adjacent indoor air conditioning apparatus which is influential for the specific indoor air conditioning apparatus according to an influence form which is previously built; establishing a supportive strategy according to a supportable operation capability of the adjacent indoor air conditioning apparatus; and adjusting the operating parameter of the adjacent indoor air conditioning apparatus according to the supportive strategy. Therefore, the adjacent indoor air conditioning apparatus is provided to improve an ambient temperature of an area where the specific indoor air conditioning apparatus is installed.
    Type: Grant
    Filed: January 13, 2018
    Date of Patent: June 9, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Tien-Szu Lo, Meng-Seng Chen, Hsiang-Pin Lee, Ying-Hsiu Chen
  • Publication number: 20200176306
    Abstract: Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.
    Type: Application
    Filed: August 21, 2019
    Publication date: June 4, 2020
    Inventors: Yu-Hung Cheng, Pu-Fang Chen, Cheng-Ta Wu, Po-Jung Chiang, Ru-Liang Lee, Victor Y. Lu, Yen-Hsiu Chen, Yeur-Luen Tu, Yu-Lung Yeh, Shi-Chieh Lin
  • Patent number: 10672737
    Abstract: Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 ?m.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Ebin Liao, Hong-Ye Shih, Wen-Chih Chiou, Jia-Ling Ko
  • Patent number: 10665582
    Abstract: A method of manufacturing a semiconductor package structure includes the following steps. A die is bonded to a wafer. A dielectric material layer is formed on the wafer and the die. The dielectric material layer covers a top surface and sidewalls of the die. At least one planarization process is performed to remove a portion of the dielectric material layer and a portion of the die, such that the top surface of the die is exposed and a dielectric layer aside the die is formed. The dielectric layer surrounds and covers the sidewalls of the die.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Chen-Hua Yu, Ming-Fa Chen, Wen-Chih Chiou
  • Patent number: 10659574
    Abstract: An operating method of a communication device includes performing a scan procedure to receive a device name and an address of an external device; determining a connection interval corresponding to the external device according to one or more policies stored in the communication device under a condition that the device name and/or the address match the one or more policies; and building a connection with the external device according to the connection interval and the address of the external device, so that the communication device and the external device communicate corresponding to the connection interval.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: May 19, 2020
    Assignee: HTC Corporation
    Inventors: Kai-Hsiu Chen, Cheng-Kang Lin, Yao-Te Tsai
  • Publication number: 20200151483
    Abstract: An embodiment of the invention provides an optical device including a first substrate, a light source, a second substrate, an image capturing device, a lens module and a lens holder. The light source outputs a first light beam. The second substrate includes a first surface and a second surface opposite to the first surface and closer to the first substrate. A scattered light beam which is generated by the first light beam entering an object touching the first surface of the second substrate and scattered in the object is a second light beam. The image capturing device receives a third light beam. The third light beam is the second light beam normally incident to the second surface and transmitted to the image capturing device. The lens module focuses the third light beam to be captured by the image capturing device.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Li-Yuan Chang, I-Hsiu Chen, Chin-Hui Huang
  • Publication number: 20200150404
    Abstract: An optical device including a first substrate, a light source, a second substrate, an image capturing device, a lens module and a lens holder is provided. The light source outputs a first light beam. The second substrate includes a first surface and a second surface opposite to the first surface and closer to the first substrate. A scattered light beam which is generated by the first light beam entering an object touching the first surface of the second substrate and scattered in the object is a second light beam. The image capturing device receives a third light beam. The third light beam is the second light beam normally incident to the second surface and transmitted to the image capturing device. The lens module focuses the third light beam to be captured by the image capturing device. The lens holder is located between the light source and the image capturing device.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Li-Yuan Chang, I-Hsiu Chen, Chin-Hui Huang