Abstract: The present invention discloses a laser power control system includes a laser diode, a monitor photodiode, a bias control circuit, a modulation control circuit, a digital controller, and a laser diode driver. The laser power control system forms an automatic extinction ratio control loop that is configured to control the extinction ratio of the laser diode by comparing a monitor current with a first target current to keep the extinction ratio of the laser diode at the predetermined first target current. The laser power control system forms an automatic power control loop that is configured to control the average power of the laser diode by comparing the monitor current with the second target current to keep the average power of the laser diode at the predetermined second target current.

Abstract: The present disclosure provides a method of semiconductor fabrication that includes forming a semiconductor fin protruding from a substrate, the semiconductor fin including a plurality of first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked, the second semiconductor material being different from the first semiconductor material in composition; forming a first gate stack on the semiconductor fin; forming a recess in the semiconductor fin within a source/drain (S/D) region adjacent to the first gate stack, a sidewall of the first and second semiconductor material layers being exposed within the recess; performing an etching process to the semiconductor fin, resulting in an undercut below the first gate stack; epitaxially growing on the sidewall of the semiconductor fin to fill in the undercut with a semiconductor extended feature of the first semiconductor material; and growing an epitaxial S/D feature from the rece

Abstract: A device structure includes: a core structure formed on a support, and a shell material formed on the core structure and surrounding at least part of the core structure. The shell material is associated with a first bandgap; the core structure is associated with a second bandgap; and the first bandgap is smaller than the second bandgap. The shell material and the core structure are configured to form a quantum-well channel in the shell material.

Abstract: A display device including a circuit substrate, a plurality of pixels, and a light-shielding layer is provided. The pixels include a plurality of light-emitting elements. The light-emitting elements are disposed on the circuit substrate and are electrically connected to the circuit substrate. The light-emitting elements in the pixels are arranged along an arrangement direction. The light-shielding layer is disposed on the circuit substrate and has a plurality of pixel apertures. The pixels are disposed in a corresponding pixel aperture. The light-shielding layer includes a plurality of first light-shielding patterns extending in the arrangement direction and a plurality of second light-shielding patterns connected to the first light-shielding patterns. The extending direction of the second light-shielding patterns is different from the extending direction of the first light-shielding patterns.

Abstract: A method includes forming a metal gate structure, wherein the metal gate structure includes a gate dielectric layer and a gate electrode; performing a surface treatment to a top surface of the metal gate structure, wherein the surface treatment converts a top portion of the gate electrode to an oxidation layer; forming a conductive layer above the gate electrode, wherein the forming of the conductive layer includes substituting oxygen in the oxidation layer with a metallic element; and forming a contact feature above the metal gate structure, wherein the contact feature is in direct contact with the conductive layer.

Abstract: A method includes forming a transistor including forming a source/drain region on a side of a dummy gate stack, forming a first Inter-Layer Dielectric (ILD) covering the source/drain region, and replacing the dummy gate stack with a replacement gate stack. The method further includes forming a second ILD over the first ILD and the replacement gate stack, and forming a lower source/drain contact plug electrically coupling to the source/drain region. The lower source/drain contact plug penetrates through both the first ILD and the second ILD. A third ILD is formed over the second ILD. A gate contact plug is formed in the second ILD and the third ILD. An upper source/drain contact plug is formed overlapping and contacting the lower source/drain contact plug. The upper source/drain contact plug penetrates through the third ILD. The upper source/drain contact plug and the gate contact plug are formed of different materials.

Abstract: A conductive layer is formed between a metal gate structure, which includes a high-k gate dielectric layer and a gate electrode, and a contact feature. The conductive layer can be selectively deposited on a top surface of the gate electrode or, alternatively, non-selectively formed on the top surface of the gate electrode and the gate dielectric layer by controlling, for example, time of deposition. The conductive layer can have a bottom portion embedded into the gate electrode. The conductive layer and the contact feature can include the same composition, though they may be formed using different deposition techniques.

Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate and a gate dielectric layer formed over the fin structure. The FinFET device structure includes a gate electrode layer formed over the gate dielectric later and a gate contact structure formed over the gate electrode layer. The gate contact structure includes a first conductive layer formed over the gate electrode layer, a barrier layer formed over the first conductive layer and a second conductive layer over the barrier layer. The second conductive layer is electrically connected to the gate electrode layer by the first conductive layer.

Abstract: An illumination system includes a plurality of light source modules and at least one condenser lens. Each of the light source modules includes a first color light source and a wavelength conversion element. The first color light source is configured to provide a first color beam as an excitation beam. The wavelength conversion element is disposed on a transmission path of the first color beam and configured to convert the first color beam into a converted beam. The at least one condenser lens is disposed on transmission paths of the plurality of converted beams from the plurality of wavelength conversion elements and the plurality of first color beams. A projection apparatus including the illumination system is also provided.

Abstract: A laser positioning system includes a laser scanner, a first positioning tag, a second positioning tag, and a processing unit. The laser scanner is disposed on a mobile carrier and is for emitting a light beam to a positioning board and receiving a plurality of reflected light spot signals generated by the light beam reflected from the positioning board. The first positioning tag and the second positioning tag are for reflecting the light beam to generate a first positioning signal and a second positioning signal to the laser scanner. The processing unit is for finding information of positions of the light beam projected on the first positioning tag and the second positioning tag, and filtering the reflected light spot signals to define a reference coordinate for the processing to calculate relative positions of the laser scanner and the positioning board according to the reference coordinate.

Abstract: The present invention relates to a liposomal lupeol acetate (Lipo-LA) and its use in the treatment or prevention of rheumatoid arthritis (RA). The liposomal lupeol acetate of the present invention especially inhibits inflammatory responses and osteoclast generation (osteoclastogenesis) in the progression of rheumatoid arthritis (RA) at a half dose of the un-capsulated lupeol acetate, which may significantly reduce the incidence of RA and improve the therapeutic efficacy of lupeol acetate.

Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

Abstract: A conductive layer is formed between a metal gate structure, which includes a high-k gate dielectric layer and a gate electrode, and a contact feature. The conductive layer can be selectively deposited on a top surface of the gate electrode or, alternatively, non-selectively formed on the top surface of the gate electrode and the gate dielectric layer by controlling, for example, time of deposition. The conductive layer can have a bottom portion embedded into the gate electrode. The conductive layer and the contact feature can include the same composition, though they may be formed using different deposition techniques.

Abstract: A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.

Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: A projection apparatus including an illumination system, a light valve, and an image-forming system is provided. The illumination system includes a first dichroic unit, a second dichroic unit, a third dichroic unit, two wavelength conversion modules, two light sources respectively emitting a first beam and a second beam, and an excitation light source module emitting an excitation beam. The first dichroic unit and the second dichroic unit are disposed on a transmission path of the excitation beam. The two wavelength conversion modules respectively convert the corresponding partial excitation beam coming from the first dichroic unit and the second dichroic unit into two converted beams. The light valve converts the first beam, the two converted beams, and the second beam coming from the third dichroic unit into an image beam. The image-forming system is disposed on a transmission path of the image beam.

Abstract: A process for preparing cangrelor tetrasodium comprising: a) reacting a compound of formula M1 with morpholine to form a compound of formula M2; and b) reacting the compound of formula M2 with clodronic acid to provide cangrelor tetrasodium

Abstract: An illumination system including an excitation light source, a wavelength conversion element and a filter element is provided. The excitation light source is used for emitting an excitation beam. The wavelength conversion element has a wavelength conversion region. When the wavelength conversion region is cut into a transmission path of the excitation beam, the wavelength conversion region is excited by the excitation beam and emits a converted beam. A reference plane is perpendicular to the transmission path of the converted beam and is angled such that an acute angle is formed between the reference plane and the filter wheel which is disposed on a transmission path of the converted beam coming from the wavelength conversion element. The filter element allows a part of the converted beam to penetrate so as to output at least one color beam, and reflects another part of the converted beam.

Abstract: A display device including a circuit substrate, a plurality of pixels, and a light-shielding layer is provided. The pixels include a plurality of light-emitting elements. The light-emitting elements are disposed on the circuit substrate and are electrically connected to the circuit substrate. The light-emitting elements in the pixels are arranged along an arrangement direction. The light-shielding layer is disposed on the circuit substrate and has a plurality of pixel apertures. The pixels are disposed in a corresponding pixel aperture. The light-shielding layer includes a plurality of first light-shielding patterns extending in the arrangement direction and a plurality of second light-shielding patterns connected to the first light-shielding patterns. The extending direction of the second light-shielding patterns is different from the extending direction of the first light-shielding patterns.