Patents by Inventor Hung Chou

Hung Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230081552
    Abstract: A method for codebook-based uplink transmission is described. A sounding reference signal (SRS) configuration can be received from a base station at a user equipment (UE). The UE has N antenna groups. N is an integer greater than two. The SRS configuration indicates N SRS resources for the N antenna groups, respectively. An SRS transmission can be performed using the N SRS resources from the N antenna groups, respectively. A downlink control information (DCI) can be received from the base station. The DCI indicates two SRIs associated with two of the N SRS resources. The DCI indicates two transmission precoder matrix indicators (TPMIs). A PUSCH can be transmitted using two antenna groups of the N antenna groups corresponding to the two SRIs indicated in the DCI and two precoders corresponding to the two TPMIs indicated in the DCI.
    Type: Application
    Filed: August 12, 2022
    Publication date: March 16, 2023
    Applicant: MEDIATEK INC.
    Inventors: Kuan-Hung CHOU, Chin-Kuo JAO
  • Publication number: 20230084002
    Abstract: A projection optical system with a concave reflector in the projection lens, comprising: an image source; a lens group; a reflector; an image and an aperture, the lens group and the reflector form multiple optical paths between the image and image source, each optical path has a chief ray and a marginal ray, the chief ray of one of the optical paths forms a chief ray of a paraxial image height at the part where image source be near to the optical axis, the chief ray of another one of the optical paths forms a marginal ray of an off-axis image height at the part where image source be far from the optical axis; wherein 2.2<F1/F2<3.0; 8<IMH/TR/Fno<19; 5<IMH*T1/T2<8. whereby the optimal optical performance of resolving power and optical path interference allowance will be achieved.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 16, 2023
    Inventors: SHENG-CHE WU, YU-HUNG CHOU, WEI-HAO HUANG
  • Publication number: 20230084779
    Abstract: A battery system includes several unit battery groups, a main switch, a current measuring unit, several slave control units and a master control unit. Each unit battery group includes several cells. The main switch and the current measuring unit are serially connected to the unit battery groups. The current measuring unit measures a measured system current value of the unit battery groups. The slave control units are electrically connected to the unit battery groups respectively. Each slave control unit measures a physical parameter value of each cell in each unit battery group. The master control unit communicates with the slave control units to: disconnect the main switch when the abnormality determined according to the physical parameter value or the measured system current value pertains to system abnormality; and, perform a processing procedure for detection abnormality when the abnormality pertains to detection abnormality.
    Type: Application
    Filed: December 21, 2021
    Publication date: March 16, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chein-Chung SUN, Chi-Hua CHEN, Chun-Hung CHOU, Si-Yu FU
  • Publication number: 20230079182
    Abstract: Method and user equipment (UE) are provided for early evaluation termination. In particular, a UE can receive a downlink (DL) reference signal (RS) from a network. The UE can measure the DL RS to derive a measurement. Then, the UE can adjust a time value or a count value based on the measurement. The time value is configured by the network for triggering measurement reporting procedure or declaring a radio link failure. The count value is configured by the network for triggering beam failure recovery or random access procedure.
    Type: Application
    Filed: August 1, 2022
    Publication date: March 16, 2023
    Inventors: Yi-Ru Chen, Kuan-Hung Chou, Li-Chuan Tseng, Chia-Chun Hsu
  • Patent number: 11599570
    Abstract: A method for rendering a multimedia data stream tamper-proof and of evidential value when recorded in a block chain system reads and decodes the multimedia data stream to obtain multiple frames of data arranged in sequence, and calculates a hash value of each frame of data of the multimedia data stream. One or more items of data are selected from the multiple frames of data based on a predetermined rule and information as to properties of the one or more items of data is uploaded to the block chain system for recording purposes. A device for applying the method to a multimedia data stream is also disclosed.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 7, 2023
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chia-Hung Chou
  • Patent number: 11588028
    Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: February 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Cheng Chiu, Tian Sheng Lin, Hung-Chou Lin, Yi-Min Chen, Chiu-Hua Chung
  • Publication number: 20230034810
    Abstract: A method for processing a cotton-containing textile waste includes: separating cotton fibers from a batch of the textile waste; pretreating the cotton fibers by soaking in a hydroxide-ion-containing solution to obtain a mixture including pretreated carbon fibers; removing a liquid portion from the mixture to obtain the pretreated carbon fibers; subjecting the pretreated carbon fibers to enzymatic hydrolysis to form a sugary juice containing glucose; and e) adding the liquid portion as part of the hydroxide-ion-containing solution for pretreating the cotton fibers separated from a next batch of the textile waste.
    Type: Application
    Filed: December 9, 2021
    Publication date: February 2, 2023
    Inventors: Chu-Chin Wang, Chien-Hung Chou, Shu-Yin Shih, Yi-Cyun Jhang
  • Patent number: 11553824
    Abstract: An automatic guiding method for a self-propelled apparatus (10) is provided. The self-propelled apparatus (10) turns and irradiates when a signal light emitted by a charging dock (20) is sensed by a flank sensor (103), and changes its turn direction when another different signal light from the charging dock (20) is sensed by a forward sensor (102). The charging dock (20) switches to emit another signal light different from the signal light currently emitted when each time is triggered by the signal light emitted by the self-propelled apparatus (10). Repeatedly execute the above actions and make the self-propelled apparatus approach the light-emitting unit (202) until the self-propelled apparatus (10) reaches a charging position. It can accurately guide the self-propelled apparatus (10) to the charging position by arranging only two sensors on the self-propelled apparatus.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: January 17, 2023
    Assignee: POWER LOGIC TECH, INC.
    Inventors: Wen-Faung Hsu, Chia-Heng Hsu, Hung-Chou Chen
  • Publication number: 20230012449
    Abstract: The invention provides compounds of formula (I): or a salt thereof as described herein. The invention also provides pharmaceutical compositions comprising a compound of formula (I), processes for preparing compounds of formula (I), intermediates useful for preparing compounds of formula I and therapeutic methods for treating a Retroviridae viral infection including an infection caused by the HIV virus.
    Type: Application
    Filed: April 27, 2021
    Publication date: January 12, 2023
    Inventors: Steven S. Bondy, Carina E. Cannizzaro, Chien-Hung Chou, Randall L. Halcomb, Yunfeng E. Hu, John O. Link, Qi Liu, Scott D. Schroeder, Winston C. Tse, Jennifer R. Zhang
  • Patent number: 11552638
    Abstract: An optical switch module including a light generation circuit, a light receiving circuit, and a control unit is provided. The light generation circuit includes a light generation unit and a control end, and generates light according to a control signal from the control end. The light receiving circuit includes a light receiving unit and a signal reading end, and is configured to receive light to generate a detection signal at the signal reading end. The control unit is configured to generate the control signal and receive the detection signal. The control unit further selectively configures the signal reading end in an input mode or an output mode. Before the control unit configures the signal reading end in the input mode to read the detection signal, the control unit configures the signal reading end in the output mode to pull up a potential of the light receiving unit.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: January 10, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Kuo-En Lin, Chih-Yuan Lin, Shih-Hung Chou, Xin-Han Cai, I-Ting Hsieh
  • Publication number: 20230002407
    Abstract: The present disclosure relates generally to modulators of Cot (cancer Osaka thyroid) and methods of use and manufacture thereof.
    Type: Application
    Filed: May 11, 2021
    Publication date: January 5, 2023
    Inventors: Elizabeth M. Bacon, Gayatri Balan, Chien-Hung Chou, Christopher T. Clark, Jeromy J. Cottell, Musong Kim, Thorsten A. Kirschberg, John O. Link, Gary Phillips, Scott D. Schroeder, Neil H. Squires, Kirk L. Stevens, James G. Taylor, William J. Watkins, Nathan E. Wright, Sheila M. Zipfel
  • Publication number: 20220415783
    Abstract: A method includes: forming a patterned dielectric layer, including a predetermined word line region and a predetermined pick-up neck region being separated by a first distance, and the patterned dielectric layer within the predetermined pick-up neck region has a second distance, wherein the first distance is smaller than or equal to the second distance; forming a spacer on sidewalls of the patterned dielectric layer; cutting off the spacer of a connecting portion of the predetermined word line region from the spacer of a remaining portion of the predetermined word line region; forming a mask pattern, including a first portion across the connecting portion and the predetermined pick-up neck region, wherein the spacer at the remaining portion is spaced apart from the first portion; and forming a dummy structure, word lines, and pick-up necks, wherein the dummy structure is located between the word lines and the pick-up necks.
    Type: Application
    Filed: April 8, 2022
    Publication date: December 29, 2022
    Inventors: Hsin-Hung CHOU, Kao-Tsair TSAI
  • Publication number: 20220406734
    Abstract: A flip-chip packaging substrate and a method for fabricating the same are disclosed. The method includes stacking a plurality of insulating layers having conductive posts in a manner that the conductive posts are stacked on and in contact with one another. The insulating layers and the conductive posts serve as a core layer structure of the flip-chip packaging substrate. As such, the conductive posts having small-sized end surfaces can be fabricated according to the practical need. Therefore, when the thickness of the core layer structure is increased, the present disclosure not only increases the rigidity of the flip-chip packaging substrate so as to avoid warping, but also ensures the design flexibility of the small-sized end surfaces of the conductive posts, allowing high-density electrical connection points and fine-pitch and high-density circuit layers to be fabricated on the core layer structure.
    Type: Application
    Filed: August 19, 2022
    Publication date: December 22, 2022
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu, Tung-Yao Kuo
  • Patent number: 11527643
    Abstract: Provided is a method of forming a trench gate MOSFET. A hard mask layer is formed on a substrate. The substrate is partially removed by using the hard mask layer as a mask, so as to form a trench in the substrate. A first insulating layer and a first conductive layer are formed in the lower portion of the trench. A sacrificial layer is formed on the side surface of the upper portion of the trench, and the sacrificial layer is connected to the hard mask layer. An interlayer insulating layer is formed on the first conductive layer by a thermal oxidation process when the sacrificial layer and the hard mask layer are present. A second insulating layer and a second conductive layer are formed in the upper portion of the trench. A trench gate MOSFET is further provided.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: December 13, 2022
    Assignee: uPI Semiconductor Corp.
    Inventors: Nobuyuki Shirai, Chun-Hsu Chang, Ming-Hung Chou
  • Patent number: 11522585
    Abstract: A method and a system for processing uplink signals in cloud radio access networks are disclosed The system comprising a baseband unit and a number of remote radio heads. The baseband unit and the remote radio heads are connected through fronthaul links. When one remote radio head receives a signal transmitted from a user equipment, the remote radio head first encodes the received signal according to a post-coding matrix, then quantizes the encoded signal according to a number of quantization bits allocated to the user equipment, and finally transmits the quantized signal to the baseband unit.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: December 6, 2022
    Assignee: HON LIN TECHNOLOGY CO., LTD.
    Inventors: Xiang-Quan Ser, Chi-Chen Wang, Shang-Ho Tsai, Hsin-Hung Chou, Wei-Han Hsiao
  • Publication number: 20220384609
    Abstract: A semiconductor structure includes: a semiconductor substrate; a first source/drain feature and a second source/drain feature over the semiconductor substrate; and semiconductor layers extending longitudinally in a first direction and connecting the first source/drain feature and the second source/drain feature. The semiconductor layers are spaced apart from each other in a second direction perpendicular to the first direction. The semiconductor structure further includes inner spacers each between two adjacent semiconductor layers; metal oxide layers interposing between the inner spacers and the semiconductor layers; and a gate structure wrapping around the semiconductor layers and the metal oxide layers.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao LIN, Chia-Hung CHOU, Chih-Hsuan CHEN, Ping-En CHENG, Hsin-Wen SU, Chien-Chih LIN, Szu-Chi YANG
  • Publication number: 20220382023
    Abstract: An optical lens system includes, in order from a magnified side to a minified side, a first lens group of positive refractive power and a second lens group of positive refractive power. The first lens group includes a first lens and a second lens, and the second lens group includes a third lens and a fourth lens. One of the third lens and the fourth lens includes one aspheric surface, and each of the lenses in the optical lens system is a singlet lens. The optical lens satisfies a condition of TE(?=400)>94%, where TE(?=400) denotes an overall transmittance of all of the lenses in the optical lens system measured at a wavelength of 400 nm.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Hung-You CHENG, Yu-Hung CHOU, Ching-Lung LAI, Yi-Hua LIN, Wei-Hao HUANG
  • Publication number: 20220376547
    Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system comprises a DC-AC conversion circuit, a plurality of switches, a plurality of sensing units, a plurality of output ports and a control unit. Each output port is electrically coupled to an output terminal of the DC-AC conversion circuit sequentially through one of the sensing units and one of the switches. The control unit is configured to define members of at least one group from the output ports according to a system setting, and define which members of each group are non-critical output ports according to the system setting. The control unit is further configured to set, according to the system setting, at least one condition for all non-critical output ports in each group to simultaneously stop supplying power, and to accordingly control the operations of the corresponding switches.
    Type: Application
    Filed: November 17, 2021
    Publication date: November 24, 2022
    Inventors: Kai-Tsung Yang, Jui-Hung Chou, Fang-Yu Hsu, Shou-Ting Yeh
  • Patent number: 11508673
    Abstract: A semiconductor packaging substrate is provided and includes: an insulating layer, a thinned circuit structure formed of circuit layers and conductive posts stacked on one another embedding in the insulating layer, and a supporting structure formed on the insulating layer and having at least one through hole exposing the conductive posts. As such, before a subsequent packaging operation, the packaging substrate can be electrically tested and screened so as to prevent a defective packaging substrate from being misused in the subsequent packaging operation and hence avoid the loss of normal electronic elements. A method for fabricating a semiconductor packaging substrate and a packaging process using the semiconductor packaging substrate are also provided.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: November 22, 2022
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Pao-Hung Chou, Chun-Hsien Yu
  • Publication number: 20220336659
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 20, 2022
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai