Patents by Inventor J. Read

J. Read has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020098196
    Abstract: A composition and method for treating or preventing infection by Pseudomonas aeruginosa is disclosed. The composition includes a P. aeruginosa pilin peptide modified to prevent oligomerization of the pilin. The method involves administered the composition to a person infected with Pseudomonas are at risk of such infection.
    Type: Application
    Filed: May 24, 2001
    Publication date: July 25, 2002
    Inventors: Randall T. Irvin, Randy J. Read, Bart Hazes, Wah Y. Wong, Sastry A. Parimi, Linda M. G. Glasier
  • Patent number: 6370558
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: April 9, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6342233
    Abstract: A composition and method for treating or preventing infection by Pseudomonas aeruginosa is disclosed. The composition includes a P. aeruginosa pilin peptide modified to prevent oligomerization of the pilin. The method involves administered the composition to a person infected with Pseudomonas are at risk of such infection.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: January 29, 2002
    Assignee: Governors of the University of Alberta
    Inventors: Randall T. Irvin, Randy J. Read, Bart Hazes, Wah Y. Wong, Sastry A. Parimi, Linda M. G. Glasier
  • Publication number: 20010045375
    Abstract: Disclosed are apparatus and methods for conversion of hydrocarbon feed streams into liquid products. One embodiment of an apparatus includes a pressure vessel that contains a synthesis gas production device, a synthesis gas conditioning device and a synthesis gas conversion device wherein the synthesis gas production device and the synthesis gas conditioning device are nested within the synthesis gas conversion device. One embodiment of a method includes providing a hydrocarbon feed stream and producing a synthesis gas stream from the hydrocarbon feed stream in a synthesis gas production device. Subsequently, the synthesis gas stream is conditioned by removing heat from the synthesis gas stream through a first hollow body into a reactant feed stream that is then fed into the synthesis gas production device. Finally, the synthesis gas stream is converted to form a liquid product stream.
    Type: Application
    Filed: January 22, 2001
    Publication date: November 29, 2001
    Inventors: Johannes H.J.S. Thijssen, Carole J. Read, Robert S. Weber
  • Patent number: 6310043
    Abstract: Compounds which bind to toxins associated with enteric bacterial infection, compositions including the compounds, methods for the neutralization of toxins in a patient, and methods for the diagnosis of bacterial and viral infections are disclosed. Toxins which can be bound by the compounds include pentameric toxins, for example SLTs, such as those from salmonella, camylobacter and other bacteria, verotoxins from E. coli, cholera toxin, clostridium difficile toxins A and B, bacterial pili from enteropathogenic E. coli (EPEC) and enterotoxigenic E. coli (ETEC) and viral lectins such as viral hemagglutinins. The compounds include a core molecule bound to a plurality of linker arms, which in turn are bound to a plurality of bridging moieties, which in turn are bound to at least one, and preferably, two or more ligands which bind to the toxin. The presence of a plurality of bridged dimers of the ligands is responsible for the increased binding affinity of the compounds relative to the ligands themselves.
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: October 30, 2001
    Assignee: Governors of the University of Alberta
    Inventors: David R. Bundle, Pavel Kitov, Randy J. Read, Hong Ling, Glen Armstrong
  • Patent number: 6240437
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus. An arithmetic logic unit performs parallel operations (addition, subtraction, Boolean functions) controlled by the same instructions. This arithmetic logic unit is divisible into a selected number of sections for performing identical operations on independent sections of its inputs. The multiplier unit may form dual products from separate parts of the input data.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: May 29, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6219688
    Abstract: A method for forming a sum of the absolute value of the difference between each pair of numbers of respective first and second sets of numbers. The method includes forming the difference between a first number of the first set and a second number of the second set. Next this difference is either added to or subtracted from a running sum based upon the sign of this difference. This is repeated until all number pairs are either added to or subtracted from the running sum of absolute values of the differences. The initial subtraction is used to set a status bit in a flag register (211) based upon a less than zero output or the carry-out. The status bit controls whether the difference is added to or subtracted from the running sum. The conditional addition to or subtraction from the running sum may generate a carry-out representing the most significant bit of the running sum. This carry-out is stored and later added to the running sum to recover the most significant overflow bits.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: April 17, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read
  • Patent number: 6168928
    Abstract: The three-dimensional structure of crystalline pertussis holotoxin (PT) has been determined by X-ray crystallography. Crystal structures have also been determined for complexes of pertussis toxin with molecules relevant to the biological activity of PT. These three-dimensional structures were analyzed to identify functional amino acids appropriate for modification to alter the biological properties of PT. Similar procedures may be used to predict amino acids which contribute to the toxicity of the holotoxin, to produce immunoprotective, genetically-detoxified analogs of pertussis toxin.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: January 2, 2001
    Assignee: Connaught Laboratories Limited
    Inventors: Randy J. Read, Penelope E. Stein, Stephen A. Cockle, Raymond P. Oomen, Sheena Loosmore, Michel H. Klein, Glen D. Armstrong, Bart Hazes
  • Patent number: 6116768
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable barrel rotator (235). The rotate amount is a default rotate amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the barrel rotator (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the rotate amount. The output of the barrel rotator (235) may be stored independently of the arithmetic logic unit (230) result. In the preferred embodiment of this invention, the three input arithmetic logic unit (230) is embodied in a data processor circuits as a part of a multiprocessor integrated circuit (100) used in image processing.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: September 12, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 6098163
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239).
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: August 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 6032170
    Abstract: A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier forms a N bit output having a first portion which is the L most significant bits of the of product and a second portion which is M other bits not including the L least significant bits of the product, where N is the sum of M and L. In the preferred embodiment the M other bits are derived from other bits of the two input data busses, such as the M other bits of the first input data bus.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: February 29, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read, Keith Balmer
  • Patent number: 6018022
    Abstract: The three-dimensional structure of crystalline pertussis holotoxin (PT) has been determined by X-ray crystallography. Crystal structures have also been determined for complexes of pertussis toxin with molecules relevant to the biological activity of PT. These three-dimensional structures were analyzed to identify functional amino acids appropriate for modification to alter the biological properties of PT. Similar procedures may be used to predict amino acids which contribute to the toxicity of the holotoxin, to produce immunoprotective, genetically-detoxified analogs of pertussis toxin.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: January 25, 2000
    Assignees: Connaught Laboratories Limited, University of Alberta
    Inventors: Randy J. Read, Penelope E. Stein, Stephen A. Cockle, Raymond P. Oomen, Sheena Loosmore, Michel H. Klein, Glen D. Armstrong, Bart Hazes
  • Patent number: 6016538
    Abstract: This invention is a technique for summing plural sections of a single data word. The technique uses a repeated process forming larger and larger partial sums. Initially the single data word is rotated one section. The original single data word and the rotated single data word are masked with a mask having "1's" and "0's" in alternate sections. The mask blocks alternate sections so that adjacent sections of the original data word may be summed on a whole data word basis without any overflow disrupting the partial products. The two masked data words are then summed. This sum results in half as many partial sums as before. Each of these larger partial sums now occupies two original sections of the data word. The process can be repeated for these large partial sums. In the preferred embodiment this technique is used with an arithmetic logic unit (230) capable of forming mixed arithmetic and Boolean combinations of three inputs having a barrel rotator (235) driving one input.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: January 18, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Christopher J. Read
  • Patent number: 5995748
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal optionally comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply an N bit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal optionally comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239).
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: November 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Philip Moyse
  • Patent number: 5995747
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a Boolean combination of the three inputs that is selected by a function signal. The arithmetic logic unit is capable of forming all possible Boolean combinations of the three inputs. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply an N bit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: November 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Philip Moyse
  • Patent number: 5982519
    Abstract: Infrared communications scheme for an infrared transmitting device having a light emitting diode (LED) ramps up the power of a carrier frequency signal applied to the LED in a given time interval to a given value. The carrier frequency signal is then frequency modulated with a data message for transmission by the LED. The power of a DC signal applied to the LED may then be ramped up in a given time interval to a given value before the carrier frequency signal is modulated with a data message. After transmission of the data message, the power of the carrier frequency signal applied to the LED is ramped down in a given time interval to a given value. The power of the DC signal applied to the LED is then ramped down in a given time interval to a given value.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: November 9, 1999
    Assignee: Interlink Electronics, Inc.
    Inventors: John K. Martnelli, Wendell W. Ritchey, Leslie J. Reading
  • Patent number: 5977304
    Abstract: The three-dimensional structure of crystalline pertussis holotoxin (PT) has been determined by X-ray crystallography. Crystal structures have also been determined for complexes of pertussis toxin with molecules relevant to the biological activity of PT. These three-dimensional structures were analyzed to identify functional amino acids appropriate for modification to alter the biological properties of PT. Similar procedures may be used to predict amino acids which contribute to the toxicity of the holotoxin, to produce immunoprotective, genetically-detoxified analogs of pertussis toxin.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: November 2, 1999
    Assignees: Connaught Laboratories Limited, University of Alberta
    Inventors: Randy J. Read, Penelope E. Stein, Stephen A. Cockle, Raymond P. Oomen, Sheena Loosmore, Michel H. Klein, Glen D. Armstrong, Bart Hazes
  • Patent number: 5974539
    Abstract: A three input arithmetic logic unit (230) generates a combination of the three inputs that is selected by a function signal. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shift (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239). One preferred form of the mask has a number of right justified 1's corresponding to a mask input signal.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 26, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 5965385
    Abstract: The three-dimensional structure of crystalline pertussis holotoxin (PT) has been determined by X-ray crystallography. Crystal structures have also been determined for complexes of pertussis toxin with molecules relevant to the biological activity of PT. These three-dimensional structures were analyzed to identify functional amino acids appropriate for modification to alter the biological properties of PT. Similar procedures may be used to predict amino acids which contribute to the toxicity of the holotoxin, to produce immunoprotective, genetically-detoxified analogs of pertussis toxin.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: October 12, 1999
    Assignees: Connaught Laboratories Limited, University of Alberta
    Inventors: Randy J. Read, Penelope E. Stein, Stephen A. Cockle, Raymond P. Oomen, Sheena Loosmore, Michel H. Klein, Glen D. Armstrong, Bart Hazes
  • Patent number: 5961635
    Abstract: A three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. The second input signal comes from a controllable barrel rotator (235). The rotate amount is a default rotate amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the barrel rotator (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the rotate amount. The output of the barrel rotator (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239). One preferred form of the mask has a number of right justified 1's corresponding to a mask input signal.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 5, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse