Abstract: An active powered device (PD) for the application of power over Ethernet (PoE). In a fixed power budget environment, it is important for the power sourcing equipment (PSE) to accurately determine a power budget for the various powered ports. An active PD can be designed to gather additional information (e.g., current and input voltage) during PD operation and to forward the additional information to the PSE. The PSE can then use the additional information to adjust operational parameters such as a power budget.

Abstract: A system and method for measuring a cable resistance in a power over Ethernet (PoE) application. A short circuit module in a powered device is designed to produce a short circuit effect upon receipt of a cable resistance detection voltage. The cable resistance detection voltage can be designed to be greater than a voltage for detection or classification and less than a voltage for powering of the powered device. The measurement of the current at a time when a short circuit effect is produced at the powered device enables a calculation of the actual resistance of the cable on a given PoE port.

Abstract: An SPI switch allows selection of a BIOS memory transparent to a Southbridge chipset component. The SPI switch provides address translation to a selected BIOS memory area under the control of a security module processor. The SPI switch also provides command filtering to prevent commands that represent a security risk such as bulk erase commands. Because the SPI switch allows transparent redirection between BIOS programs, booting in different operating modes may be supported without any changes to the basic computer architecture or major chipset components.

Abstract: A method to form decoupling capacitors on an IC chip and the structure thereof includes forming several metal layers on a low-metal-covering-ratio region of the IC chip and connecting these metal layers to the ground, source voltage respectively, in order to form parasite metal capacitors that can be as decoupling capacitors with satisfying the metal covering rules so as to make good use of the IC chip space.

Abstract: A technique for classifying traffic at a network node involves programming a content addressable memory (CAM) array with multiple class-specific entries, where each of the class-specific entries has an associated traffic class, obtaining a protocol-independent key field from an incoming packet, and searching the programmed CAM array with the protocol-independent key field to identify an associated traffic class of the incoming packet. In another embodiment, each of the class-specific entries has an associated traffic distribution policy, which may be applied to an incoming packet.

Abstract: A method and apparatus for completing call or contacts over a network based upon an identifier. The contacting party sends a message requesting contact with the contacted party, and the system locates the contacted party via a data network or telephone address specified preferably by the contacted party.

Abstract: A method and system for controlling the spin rate of an optical device. A device driver provides notification that media has been inserted into the optical device. A control service determines the format of information on the media. The spin rate of the optical device is locked or unlocked based on the format.

Abstract: A digital image capture system includes an image sensor, a package structure for holding the image sensor, and electrical connectors for creating electrical connections between the image sensor and a circuit board. The package structure includes attachment features that enable an optics system to be securely attached to the package structure after the package structure has been soldered to the circuit board In an embodiment, the attachment features align the optics system with the image sensor without having to power up the image sensor. An embodiment of the attachment features includes mechanical attachment features, such as clip arms and/or clip receivers. In an embodiment, the optics system includes attachment features that are complementary to the attachment features of the package structure. The package structure and optics system may additionally include complementary contact surfaces that create a light-tight connection between the optics system and the package structure.

Abstract: The rewind arbiter system provides a system and method for arbitrating a device. Briefly described, one embodiment comprises a plurality of controlled devices configured to access a shared component and a rewind arbiter configured to arbitrate among a plurality of requests received from the controlled devices, wherein one of the controlled devices communicating a request that is selected during arbitration is then granted access to the shared component. The rewind arbiter further comprising; an arbitration scheme configured to grant arbitrated requests to the controlled devices, a verification scheme configured to verify that the controlled device successfully completes communication with the shared component, and a rewind scheme configured to cause the arbitration scheme to rewind back to the controlled device that has failed to successfully complete communication with the shared component such that the failed control device is granted a second arbitrated request.

Abstract: A system comprises a plurality of nodes coupled together via a switching device. Each node comprises a processor coupled to a memory. Migration logic in the switching device is configured to migrate segments of each memory to the switching device.

Abstract: A method for efficiently controlling read/write of a flash memory is proposed, wherein two address mapping tables and an empty block FIFO mechanism are built. A zone address mapping table matched with its empty block FIFO data is used for the logical address of the file allocation table (FAT). When a host end performs read/write to a flash memory, no matter to which zone the zone address mapping table corresponds, it is not necessary to rebuild the FAT address mapping table. Moreover, a cache address mapping table and its empty block FIFO data can be added. When the logical address is not in the zone address mapping table and the FAT address mapping table, a smaller cache address mapping table is first built to increase the system speed, let control of the flash memory be more efficient, and distribute the utility rate of each block.

Abstract: A digital image capture system includes an image sensor package and a powered lens element that is attached to the image sensor package. The image sensor package includes an image sensor, a package structure for holding the image sensor, and electrical connectors for creating electrical connection between the image sensor and a circuit board. The package structure and the powered lens element include complementary surfaces that enable the powered lens element to be attached to the image sensor package. Preferably, the powered lens element is glued to the package structure to create a sealed environment for the image sensor. In an embodiment, a temporary protective cover is attached to the powered lens element to protect the powered lens element during attachment of the image sensor package to the circuit board. In an embodiment of the digital image capture system, an additional powered lens element is attached to the powered lens element to create a composite lens element.

Abstract: A technique for classifying traffic at a network node involves programming a content addressable memory (CAM) array with multiple class-specific entries, where each of the class-specific entries has an associated traffic class, obtaining a protocol-independent key field from an incoming packet, and searching the programmed CAM array with the protocol-independent key field to identify an associated traffic class of the incoming packet. In another embodiment, each of the class-specific entries has an associated traffic distribution policy, which may be applied to an incoming packet.

Abstract: A technique for classifying traffic at a network node includes programming multiple on-chip memory arrays with identical search entries, receiving multiple packets, and distributing classification searches related to the packets among the multiple on-chip memory arrays. In an embodiment, the on-chip memory arrays are content-addressable memory (CAM) arrays. In another embodiment, the distributing of classification searches related to the packets is performed in an alternating fashion with respect to a fixed order.

Abstract: A Process Module (“PM”) is designed to facilitate Transport Polymerization (“TP”) of precursors that are useful for preparations of low Dielectric Constant (“∈”) films. The PM consists primarily of a Material Delivery System (“MDS”) with a high temperature Vapor Phase Controller (“VFC”), a TP Reactor, a Treatment Chamber, a Deposition Chamber and a Pumping System. The PM is designed to facilitate TP for new precursors and for film deposition and stabilization processes.

Abstract: A multi-stage transport polymerization (“TP”) reactor useful for making a thin film for the fabrication of integrated circuits. One TP reactor has two distinct heating zones that facilitate the cracking of specific precursor materials. The multi-stage reactor comprises a first low temperature heating zone that heats incoming precursor materials to a temperature that is lower than the “cracking” temperature of the precursor. The second heating zone is maintained at a temperature useful for breaking the chemical bonds of a desired leaving groups in the selected precursor. Specialized heating bodies, which transfer heat to the precursor material in the low and high temperature zones, are used as elements of the invention that can simultaneously decrease the total volume and increase the inside surface area of the TP reactor. Chemistries of precursors used in the multi-stage reactor are also provided.

Abstract: Packaging for components of an optical module. The packaging includes a flexible circuit coupled to two stiffeners. The packaging has a first sub-assembly with the first stiffener for receiving a first component. The packaging also has a second sub-assembly with the second stiffener for receiving a second component and for coupling to an external circuit. The packaging has a flexible portion with a first end for coupling to the first sub-assembly and a second end for coupling to the second sub-assembly. The flexible portion allows the first sub-assembly to be oriented with respect to the second sub-assembly to form an angle that is greater than zero degrees and less than 180 degrees.

Abstract: Packaging for components of an optical module. The packaging includes a flexible circuit coupled to two stiffeners. The packaging has a first sub-assembly with the first stiffener for receiving a first component. The packaging also has a second sub-assembly with the second stiffener for receiving a second component and for coupling to an external circuit. The packaging has a flexible portion with a first end for coupling to the first sub-assembly and a second end for coupling to the second sub-assembly. The flexible portion allows the first sub-assembly to be oriented with respect to the second sub-assembly to form an angle that is greater than zero degrees and less than 180 degrees.

Abstract: In some embodiments, the present invention provides a distributed monitoring, evaluation and routing (“DiMER”) system that provides active management of a data-network based telephony networks. Such a system, and data-network-based telephony networks incorporating the same, advantageously route calls to meet call-quality standards and/or cost goals, among other targets. To meet such quality standards, the system periodically obtains call-related data, analyzes the data, and revises call routing, as appropriate, by shifting or reallocating call traffic between available terminating gateways (based on their performance).