Patents by Inventor Ji-Yong Park

Ji-Yong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10572208
    Abstract: A display device includes a signal receiver configured to receive an image signal; a display including a plurality of modules each including a plurality of light sources, and display an image based on the received image signal; and a controller configured to perform first uniformity calibration between light sources within each individual module with regard to the modules, and second uniformity calibration between the modules, wherein the controller controls the first uniformity calibration to be applied to the image signal received in the signal receiver based on a first coefficient determined for each of the light sources within each individual module, controls the second uniformity calibration to be applied to the image signal subjected to the first uniformity calibration based on a second coefficient determined for each of the modules, and controls a calibrated image to be displayed based on the image signal subjected to the second uniformity calibration.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: February 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-yong Park, Min-jung Kim, Sang-kyun Im, Young-hoon Cho
  • Patent number: 10572210
    Abstract: A display apparatus includes a cabinet; a display panel provided on the cabinet; a door provided on the cabinet and configured to be opened and closed; a first detector configured to detect opening of the door and output a first signal in response to the door being opened; an image data receiver configured to receive content data from an image source device; and a first controller configured to control the display panel to display a first image corresponding to the content data received from the image source device and control the display panel to display a second image different from the first image in response to receiving the first signal.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: February 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Yong Park, Hye Rin Choi, Sang Kyun Im, Young-Hoon Cho
  • Publication number: 20200053307
    Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: SANG HYUN CHO, JI YONG PARK, DAE HWA PAIK, KYOUNG MIN KOH, MIN HO KWON, SEUNG HYUN LIM
  • Publication number: 20200053306
    Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Sang Hyun Cho, Ji Yong Park, Dae Hwa Paik, Kyoung Min Koh, Min Ho Kwon, Seung Hyun Lim
  • Publication number: 20200027856
    Abstract: Examples relate to a die interconnect substrate comprising a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate further comprises a substrate structure comprising a substrate interconnect electrically insulated from the bridge die, wherein the bridge die is embedded in the substrate structure. The die interconnect substrate further comprises a first interface structure for attaching a semiconductor die to the substrate structure, wherein the first interface structure is connected to the first bridge die pad. The die interconnect substrate further comprises a second interface structure for attaching a semiconductor die to the substrate structure, wherein the second interface structure is connected to the substrate interconnect. A surface of the first interface structure and a surface of the second interface structure are at the same height.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Inventors: Rahul JAIN, Ji Yong PARK, Kyu Oh LEE
  • Patent number: 10531032
    Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Hyun Cho, Ji Yong Park, Dae Hwa Paik, Kyoung Min Koh, Min Ho Kwon, Seung Hyun Lim
  • Publication number: 20200005994
    Abstract: Apparatuses, systems and methods associated with a substrate assembly with an encapsulated magnetic feature for an inductor are disclosed herein. In embodiments, a substrate assembly may include a base substrate, a magnetic feature encapsulated within the base substrate, and a coil, wherein a portion of the coil extends through the magnetic feature. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 27, 2018
    Publication date: January 2, 2020
    Inventors: Kyu-Oh LEE, Rahul JAIN, Sai VADLAMANI, Cheng XU, Ji Yong PARK, Junnan ZHAO, Seo Young KIM
  • Publication number: 20200006210
    Abstract: A chip package that includes a die coupled to a package substrate. The substrate includes a first ground layer and a dielectric material engaging the first ground layer. A solder resist layer engages the dielectric material and a routing layer is disposed at least partially within the solder resist layer. A second ground layer engages the solder resist layer.
    Type: Application
    Filed: June 27, 2018
    Publication date: January 2, 2020
    Inventors: Cheng Xu, Kyu Oh Lee, Junnan Zhao, Rahul Jain, Ji Yong Park
  • Publication number: 20200006180
    Abstract: Embodiments include an electronic package and methods of forming an electronic package. In an embodiment, the electronic package comprises a substrate, and a plurality of conductive features formed over the substrate. In an embodiment, a bilayer build-up layer is formed over the plurality of conductive features. In an embodiment, the bilayer build-up layer comprises a first dielectric layer and a second dielectric layer. In an embodiment, a surface of the first dielectric layer comprises depressions. In an embodiment, the second dielectric layer is disposed in the depressions of the surface of the first dielectric layer.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Andrew BROWN, Ji Yong PARK, Siddharth ALUR, Cheng XU, Amruthavalli ALUR
  • Publication number: 20190393217
    Abstract: Disclosed embodiments include an embedded thin-film capacitor and a magnetic inductor that are assembled in two adjacent build-up layers of a semiconductor package substrate. The thin-film capacitor is seated on a surface of a first of the build-up layers and the magnetic inductor is partially disposed in a recess in the adjacent build up layer. The embedded thin-film capacitor and the integral magnetic inductor are configured within a die shadow that is on a die side of the semiconductor package substrate.
    Type: Application
    Filed: May 3, 2019
    Publication date: December 26, 2019
    Inventors: Cheng Xu, Rahul Jain, Seo Young Kim, Kyu Oh Lee, Ji Yong Park, Sai Vadlamani, Junnan Zhao
  • Publication number: 20190385780
    Abstract: Techniques are provided for an inductor at a first level interface between a first die and a second die. In an example, the inductor can include a winding and a core disposed inside the winding. The winding can include first conductive traces of a first die, second conductive traces of a second die, and a plurality of connectors configured to connect the first die with the second die. Each connector of the plurality of connecters can be located between a trace of the first conductive traces and a corresponding trace of the second conductive traces.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 19, 2019
    Inventors: Cheng Xu, Yikang Deng, Kyu Oh Lee, Ji Yong Park, Srinivas Pietambaram, Ying Wang, Chong Zhang, Rui Zhang, Junnan Zhao
  • Publication number: 20190385959
    Abstract: Techniques are provided for an inductor at a second level interface between a first substrate and a second substrate. In an example, the inductor can include a winding and a core disposed inside the winding. The winding can include first conductive traces of a first substrate, second conductive traces of a second non-semiconductor substrate, and a plurality of connectors configured to connect the first substrate with the second substrate. Each connector of the plurality of connecters can be located between a trace of the first conductive traces and a corresponding trace of the second conductive traces.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 19, 2019
    Inventors: Cheng Xu, Yikang Deng, Kyu Oh Lee, Ji Yong Park, Srinivas Pietambaram, Ying Wang, Chong Zhang, Rui Zhang, Junnan Zhao
  • Publication number: 20190373736
    Abstract: Described herein are systems and methods for creating a cavity within a substrate. The systems and methods may include passing a plasma gas over a first surface of the substrate. The plasma gas may include a reactant gas. The systems and methods also may include removing a portion of the substrate by reacting the reactant gas with a constituent of the first surface of the substrate, thereby forming the cavity.
    Type: Application
    Filed: March 31, 2017
    Publication date: December 5, 2019
    Inventors: Rahul Jain, Kyu Oh Lee, Ji Yong Park, Sai Vadlamani
  • Publication number: 20190355654
    Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a core substrate with a first conductive structure having a first thickness on the core substrate, and a second conductive structure having a second thickness on the core substrate, where the first thickness is different than the second thickness.
    Type: Application
    Filed: May 21, 2018
    Publication date: November 21, 2019
    Applicant: Intel Corporation
    Inventors: Cheng Xu, Jiwei Sun, Ji Yong Park, Kyu Oh Lee, Yikang Deng, Zhichao Zhang, Liwei Cheng, Andrew James Brown
  • Publication number: 20190355675
    Abstract: Techniques for fabricating a semiconductor package having magnetic materials embedded therein are described. For one technique, fabrication of package includes: forming a pad and a conductive line on a build-up layer; forming a raised pad structure on the build-up layer, the raised pad comprising a pillar structure on the pad; encapsulating the conductive line and the raised pad structure in a magnetic film comprising one or more magnetic fillers; planarizing a top surface of the magnetic film until top surfaces of the raised pad structure and the magnetic film are co-planar; depositing a primer layer on the top surfaces; removing one or more portions of the primer layer above the raised pad structure to create an opening; and forming a via in the opening on the raised pad structure. The primer layer may comprise one or more of a build-up layer, a photoimageable dielectric layer, and a metal mask.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 21, 2019
    Inventors: Kyu-Oh LEE, Sai VADLAMANI, Rahul JAIN, Junnan ZHAO, Ji Yong PARK, Cheng XU, Seo Young KIM
  • Publication number: 20190351745
    Abstract: An air blower device of an air-conditioning system for a vehicle including: a blower case including a duct part having an indoor air inlet and an outdoor air inlet, an air blowing part connected with an inlet of an air-conditioning case and a connection part for connecting the duct part with the air blowing part, the connection part having an insertion part of which the certain area is hollowed; an indoor and outdoor air converting door disposed inside the duct part of the blower case to open and close the indoor air inlet and the outdoor air inlet; an air blower is disposed inside the air blowing part of the blower case to forcedly blow air; an electric dust collector located at the connection part through the insertion part of the blower case; and a cover for opening and closing the insertion part of the blower case.
    Type: Application
    Filed: July 31, 2019
    Publication date: November 21, 2019
    Inventors: Yong Jun Jee, Ji Yong Park
  • Patent number: 10475368
    Abstract: A display device is provided, which includes a display, a ditherer configured to perform dithering of video data displayed on the display, an illumination sensor configured to sense illumination around the display device, and a processor configured to control driving of the ditherer on the basis of a grayscale level of the video data if or when the sensed illumination is lower than a predetermined value.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: November 12, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-yong Park, Young-hoon Cho, Sang-kyun Im
  • Patent number: 10468374
    Abstract: Examples relate to a die interconnect substrate comprising a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate further comprises a substrate structure comprising a substrate interconnect electrically insulated from the bridge die, wherein the bridge die is embedded in the substrate structure. The die interconnect substrate further comprises a first interface structure for attaching a semiconductor die to the substrate structure, wherein the first interface structure is connected to the first bridge die pad. The die interconnect substrate further comprises a second interface structure for attaching a semiconductor die to the substrate structure, wherein the second interface structure is connected to the substrate interconnect. A surface of the first interface structure and a surface of the second interface structure are at the same height.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Rahul Jain, Ji Yong Park, Kyu Oh Lee
  • Patent number: 10445050
    Abstract: An operating method of an image display apparatus includes detecting a screen aspect ratio of an input image; determining rotation control information regarding a tiled display of the image display apparatus, the tiled display including a plurality of individually rotatable display modules, according to the detected screen aspect ratio of the input image; rotating each of the plurality of display modules according to the determined rotation control information; and controlling the plurality of display modules to display the input image according to the determined rotation control information.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: October 15, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-yong Park, Sang-kyun Im, Young-hoon Cho
  • Publication number: 20190310546
    Abstract: Provided are a decoration sheet and a method for producing same, the decoration sheet sequentially comprising a thermosetting resin layer, a deposition layer, and a base layer, wherein the thermosetting resin layer has a micropattern on a surface thereof, and the elongation rate of the sheet is 200% to 300%.
    Type: Application
    Filed: October 31, 2017
    Publication date: October 10, 2019
    Inventors: Geo-Hyeok LIM, Seung-Hun LEE, Ji-Yong PARK, Han-Na LEE