Patents by Inventor Jianmin Fang

Jianmin Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10805849
    Abstract: A handover method includes: transmitting a handover request message by a source base station to a target base station when a user equipment (UE) is being handed over from the source base station to the target base station, where the handover request message carries one or more DRB information items configured by the source base station for the UE and one or more flow QoS information items configured by a core network side for the UE; receiving, by the source base station, a handover request acknowledgement message transmitted by the target base station, where the handover request acknowledgement message carries first DRB configuration information generated by the target base station for the UE; and transmitting an RRC connection reconfiguration message carrying the first DRB configuration information by the source base station to the UE. Also disclosed is a handover apparatus.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: October 13, 2020
    Assignee: ZTE Corporation
    Inventors: Jianmin Fang, Xiaojuan Shi
  • Publication number: 20200289663
    Abstract: The present invention relates to the use of an anti-HER2 antibody-drug conjugate (ADC) in preparing a drug for treating urothelial carcinoma. The drug is safe and effective for patients with urothelial carcinoma, especially locally advanced or metastatic urothelial carcinoma, and can effectively prolong the survival time of the patients.
    Type: Application
    Filed: August 19, 2019
    Publication date: September 17, 2020
    Inventor: Jianmin FANG
  • Patent number: 10772965
    Abstract: The present invention provides novel and advantageous compositions having a linker capable of covalently coupling one or more free thiols of an antibody. Specifically, provided herein are the molecular structures, synthetic pathways, coupling mechanisms, and applications thereof as used in an antibody-drug conjugate (ADC).
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: September 15, 2020
    Assignee: RC Biotechnologies, Inc.
    Inventors: Changjiang Huang, Jianmin Fang, Hui Ye, Lezhi Zhang
  • Publication number: 20200190210
    Abstract: Use of the extracellular loop 1 (ECL 1) of TM4SF1 as a target for cancer treatment. More specifically, specific binding of antibodies of the ECL1 of TM4SF1 and peptides of ECL1.
    Type: Application
    Filed: September 12, 2018
    Publication date: June 18, 2020
    Inventors: Jianmin FANG, Hua GAO, Guang CHEN, Yanxin YIN, Jia GUO
  • Publication number: 20200178109
    Abstract: Described are techniques for providing, a quality of service (QoS) update from a control plane of a base station to a user plane of the base station based on a QoS event, wherein the QoS update includes information indicative of a mapping between a QoS flow and corresponding radio resources for user data transmission, storing, at the user plane, the mapping between the QoS flow and the radio resources, receiving, at the user plane, a downstream data packet of the QoS flow from a core network, and transmitting the downstream data packet in a downlink direction using the corresponding radio resources.
    Type: Application
    Filed: February 5, 2020
    Publication date: June 4, 2020
    Inventors: Jianmin Fang, He Huang, Yin Gao
  • Publication number: 20200138968
    Abstract: The present disclosure relates to a process for preparing an intermediate of antibody-drug conjugate. Compared with the conventional art, the process for preparing an intermediate of the antibody-drug conjugate provided by the present disclosure significantly reduces the feed loss for drug moiety, such as MMAD/MMAE or MMAF, etc., as drug moiety is involved in the last step of the reaction, thereby effectively reducing production costs, as well as increasing production efficiency. In addition, the process provided by the present disclosure is simple, environmentally friendly and suitable for large-scale industrialization.
    Type: Application
    Filed: May 20, 2019
    Publication date: May 7, 2020
    Inventors: Changjiang HUANG, Hui YE, Xuejing YAO, Haohua JIE, Shizhong ZHAI, Jianmin FANG
  • Patent number: 10622293
    Abstract: A semiconductor device has a semiconductor die with an encapsulant deposited over and around the semiconductor die. An interconnect structure is formed over a first surface of the encapsulant. An opening is formed from a second surface of the encapsulant to the first surface of the encapsulant to expose a surface of the interconnect structure. A bump is formed recessed within the opening and disposed over the surface of the interconnect structure. A semiconductor package is provided. The semiconductor package is disposed over the second surface of the encapsulant and electrically connected to the bump. A plurality of interconnect structures is formed over the semiconductor package to electrically connect the semiconductor package to the bump. The semiconductor package includes a memory device. The semiconductor device includes a height less than 1 millimeter. The opening includes a tapered sidewall formed by laser direct ablation.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 14, 2020
    Assignee: JCET Semiconductor (Shaoxing) Co., Ltd.
    Inventors: Seung Wook Yoon, Jose A. Caparas, Yaojian Lin, Pandi C. Marimuthu, Kang Chen, Xusheng Bao, Jianmin Fang
  • Patent number: 10607946
    Abstract: A semiconductor device has a first encapsulant deposited over a first carrier. A plurality of conductive vias is formed through the first encapsulant to provide an interconnect substrate. A first semiconductor die is mounted over a second carrier. The interconnect substrate is mounted over the second carrier adjacent to the first semiconductor die. A second semiconductor die is mounted over the second carrier adjacent to the interconnect substrate. A second encapsulant is deposited over the first and second semiconductor die, interconnect substrate, and second carrier. A first interconnect structure is formed over a first surface of the second encapsulant and electrically connected to the conductive vias. A second interconnect structure is formed over a second surface of the second encapsulant and electrically connected to the conductive vias to make the Fo-WLCSP stackable. Additional semiconductor die can be mounted over the first and second semiconductor die in a PoP arrangement.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: March 31, 2020
    Assignee: JCET Semiconductor (Shaoxing) Co., Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Xia Feng, Kang Chen
  • Publication number: 20200087412
    Abstract: The present invention relates to a novel asymmetric bispecific antibody. The present invention also relates to a method for preparing the asymmetric bispecific antibody and a method of treating a disease using the antibody.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 19, 2020
    Applicant: SHANGHAI TONGJI HOSPITAL
    Inventors: Jianmin FANG, Bingyu LI
  • Publication number: 20200092764
    Abstract: Provided are a handover method and device involving multiple core networks. The method includes: transmitting, by a first base station, a handover request message to a second base station directly transmitting or through a core network; receiving, by the first base station, a feedback message from the core network or the second base station, where the feedback message carries at least one of: information about a core network suggested to be handed over, a failure reason.
    Type: Application
    Filed: March 21, 2018
    Publication date: March 19, 2020
    Inventors: He HUANG, Jianmin FANG, Xiaojuan SHI
  • Publication number: 20200077302
    Abstract: Disclosed are a method and apparatus for session offloading, a device, and a storage medium. The method includes following steps: a primary base station determines a session aggregation maximum bit rate (AMBR) of an offloaded session at a secondary base station; and the primary base station sends the session AMBR at the secondary base station to the secondary base station.
    Type: Application
    Filed: April 18, 2018
    Publication date: March 5, 2020
    Inventors: Jianmin FANG, Xiaojuan SHI
  • Patent number: 10537644
    Abstract: The present invention provides novel and advantageous compositions having a linker capable of covalently coupling one or more free thiols of an antibody. Specifically, provided herein are the molecular structures, synthetic pathways, coupling mechanisms, and applications thereof as used in an antibody-drug conjugate (ADC).
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: January 21, 2020
    Assignee: RC BIOTECHNOLOGIES, INC.
    Inventors: Chang Jiang Huang, Jianmin Fang, Hui Ye, Lezhi Zhang
  • Publication number: 20200015116
    Abstract: Provided is a method, network device and system for implementing data processing. The method includes: transmitting, by a first network device, a request message to a second network device; feeding, by the second network device, a response message back to the first network device according to the request message received from the first network device; receiving, by the first network device, the response message fed back by the second network device, and transmitting an indication message to a third network device; and receiving, by the third network device, the indication message transmitted by the first network device, and processing data according to the indication message. The embodiments of the present application implement data splitting and handover processing for a next-generation mobile communication technology.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 9, 2020
    Applicant: ZTE CORPORATION
    Inventors: He HUANG, Jianmin FANG, Xiaojuan SHI
  • Publication number: 20190261240
    Abstract: A handover method includes: transmitting a handover request message by a source base station to a target base station when a user equipment (UE) is being handed over from the source base station to the target base station, where the handover request message carries one or more DRB information items configured by the source base station for the UE and one or more flow QoS information items configured by a core network side for the UE; receiving, by the source base station, a handover request acknowledgement message transmitted by the target base station, where the handover request acknowledgement message carries first DRB configuration information generated by the target base station for the UE; and transmitting an RRC connection reconfiguration message carrying the first DRB configuration information by the source base station to the UE. Also disclosed is a handover apparatus.
    Type: Application
    Filed: May 2, 2019
    Publication date: August 22, 2019
    Inventors: Jianmin Fang, Xiaojuan Shi
  • Patent number: 10211183
    Abstract: A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: February 19, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Patent number: 10204866
    Abstract: A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: February 12, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Kang Chen, Jianmin Fang, Xia Feng
  • Patent number: 10200948
    Abstract: The disclosure discloses a method and device for controlling energy saving and compensation. The method for controlling energy saving and compensation includes that: cell load measurement results of all cells in an energy saving and compensation group are acquired, the energy saving and compensation group including energy saving cells and compensation cells; and according to the cell load measurement results and an energy saving and compensation policy, at least one cell in the energy saving and compensation group are controlled to enter or quit energy saving. By means of the disclosure, energy saving and compensation can be globally controlled, thereby reducing the complexity of determining energy saving and compensation cells.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: February 5, 2019
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO., LTD.
    Inventors: Liping Chen, Weihong Zhu, Jianmin Fang
  • Patent number: 10192801
    Abstract: A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: January 29, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Patent number: 10163815
    Abstract: A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. A contact pad is formed over an active surface of the semiconductor die. A protective pattern is formed over the active surface of the semiconductor die between the contact pad and saw street of the semiconductor die. The protective pattern includes a segmented metal layer or plurality of parallel segmented metal layers. An insulating layer is formed over the active surface, contact pad, and protective pattern. A portion of the insulating layer is removed to expose the contact pad. The protective pattern reduces erosion of the insulating layer between the contact pad and saw street of the semiconductor die. The protective pattern can be angled at corners of the semiconductor die or follow a contour of the contact pad. The protective pattern can be formed at corners of the semiconductor die.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: December 25, 2018
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Xia Feng, Kang Chen, Jianmin Fang
  • Patent number: 10087260
    Abstract: Disclosed are an anti-HER2 antibody and conjugate of the anti-HER2 antibody and small molecule medicine. Also disclosed are uses of the antibody and conjugate thereof in preparing medicine for treating tumor.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: October 2, 2018
    Assignee: REMEGEN, LTD.
    Inventors: Jianmin Fang, Changjiang Huang, Jing Jiang, Xuejing Yao, Hongwen Li, Qiaoyu Xu, Zhuanglin Li