Abstract: The present disclosure relates to a semiconductor package, a semiconductor bonding structure and a method of fabricating the same. The semiconductor package includes a first chip, a second chip and a conductive structure, wherein the conductive structure is disposed at a side of the second chip and over a second upper surface of the first interconnection structure to electrically connect to the first interconnection structure. The semiconductor bonding structure includes a first substrate, a plurality of first interconnection structures, a plurality of chips and a plurality of conductive structures, wherein the conductive structures are respectively disposed at a side of each of the chips and over a second upper surface of each first interconnection structure, to electrically connect to each first interconnection.

Abstract: A semiconductor package includes a die stack including a first semiconductor die having a first interconnect structure, and a second semiconductor die having a second interconnect structure direct bonding to the first interconnect structure of the first semiconductor die. The second interconnect structure includes connecting pads disposed in a peripheral region around the first semiconductor die. First connecting elements are disposed on the connecting pads, respectively. A substrate includes second connecting elements on a mounting surface of the substrate. The first connecting elements are electrically connected to the second connecting elements through an anisotropic conductive structure.

Abstract: An electrostatic discharge (ESD) protection circuit includes a first and second diode in a semiconductor wafer, an ESD clamp circuit and a first conductive structure on a backside of a semiconductor wafer. The first diode is coupled between an input output (IO) pad and a first node. The second diode is coupled to the first diode, and coupled between the IO pad and a second node. The ESD clamp circuit is in the semiconductor wafer, coupled to the first and second node, and between the first and second diode. The ESD clamp circuit includes a first signal tap region in the semiconductor wafer that is coupled to a reference voltage supply. The second diode is coupled to and configured to share the first signal tap region with the ESD clamp circuit. The first conductive structure is configured to provide a reference voltage to the first signal tap region.

Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus, comprises: an internal circuit patterned in a device wafer and electrically coupled between a first node and a second node, an array of electrostatic discharge (ESD) circuits patterned in a carrier wafer, where the ESD circuits are electrically coupled between a first node and a second node and configured to protect the internal circuit from transient ESD events, and where the device wafer is bonded to the carrier wafer.

Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.

Abstract: Described is a method for detecting a calibration requirement for image sensors in a vehicle. The method includes detecting a ground pattern in a generated image associated with a surrounding of a vehicle. The method includes extracting at least one key point associated with the detected ground pattern, from the generated image. The method includes determining a relative motion parameter associated with the extracted at least one key point based on tracking of the extracted at least one key point over a period of time. The method further includes detecting the calibration requirement for the image sensor based on the determined relative motion parameter and generating an output signal based on the detected calibration requirement.

Abstract: Provided is an application of trehalase in fermentative production. The trehalase has amino acid sequences shown in SEQ ID NO.6, SEQ ID NO.7, and SEQ ID NO.8. Provided are methods for producing and applying trehalase, particularly being applied in the production and fermentation of alcohol and an amino acid.

Abstract: Carbon fiber and method of forming the same are provided. The method modifies proportion of a finishing oil to control a relation between a surface tension and a particle size of the finishing oil, and thus penetration of the finishing oil into an interior of the carbon fiber is avoided. Therefore, the carbon fiber can have both low oil residues and a high strength.

Abstract: A method of making a semiconductor device includes manufacturing doped zones in a first semiconductor material over a substrate. The method further includes forming an isolation structure between adjacent doped zones of the first semiconductor material. The method further includes manufacturing lines extending in a first direction over the doped zones of the first semiconductor material, wherein each of the lines has a line width measured along a second direction perpendicular to the first direction. The method further includes trimming the lines into line segments having ends over the isolation structure. The method further includes etching a transistor gate electrode over the substrate, wherein transistor gate electrode has a gate electrode width measured along the second direction, and wherein the line width is substantially similar to the gate electrode width.

Abstract: Systems and methods for protecting a device from an electrostatic discharge (ESD) event are provided. A resistor-capacitor (RC) trigger circuit and a driver circuit are provided. The RC trigger circuit is configured to provide an ESD protection signal to the driver circuit. A discharge circuit includes a first metal oxide semiconductor (MOS) transistor and a second MOS transistor connected in series between a first voltage potential and a second voltage potential. The driver circuit provides one or more signals for turning the first and second MOS transistors on and off.

Abstract: An optical transceiver includes optical circuitry disposed on a substrate and comprising a transmitter and a receiver. The circuitry includes least one multi-mode interferometer (MMI), including a multi-mode waveguide comprising an input face and an output face, the input and output faces being bisected by a longitudinal axis, the multi-mode waveguide having a predefined width transverse to the longitudinal axis. Ports are coupled to respective waveguides and are configured to launch one or more input beams through the input face and receive one or more output beams from the output face. The ports include, on at least one of the faces, two or more ports at respective locations that are offset transversely from the longitudinal axis by at least ?0/300 from respective base transverse displacements that are equal to integer fractions of the width.

Abstract: The present disclosure relates to the technical field of rapid detection of molecules, and specifically relates to a method for rapid fluorescent immunoassay (FIA) and chemiluminescent immunoassay (CLIA) based on electrokinetic acceleration. The method includes the following steps sequentially: S1. sample acceleration: applying an actuating signal to a chip on which a target molecule is dripped to obtain a chip binding to the target molecule, where the chip includes an electrode sheet and coating molecules is immobilized on the electrode sheet; and S2. secondary antibody acceleration: adding a secondary antibody for binding to the target molecule dropwise on the chip binding to the target molecule, and applying an actuating signal to the chip to obtain a chip binding to the secondary antibody. The method can effectively improve a rate of FIA and CLIA, and can speed up a detection process and meet the need for rapid point-of-care testing (POCT).

Abstract: A semiconductor device includes a substrate, a lower supporting layer, an upper supporting layer, and a lower electrode. The lower supporting layer is disposed on the substrate. The upper supporting layer is disposed on the lower supporting layer. The upper supporting layer defines an opening. The lower electrode is disposed within the opening of the upper supporting layer. The lower electrode has a first portion with a first vertical length and a second portion with a second vertical length different from the first vertical length.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a substrate; forming a lower supporting layer on the substrate; forming an upper supporting layer on the lower supporting layer, wherein the upper supporting layer defines an opening; and forming a lower electrode within the opening of the upper supporting layer, wherein the lower electrode has a first portion with a first vertical length and a second portion with a second vertical length different from the first vertical length.

Abstract: An electrostatic discharge (ESD) protection circuit includes a first diode, a second diode, an ESD clamp circuit and a first conductive structure on a backside of a semiconductor wafer, and being coupled to the first voltage supply. The first diode is in the semiconductor wafer, and coupled between an IO pad and a first node. The second diode is in the semiconductor wafer, coupled to the first diode and coupled between the IO pad and a second node. The ESD clamp circuit is in the semiconductor wafer, coupled between the first node and the second node, and further coupled to the first and second diode. The ESD clamp circuit includes a first signal tap region in the semiconductor wafer that is coupled to a first voltage supply. The first diode is coupled to and configured to share the first signal tap region with the ESD clamp circuit.

Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.

Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus, comprises: an internal circuit patterned in a device wafer and electrically coupled between a first node and a second node, an array of electrostatic discharge (ESD) circuits patterned in a carrier wafer, where the ESD circuits are electrically coupled between a first node and a second node and configured to protect the internal circuit from transient ESD events, and where the device wafer is bonded to the carrier wafer.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a doped well in the substrate, wherein the doped well comprises a first concentration of dopants of a first type in the substrate. The semiconductor device further includes a doped region in the substrate, wherein the doped region comprises a second concentration of the dopants of the first type, the doped region extends around the doped well, and the doped region is electrically insulated from the doped well. The semiconductor device further includes an active area, and wherein the active area comprises an emitter region and a collector region, wherein the emitter region is electrically connected to the doped region. The semiconductor device further includes a deep trench isolation (DTI) structure extending through the active area and between the emitter region and the collector region.

Abstract: An artificial respiration apparatus for first aid is provided, and relates to the field of medical first-aid supplies. The artificial respiration apparatus comprises an adhesive film, wherein a fixing block is provided on an upper end of the adhesive film; a first adhesive strip is provided on a lower end of the adhesive film; a second adhesive strip is also provided on the lower end of the adhesive film; and a blowing device is inserted in the fixing block. An intraoral ventilation pipe is inserted into the mouth of a person to be rescued, then the adhesive film is applied to the mouth and nose of the person to be rescued, and finally air is blown into a blowing port such that the blown air enters the body of the person to be rescued through a ventilation pipe, and the intraoral ventilation pipe.

Abstract: A hanger for supporting a held member from a holding member is provided with a seat member adapted for supporting the held member, first and second side members connected to the seat member, the first and second side members having lower portions and upper portions, the lower portions of the first and second side members each having inner an face and an outer face with the inner faces facing each other, and the upper portions of the first and second side members being connected to first and second back flanges respectively, the upper portions of the first and second side members each having an inner face and an outer face, and the first and second back flanges being adapted to be connected to the holding member by a plurality of fasteners, wherein the inner faces of the lower portions of the first and second side members and the inner faces of the upper portions of the first and second side members form reflex angles with each other.