Abstract: A data storage apparatus includes a nonvolatile memory device including a plurality of dies configured as a plurality of super blocks and a plurality of flush buffer blocks, an open super block manager configured to manage an index of an allocated open super block and a location into which data is to be written in the allocated open super block, an open flush buffer block manager configured to manage indexes of allocated open flush buffer blocks and locations into which data is to be written in the allocated open flush buffer blocks, and a processor configured to identify a first die in which a normal write operation is being performed and a second die next to the first die using the open super block manager, and select open flush buffer block included in dies other than the first die and the second die using the open flush buffer block manager.

Abstract: A data storage device includes a memory cell array comprising a plurality of pages each including K memory cells of which each stores N bits therein, where N and K are positive numbers greater than or equal to 2, wherein each of the pages stores one page data constituted by N subpage data each having K bits; a cache buffer receiving and caching N subpage data of first page data from a controller; and a page buffer sequentially buffering the respective cached N subpage data of the first page data and store the respective buffered N subpage data of the first page data in the memory cell array, wherein when a write operation for Mth subpage data of the first page data is completed, the cache buffer receives and caches Mth subpage data of second page data from the controller, where M is a positive number less than N.

Abstract: An encoding apparatus extracts features of an image by applying multiple padding operations and multiple downscaling operations to an image represented by data and transmits feature information indicating the features to a decoding apparatus. The multiple padding operations and the multiple downscaling operations are applied to the image in an order in which one padding operation is applied and thereafter one downscaling operation corresponding to the padding operation is applied. A decoding method receives feature information from an encoding apparatus, and generates a to reconstructed image by applying multiple upscaling operations and multiple trimming operations to an image represented by the feature information. The multiple upscaling operations and the multiple trimming operations are applied to the image in an order in which one upscaling operation is applied and thereafter one trimming operation corresponding to the upscaling operation is applied.

Abstract: A memory system includes: a memory device including a memory block, a page buffer, and first and second memory dies; a write buffer suitable for temporarily storing first and second data; a program managing unit suitable for controlling the memory device to sequentially perform first and second program operations on the memory block with the first and second data; a buffer managing unit suitable for managing the write buffer based on a scatter-gather scheme; a failure processing unit suitable for forcing the second program operation to fail, when the first program operation is a failure; and an error handling unit suitable for controlling the program managing unit to perform the first and second program operations again for the first and second data that are temporarily stored in the write buffer when the second program operation is forced to fail.

Abstract: A memory system includes a memory device and a controller. The memory device includes a memory block configured to store target data. The controller is configured to maintain the target data in a write buffer until a program operation to the memory block succeeds, update a write cache tag regarding the target data when the program operation fails and a read only mode is entered, and read the target data from the write buffer based on the write cache tag when a read command regarding the target data is received.

Abstract: A memory system includes: a memory device including a first memory buffer and a second memory buffer; a controller write buffer; a memory buffer manager suitable for controlling the memory device to buffer first data stored in the first memory buffer into the second memory buffer while the memory device programs, in a program operation, the first data into a memory block; a controller buffer manager suitable for deleting the first data stored in the controller write buffer after the memory device buffers the first data into the second memory buffer; and a failure processor suitable for controlling the memory device to perform a reprogram operation of reprogramming the first data, when the program operation fails.

Abstract: A memory system includes a memory device; a short super block detecting unit suitable for forming, when one or more initial bad blocks remain in an original super block after a re-mapping operation is performed and a number of the initial bad blocks is equal to or less than a predetermined threshold value within the original super block, a short super block with memory blocks included in the original super block; a bitmap generating unit suitable for generating a bitmap representing whether each of the memory blocks included in the short super block is a normal block or an initial bad block; and a processor suitable for controlling the memory device to simultaneously perform a normal operation on normal blocks among the memory blocks included in the short super block based on the bitmap.

Abstract: There are provided a memory system and an operating method thereof. The memory system includes: a memory device including a plurality of semiconductor memories; and a controller for generating a plurality of command queues respectively corresponding to the plurality of semiconductor memories by queuing a plurality of commands received from a host, and controlling the plurality of semiconductor memories to perform overall operations by outputting the plurality of commands queued in the plurality of command queues, wherein the controller holds a first command queue, among the plurality of command queues, corresponding to a first semiconductor memory, among the plurality of semiconductor memories, in which a program fail has occurred.

Abstract: A memory system and an operating method thereof are disclosed. An operating method of a memory system including a nonvolatile memory device and a controller configured to control the nonvolatile memory device includes the controller updating original data of firmware stored in the nonvolatile memory device, the controller transmitting a notification signal, which notifies a host device of completion of the updating of the original data, to the host device when the updating of the original data is completed, and the controller updating backup data of the firmware stored in the nonvolatile memory device after the notification signal is transmitted.

Abstract: An inter-prediction method and apparatus uses a reference frame generated based on deep learning. In the inter-prediction method and apparatus, a reference frame is selected, and a virtual reference frame is generated based on the selected reference frame. A reference picture list is configured to include the generated virtual reference frame, and inter prediction for a target block is performed based on the virtual reference frame. The virtual reference frame may be generated based on a deep-learning network architecture, and may be generated based on video interpolation and/or video extrapolation that use the selected reference frame.

Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. A transformed block is generated by performing a first transformation that uses a prediction block for a target block. A reconstructed block for the target block is generated by performing a second transformation that uses the transformed block. The prediction block may be a block present in a reference image, or a reconstructed block present in a target image. The first transformation and the second transformation may be respectively performed by neural networks. Since each transformation is automatically performed by the corresponding neural network, information required for a transformation may be excluded from a bitstream.

Abstract: A method according to one embodiment includes generating one or more key tables based on a first seed value; generating one or more secret values from a tweak value based on the one or more key tables; and performing encryption or decryption using the one or more secret values. An apparatus according to one embodiment includes a key table generator configured to generate one or more key tables based on a first seed value, a secret value generator configured to generate one or more secret values from a tweak value based on the one or more key tables, and an encryptor/decryptor configured to perform encryption or decryption using the one or more secret values.

Abstract: A method for operating a memory system which includes a memory device and a controller for controlling the memory device, the operating method includes searching one or more open memory blocks included in the memory device, when a booting operation is performed; detecting one or more erase pages included in each of the open memory blocks; checking an erase threshold voltage distribution corresponding to each of the erase pages; counting a number of first bad pages among the erased pages based on the erase threshold voltage distribution; and switching a first open memory block including the first bad pages among the open memory blocks into a first closed memory block when the number of first bad pages is equal to or greater than a first threshold value.

Abstract: Disclosed is a method for providing an in-game messenger service comprising: storing a game program in a platform server; associating an in-game messenger program for the game program; and transmitting the in-game messenger program associated with the game program to a user terminal as the game program is transmitted from the platform server to the user terminal.

Abstract: Provided herein may be a controller and a method of operating the controller. The controller may include a central processing unit configured to generate a command, manage a logical address using a notation system, a radix of which is greater than that of a binary notation system, and output the command and the logical address, and a flash interface layer configured to queue the command depending on workloads of dies, translate the logical address into a physical address, and output the command and the physical address through a selected channel.

Abstract: A memory system includes a controller suitable for providing first data, a cache program command corresponding to the first data, second data, and a normal program command corresponding to the second data; and a memory device suitable for programming the first data to a target die according to the cache program command, setting the target die to a normal state after the program operation for the first data is completed, and programming the second data to the target die according to the normal program command.

Abstract: In a memory controller included in a memory system for processing a program operation fail, the memory controller controls a plurality of memory devices commonly coupled to a channel, the plurality of memory devices respectively performing preset program operations, and includes: a buffer memory for storing data to be stored in the plurality of memory devices, based on a buffer memory index; and a program error processor for acquiring fail data corresponding to a program operation fail from a fail memory device and acquiring reprogram data that is data to be stored together with the fail data, based on the buffer memory index.

Abstract: Disclosed herein are a method and apparatus for video decoding and a method and apparatus for video encoding. A prediction block for a target block is generated by predicting the target block using a prediction network, and a reconstructed block for the target block is generated based on the prediction block and a reconstructed residual block. The prediction network includes an intra-prediction network and an inter-prediction network and uses a spatial reference block and/or a temporal reference block when it performs prediction. For learning in the prediction network, a loss function is defined, and learning in the prediction network is performed based on the loss function.

Abstract: A data storage device includes a storage unit; and a controller configured to select a write mode by analyzing a tendency of commands received from a host device, and operate in the selected write mode to write data to the storage or to read data from the storage.

Abstract: A display device includes a first display panel including a light emitting element; a light condensing element at a side portion of the first display panel; a light guide plate below the first display panel; The light condensing element transmits external light to the light guide plate.