Abstract: A method of fabricating a semiconductor device includes forming an insulation pattern including a mask region and an open region on a gallium nitride substrate, growing gallium nitride semiconductor layers to cover the insulation pattern, and patterning the semiconductor layers to form a plurality of semiconductor stacks separated from each other, the plurality of semiconductor stacks being electrically isolated from the gallium nitride substrate by the insulation pattern.

Abstract: The present invention relates to an insulating wire and, more particularly, to an insulating wire having partial discharge resistance that exhibits excellent partial discharge resistance and high partial discharge inception voltage and also excellences in the adhesion between the conductor and the insulation layer and the flexibility of the insulation layer, which insulating wire can be prepared by a simple process at a low production cost.

Abstract: A light-emitting diode includes a support substrate, a semiconductor stack disposed on the support substrate, the semiconductor stack including a p-type compound semiconductor layer, an active layer and a n-type semiconductor layer, a reflective metal layer disposed between the support substrate and the semiconductor stack, the reflective metal layer being in ohmic contact with the p-type compound semiconductor layer of the semiconductor stack and having a groove exposing a portion of the semiconductor stack, a first electrode pad contacting the n-type compound semiconductor layer of the semiconductor stack, an electrode extension connected to the first electrode pad, the electrode extension disposed directly over the groove along a line perpendicular to the support substrate, an upper insulation layer disposed between the first electrode pad and the semiconductor stack. The electrode extension includes an Ni layer contacting the n-type compound semiconductor layer, and two Au layers disposed on the Ni layer.

Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.

Abstract: An electronic device for synthesizing a frequency is provided. The electronic device includes a bank changer configured to output a channel code corresponding to a reference frequency signal and a feedback frequency signal, a channel code mapper configured to generate a changed channel code by applying an offset to the channel code output from the bank changer, and a voltage controlled oscillator configured to control a total capacitance of a plurality of capacitors based on the changed channel code and to oscillate a frequency dependent on the total capacitance.

Abstract: A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.

Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit, The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.

Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.

Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.

Abstract: A light emitting diode includes a light emitting structure including first and second conductive type semiconductor layers and an active layer disposed therebetween, a second hole formed through the active layer and the second conductive type semiconductor layer, and exposing the first conductive type semiconductor layer, a reflective metal layer contacting a portion of the light emitting structure, a cover metal layer contacting at least a portion of the reflective metal layer, a first insulation layer covering the reflective metal layer and the cover metal layer, an electrode layer disposed on the first insulation layer, the electrode layer covering the first insulation layer and filling the second hole, an electrode pad disposed on the light emitting structure, and a first hole formed through the first conductive type semiconductor layer and corresponding to the cover metal layer, in which the electrode pad overlaps the cover metal layer.

Abstract: A voltage controlled oscillator (VCO) in a frequency synthesizer generates an output signal having a target frequency by being coarse tuned in accordance with a channel code derived through a binary tree search. Thereafter, the output signal of the VCO may be further tuned using a phase lock loop (PLL) circuit. Each stage of the binary tree search includes a comparison step that determines a channel code bit, and another step that confirms that the channel code converges to a final channel code within an established stage range value.

Abstract: An exhaust heat recovery system may include a coolant circulation circuit arranged to connect an engine, an exhaust heat exchanger, a radiator, a water-cooled intercooler, and a sub-radiator, and controls each valve arranged on a passage which connects the engine, the exhaust heat exchanger, the radiator, the water-cooled intercooler, and the sub-radiator to the coolant circulation circuit according to the coolant temperature so as to control temperatures of coolant and intake air, thereby enabling the engine to be rapidly warmed up.

Abstract: Disclosed is an insulating winding wire having corona resistance, including a conductor and an insulation coating. The insulation coating includes a basal layer applied to cover the conductor and an outer layer applied to cover the basal layer. The basal layer includes at least one resin selected from the group consisting of polyvinylformal resin, polyurethane resin, heat-resistant polyurethane resin, polyester resin, polyester imide resin, polyamide imide resin, polyimide resin and polyamide resin. The basal layer includes 5 to 15 parts by weight of inorganic insulation particles and 1 to 3 parts by weight of an adhesive agent with respect to 100 parts by weight of the resin and the basal layer has a thickness 70 to 80% of the thickness of the insulation coating.

Abstract: According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.

Abstract: A light emitting device and a method of fabricating the same. The light emitting device includes a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells includes a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.

Abstract: A light-emitting diode includes a support substrate, a semiconductor stack disposed on the support substrate, the semiconductor stack including a p-type compound semiconductor layer, an active layer and a n-type semiconductor layer, a reflective metal layer disposed between the support substrate and the semiconductor stack, the reflective metal layer being in ohmic contact with the p-type compound semiconductor layer of the semiconductor stack and having a groove exposing a portion of the semiconductor stack, a first electrode pad contacting the n-type compound semiconductor layer of the semiconductor stack, an electrode extension connected to the first electrode pad, the electrode extension disposed directly over the groove along a line perpendicular to the support substrate, an upper insulation layer disposed between the first electrode pad and the semiconductor stack. The electrode extension includes an Ni layer contacting the n-type compound semiconductor layer, and two Au layers disposed on the Ni layer.

Abstract: Conductive line structures, and methods of forming the same, include first and second pattern structures, insulation layer patterns and an insulating interlayer. The first pattern structure includes a conductive line pattern and a hard mask stacked, and extends in a first direction. The second pattern structure includes a second conductive line pattern and another hard mask stacked, and at least a portion of the pattern structure extends in the first direction. The insulation layer patterns contact end portions of the pattern structures. The first pattern structure and an insulation layer pattern form a closed curve shape in plan view, and the second pattern structure and another insulation layer pattern form another closed curve shape in plan view. The insulating interlayer covers upper portions of the pattern structures and the insulation layer patterns, an air gap between the pattern structures, and another air gap between the insulation layer patterns.

Abstract: A memory device includes a substrate having common source regions thereon, common source lines extending along a surface of the substrate and contacting the common source regions, respectively, and channel structures extending away from the surface of the substrate between the common source lines. The common source lines define a unit cell of the memory device therebetween. The memory device further includes an electrode stack structure having interlayer insulating layers and conductive electrode layers that are alternately stacked along sidewalls of the channel structures. The conductive electrode layers define respective gates of selection transistors and memory cell transistors of the memory device. An isolation insulating layer, which includes a portion of a sacrificial layer, is disposed between adjacent ones of the interlayer insulating layers in the stack structure.

Abstract: According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.

Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.