Patents by Inventor Joon-Hee Lee

Joon-Hee Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Vertical cell-type semiconductor device having protective pattern
    Patent number: 9281414
    Abstract: According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 8, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Yeon Won, Joon-Hee Lee, Seung-Woo Paek, Dong-Seog Eun
  • Device and method for controlling output amplitude of voltage control oscillator in electronic device
    Patent number: 9252784
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Hee Lee, Jong-Won Choi, Young-Taek Lee, Byung-Hak Cho, Young-Gun Pu
  • Light emitting diode and method for manufacturing same
    Patent number: 9236533
    Abstract: Disclosed are a light-emitting diode and a method for manufacturing the same. A light-emitting diode according to one aspect of the present invention includes: a first conductive clad layer; a light-scattering pattern configured, in the first conductive clad layer, having a refractive index different from that of the first conductive clad layer; an active layer located under the first conductive clad layer; a second conductive clad layer located under the active layer; a first electrode configured to be electrically connected to the first conductive clad layer; and a second electrode configured to be electrically connected to the second conductive clad layer. The light-scattering pattern can improve light extraction efficiency.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: January 12, 2016
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Tae Hyuk Im, Chang Yeon Kim, Yeo Jin Yoon, Joon Hee Lee, Ki Bum Nam, Da Hye Kim, Chang Ik Im, Young Wug Kim
  • Apparatus for compensating for process variation of resistor in electronic circuit
    Patent number: 9231593
    Abstract: An electronic circuit apparatus for compensating for a process variation of a resistor in an electronic circuit is provided. The electronic circuit includes a detecting part for generating a tune voltage corresponding to a process variation value of the at least one resistor, and a compensating part for compensating for a process variation of the at least one resistor using the tune voltage.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: January 5, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Ho Lee, Seung-Pyo Hong, Ju-Ho Son, Seung-Ho Jang, Hyun-Tae Gill, Joon-Hee Lee, Yi-Ju Roh
  • SEMICONDUCTOR DEVICE INCLUDING DIFFERENT ORIENTATIONS OF MEMORY CELL ARRAY AND PERIPHERAL CIRCUIT TRANSISTORS
    Publication number: 20150348987
    Abstract: A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.
    Type: Application
    Filed: March 4, 2015
    Publication date: December 3, 2015
    Inventors: SUNG-HUN LEE, JONG-HO PARK, JOON-HEE LEE, HEE-JUENG LEE
  • MEMORY DEVICE
    Publication number: 20150340374
    Abstract: A method of manufacturing a memory device includes: providing a substrate; forming in a cell region a channel extending in a direction perpendicular to an upper surface of the substrate and a plurality of gate electrode layers and a plurality of insulating layers stacked alternatingly on the substrate to be adjacent to the channel; forming a plurality of circuit elements on the substrate at a peripheral circuit region disposed at a periphery of the cell region; and forming an interlayer insulating layer on the substrate in the cell region and the peripheral circuit region, the interlayer insulating layer including a first, bottom interlayer insulating layer covering the plurality of circuit elements and at least a portion of the plurality of gate electrode layers, and a second, top interlayer insulating layer disposed on the first interlayer insulating layer.
    Type: Application
    Filed: March 9, 2015
    Publication date: November 26, 2015
    Inventors: Won Seok JUNG, Joon Hee LEE, Keon Soo KIM, Sun Yeong LEE
  • NON-VOLATILE MEMORY DEVICES WITH VERTICALLY INTEGRATED CAPACITOR ELECTRODES
    Publication number: 20150318296
    Abstract: Provided is a vertical non-volatile memory device in which a capacitor constituting a peripheral circuit region is formed as a vertical type so that an area occupied by the capacitor in the entire device can be reduced as compared with a planar capacitor. Thus, a non-volatile memory device may be highly integrated and have a high capacity.
    Type: Application
    Filed: May 1, 2015
    Publication date: November 5, 2015
    Inventors: Hyun-suk Kim, Joon-hee Lee, Kee-jeong Rho
  • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    Publication number: 20150311384
    Abstract: A method of fabricating a semiconductor device includes forming an insulation pattern including a mask region and an open region on a gallium nitride substrate, growing gallium nitride semiconductor layers to cover the insulation pattern, and patterning the semiconductor layers to form a plurality of semiconductor stacks separated from each other, the plurality of semiconductor stacks being electrically isolated from the gallium nitride substrate by the insulation pattern.
    Type: Application
    Filed: July 10, 2015
    Publication date: October 29, 2015
    Inventors: Jeong Hun HEO, Yeo Jin Yoon, Joo Won Choi, Joon Hee Lee, Chang Yeon Kim, Su Young Lee
  • AUTOMATIC IN VITRO DIAGNOSTIC APPARATUS INCLUDING INCLINED ROTATING PLATE
    Publication number: 20150309063
    Abstract: According to the present invention, an automatic in vitro diagnosis apparatus including an inclined rotating stirrer is an apparatus for the automatic in vitro diagnosis of a clinical specimen or a reagent. The present invention includes: a clinical specimen storage unit which stores a clinical specimen; a reagent storage unit which stores a reagent; a code reader unit which recognizes an identification code attached to the clinical specimen storage unit or to the reagent storage unit; a dispenser which suctions the clinical specimen and the reagent from the clinical specimen storage unit and the reagent storage unit, and transports the clinical specimen and the reagent which are suctioned; and a rotating stirrer which receives the clinical specimen and the reagent from the dispenser and rotates about an axis of rotation so as to stir the clinical specimen and the reagent.
    Type: Application
    Filed: November 26, 2013
    Publication date: October 29, 2015
    Applicant: LG LIFE SCIENCES LTD.
    Inventors: Jae Hoon OH, Moon Kyu PARK, Seong Wook KIM, Joon Hee LEE
  • Light emitting diode
    Patent number: 9142715
    Abstract: An exemplary embodiment of the present invention relates to a light emitting diode (LED) including a substrate, a first nitride semiconductor layer arranged on the substrate, an active layer arranged on the first nitride semiconductor layer, a second nitride semiconductor layer arranged on the active layer, a third nitride semiconductor layer disposed between the first nitride semiconductor layer or between the second nitride semiconductor layer and the active layer, the third nitride semiconductor layer comprising a plurality of scatter elements within the third nitride semiconductor layer, and a distributed Bragg reflector (DBR) comprising a multi-layered structure, the substrate being arranged between the DBR and the third nitride semiconductor layer.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: September 22, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Chang Youn Kim, Joon Hee Lee, Jong Kyun You, Hong Chol Lim, Hwa Mok Kim
  • High efficiency light emitting diode
    Patent number: 9136432
    Abstract: Disclosed herein is a high efficiency light emitting diode. The light emitting diode includes: a semiconductor stack positioned over a support substrate; a reflective metal layer positioned between the support substrate and the semiconductor stack to ohmic-contact a p-type compound semiconductor layer of the semiconductor stack and having a groove exposing the semiconductor stack; a first electrode pad positioned on an n-type compound semiconductor layer of the semiconductor stack; an electrode extension extending from the first electrode pad and positioned over the groove region; and an upper insulating layer interposed between the first electrode pad and the semiconductor stack. In addition, the n-type compound semiconductor layer includes an n-type contact layer, and the n-type contact layer has a Si doping concentration of 5 to 7×1018/cm3 and a thickness in the range of 5 to 10 um.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: September 15, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jun Ho Yun, Ki Bum Nam, Joon Hee Lee, Chang Youn Kim, Hong Jae Yoo, Sung Hoon Hong
  • Semiconductor package and method of forming
    Patent number: 9129846
    Abstract: The semiconductor package includes: a package substrate comprising a bonding pad; a plurality of semiconductor chips stacked on the package substrate; and a bonding wire configured to electrically connect the semiconductor chips and the bonding pad. For at least one of the plurality of semiconductor chips: the semiconductor chip comprises: a semiconductor device; a first pad electrically connected to the semiconductor device; a conductive pattern; and a second pad electrically connected to the first pad, spaced apart from the conductive pattern, and extending over the conductive pattern; and the bonding wire is connected to the second pad.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: September 8, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-sang Song, In-Ku Kang, Joon-hee Lee, Kyung-man Kim
  • HIGH EFFICIENCY LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME
    Publication number: 20150243847
    Abstract: Exemplary embodiments of the present invention relate to a high-efficiency light emitting diode (LED).
    Type: Application
    Filed: April 23, 2015
    Publication date: August 27, 2015
    Inventors: Chang Yeon KIM, Da Hye Kim, Hong Chul Lim, Joon Hee Lee, Jong Kyun You
  • Semiconductor device and method of fabricating the same
    Patent number: 9111840
    Abstract: Exemplary embodiments of the present invention disclose a semiconductor device and a method of fabricating the same. The semiconductor device includes a gallium nitride substrate, a plurality of semiconductor stacks disposed on the gallium nitride substrate, and an insulation pattern disposed between the gallium nitride substrate and the plurality of semiconductor stacks, the insulation pattern insulating the semiconductor stacks from the gallium nitride substrate.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: August 18, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jeong Hun Heo, Yeo Jin Yoon, Joo Won Choi, Joon Hee Lee, Chang Yeon Kim, Su Young Lee
  • INSULATING WINDING WIRE HAVING CORONA RESISTANCE
    Publication number: 20150206624
    Abstract: The present invention relates to an insulating winding wire and, more particularly, to an insulating winding wire having corona resistance that has an insulation coating excellent not only in corona resistance but also in adhesion and flexibility.
    Type: Application
    Filed: January 23, 2014
    Publication date: July 23, 2015
    Applicant: LS Cable & System Ltd.
    Inventors: Hyung-Sam CHOI, Joon-Hee LEE, Chang-Kwon KONG, Jae-Wan PARK, Ki-Hong PARK
  • Light emitting device and method of fabricating the same
    Patent number: 9059015
    Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: June 16, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Won Cheol Seo, Joon Hee Lee, Jong Kyun You, Chang Youn Kim, Jin Cheul Shin, Hwa Mok Kim, Jang Woo Lee, Yeo Jin Yoon, Jong Kyu Kim
  • VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20150137216
    Abstract: A vertical memory device includes a substrate, a channel, gate lines and a connecting portion. A plurality of the channels extend in a first direction which is vertical to a top surface of a substrate. A plurality of the gate lines are stacked in the first direction to be spaced apart from each other and extend in a second, lengthwise direction, each gate line intersecting a set of channels and surrounding outer sidewalls of each channel of the set of channels. The gate lines forms a stepped structure which includes a plurality of vertical levels. A connecting portion connects a group of gate lines of the plurality of gate lines located at the same vertical level, the connecting portion diverging from the second direction in which the gate lines of the group of gate lines extend.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 21, 2015
    Inventors: Seok-Won LEE, Joon-Hee LEE, Dong-Seog EUN, Chang-Hyun LEE
  • DEVICE AND METHOD FOR CONTROLLING OUTPUT AMPLITUDE OF VOLTAGE CONTROL OSCILLATOR IN ELECTRONIC DEVICE
    Publication number: 20150130542
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Application
    Filed: September 17, 2014
    Publication date: May 14, 2015
    Inventors: Joon-Hee LEE, Jong-Won CHOI, Young-Taek LEE, Byung-Hak CHO, Young-Gun PU
  • APPARATUS AND METHOD FOR COMPENSATING FOR PROCESS VARIATION IN ELECTRONIC DEVICE
    Publication number: 20150130514
    Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit. The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.
    Type: Application
    Filed: August 26, 2014
    Publication date: May 14, 2015
    Inventors: Joon-Hee LEE, Jong-Won CHOI, Sang-Wook HAN, Sung-Jun LEE, Young-Taek LEE, Young-Gun PU
  • High efficiency light emitting diode and method of fabricating the same
    Patent number: 9029888
    Abstract: Exemplary embodiments of the present invention relate to a high-efficiency light emitting diode (LED).
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: May 12, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Chang Yeon Kim, Da Hye Kim, Hong Chul Lim, Joon Hee Lee, Jong Kyun You