Patents by Inventor Joon-Hee Lee

Joon-Hee Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150102506
    Abstract: The semiconductor package includes: a package substrate comprising a bonding pad; a plurality of semiconductor chips stacked on the package substrate; and a bonding wire configured to electrically connect the semiconductor chips and the bonding pad. For at least one of the plurality of semiconductor chips: the semiconductor chip comprises: a semiconductor device; a first pad electrically connected to the semiconductor device; a conductive pattern; and a second pad electrically connected to the first pad, spaced apart from the conductive pattern, and extending over the conductive pattern; and the bonding wire is connected to the second pad.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 16, 2015
    Inventors: In-sang SONG, In-Ku KANG, Joon-hee LEE, Kyung-man KIM
  • Patent number: 8986833
    Abstract: Disclosed are enamel varnish compositions for an enamel wire and an enamel wire using the same. The present invention relates to enamel varnish compositions for an enamel wire in which a polymeric resin component is included in an organic solvent, wherein the polymeric resin component includes a first polyamideimide resin; and a second resin having polyamideimide in which a triazine ring is introduced into a major chain. The enamel wire, in which such a coating pigment composition is applied to the innermost layer, has the increased adhesivity of the insulated coating layer to the conducting wire, as well as the excellent physical properties such as the wear resistance and flexibility, etc.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: March 24, 2015
    Assignee: LS Cable Ltd.
    Inventor: Joon-Hee Lee
  • Publication number: 20150061132
    Abstract: Conductive line structures, and methods of forming the same, include first and second pattern structures, insulation layer patterns and an insulating interlayer. The first pattern structure includes a conductive line pattern and a hard mask stacked, and extends in a first direction. The second pattern structure includes a second conductive line pattern and another hard mask stacked, and at least a portion of the pattern structure extends in the first direction. The insulation layer patterns contact end portions of the pattern structures. The first pattern structure and an insulation layer pattern form a closed curve shape in plan view, and the second pattern structure and another insulation layer pattern form another closed curve shape in plan view. The insulating interlayer covers upper portions of the pattern structures and the insulation layer patterns, an air gap between the pattern structures, and another air gap between the insulation layer patterns.
    Type: Application
    Filed: November 4, 2014
    Publication date: March 5, 2015
    Inventors: Sok-Won LEE, Joon-Hee LEE, Jung-Dal CHOI, Seong-Min JO
  • Patent number: 8937327
    Abstract: A light emitting device having a plurality of light emitting cells is disclosed.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: January 20, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Won Cheol Seo, Dae Sung Kal, Joon Hee Lee, Chang Youn Kim
  • Publication number: 20140367722
    Abstract: Disclosed are a light-emitting diode and a method for manufacturing the same. A light-emitting diode according to one aspect of the present invention includes: a first conductive clad layer; a light-scattering pattern configured, in the first conductive clad layer, having a refractive index different from that of the first conductive clad layer; an active layer located under the first conductive clad layer; a second conductive clad layer located under the active layer; a first electrode configured to be electrically connected to the first conductive clad layer; and a second electrode configured to be electrically connected to the second conductive clad layer. The light-scattering pattern can improve light extraction efficiency.
    Type: Application
    Filed: December 21, 2012
    Publication date: December 18, 2014
    Inventors: Tae Hyuk Im, Chang Yeon Kim, Yeo Jin Yoon, Joon Hee Lee, Ki Bum Nam, Da Hye Kim, Chang Ik Im, Young Wug Kim
  • Patent number: 8884377
    Abstract: In one embodiment, first and second pattern structures respectively include first and second conductive line patterns and first and second hard masks sequentially stacked, and at least portions thereof extends in a first direction. The insulation layer patterns contact end portions of the first and second pattern structures. The first pattern structure and a first insulation layer pattern of the insulation layer patterns form a first closed curve shape in plan view, and the second pattern structure and a second insulation layer pattern of the insulation layer patterns form a second closed curve shape in plan view. The insulating interlayer covers upper portions of the first and second pattern structures and the insulation layer patterns, a first air gap between the first and second pattern structures, and a second air gap between the insulation layer patterns.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sok-Won Lee, Joon-Hee Lee, Jung-Dal Choi, Seong-Min Jo
  • Publication number: 20140300390
    Abstract: An electronic device for synthesizing a frequency is provided. The electronic device includes a bank changer configured to output a channel code corresponding to a reference frequency signal and a feedback frequency signal, a channel code mapper configured to generate a changed channel code by applying an offset to the channel code output from the bank changer, and a voltage controlled oscillator configured to control a total capacitance of a plurality of capacitors based on the changed channel code and to oscillate a frequency dependent on the total capacitance.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wook HAN, Sung-Jun LEE, In-Yup KANG, Thomas Byunghak CHO, Joon-Hee LEE, Si-Bum JUN, Jong-Won CHOI
  • Publication number: 20140284695
    Abstract: According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer.
    Type: Application
    Filed: January 9, 2014
    Publication date: September 25, 2014
    Inventors: Jin-Yeon WON, Joon-Hee LEE, Seung-Woo PAEK, Dong-Seog EUN
  • Publication number: 20140220343
    Abstract: The present invention relates to an insulating wire and, more particularly, to an insulating wire having partial discharge resistance that exhibits excellent partial discharge resistance and high partial discharge inception voltage and also excellences in the adhesion between the conductor and the insulation layer and the flexibility of the insulation layer, which insulating wire can be prepared by a simple process at a low production cost.
    Type: Application
    Filed: January 23, 2014
    Publication date: August 7, 2014
    Applicant: LS Cable & System Ltd.
    Inventors: Hyung-Sam CHOI, Joon-Hee Lee, Bo-Kyung Kim, Dong-Jin Seo, Jae-Geon Lee
  • Publication number: 20140209941
    Abstract: A light emitting device and a method of fabricating the same. The light emitting device includes a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells includes a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Applicant: Seoul Viosys Co., Ltd.
    Inventors: Won Cheol SEO, Joon Hee LEE, Jong Kyun YOU, Chang Youn KIM, Jin Cheul SHIN, Hwa Mok KIM
  • Publication number: 20140209952
    Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Applicant: Seoul Viosys Co., Ltd.
    Inventors: Kyung Hee YE, Chang Youn Kim, Jin Cheol Shin, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Patent number: 8791483
    Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: July 29, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Kyung Hee Ye, Chang Youn Kim, Jin Cheol Shin, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Patent number: 8772805
    Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: July 8, 2014
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Kyung Hee Ye, Chang Youn Kim, Jin Cheol Shin, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Publication number: 20140131729
    Abstract: Exemplary embodiments of the present invention disclose a semiconductor device and a method of fabricating the same. The semiconductor device includes a gallium nitride substrate, a plurality of semiconductor stacks disposed on the gallium nitride substrate, and an insulation pattern disposed between the gallium nitride substrate and the plurality of semiconductor stacks, the insulation pattern insulating the semiconductor stacks from the gallium nitride substrate.
    Type: Application
    Filed: October 14, 2013
    Publication date: May 15, 2014
    Applicant: SEOUL VIOSYS CO., LTD.
    Inventors: Jeong Hun HEO, Yeo Jin Yoon, Joo Won Choi, Joon Hee Lee, Chang Yeon Kim, Su Young Lee
  • Publication number: 20140110729
    Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Application
    Filed: December 23, 2013
    Publication date: April 24, 2014
    Applicant: Seoul Viosys Co., Ltd.
    Inventors: Won Cheol Seo, Joon Hee Lee, Jong Kyun You, Chang Youn Kim, Jin Cheol Shin, Hwa Mok Kim, Jang Woo Lee, Yeo Jin Yoon, Jong Kyu Kim
  • Patent number: 8648369
    Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: February 11, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Joon Hee Lee, Jong Kyun You, Chang Youn Kim, Jin Cheul Shin, Hwa Mok Kim, Jang Woo Lee, Yeo Jin Yoon, Jong Kyu Kim
  • Patent number: 8624159
    Abstract: An approach is provided for fabricating a light emitting diode using a laser lift-off apparatus. The approach includes growing an epitaxial layer including a first conductive-type compound semiconductor layer, an active layer and a second conductive-type compound semiconductor layer on a first substrate, bonding a second substrate, having a different thermal expansion coefficient from that of the first substrate, to the epitaxial layers at a first temperature of the first substrate higher than a room temperature, and separating the first substrate from the epitaxial layer by irradiating a laser beam through the first substrate at a second temperature of the first substrate higher than the room temperature but not more than the first temperature.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: January 7, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chang Youn Kim, Joon Hee Lee, Jong Kyun You, Hwa Mok Kim
  • Patent number: 8618565
    Abstract: Provided is a high-efficiency light emitting diode (LED) that includes: a support substrate; a semiconductor stack positioned on the support substrate, the semiconductor stack including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; a first electrode positioned between the support substrate and the semiconductor stack and in ohmic contact with the semiconductor stack; a first bonding pad positioned on a portion of the first electrode that is exposed outside of the semiconductor stack; and a second electrode positioned on the semiconductor stack. Protrusions are formed on exposed surfaces of the semiconductor stack. In addition, the second electrode may be positioned between the first electrode and the support substrate and contacted with the n-type compound semiconductor layer through openings of the semiconductor stack.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: December 31, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chang Youn Kim, Joon Hee Lee, Jong Kyun You, Hong Chol Lim
  • Patent number: 8609449
    Abstract: The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: December 17, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chang Youn Kim, Shiro Sakai, Hwa Mok Kim, Joon Hee Lee, Soo Young Moon, Kyoung Wan Kim
  • Publication number: 20130292645
    Abstract: Disclosed herein is a high efficiency light emitting diode. The light emitting diode includes: a semiconductor stack positioned over a support substrate; a reflective metal layer positioned between the support substrate and the semiconductor stack to ohmic-contact a p-type compound semiconductor layer of the semiconductor stack and having a groove exposing the semiconductor stack; a first electrode pad positioned on an n-type compound semiconductor layer of the semiconductor stack; an electrode extension extending from the first electrode pad and positioned over the groove region; and an upper insulating layer interposed between the first electrode pad and the semiconductor stack. In addition, the n-type compound semiconductor layer includes an n-type contact layer, and the n-type contact layer has a Si doping concentration of 5 to 7×1018/cm3 and a thickness in the range of 5 to 10 um.
    Type: Application
    Filed: December 6, 2011
    Publication date: November 7, 2013
    Applicant: Seoul Opto Device Co., Ltd.
    Inventors: Jun Ho Yun, Ki Bum Nam, Joon Hee Lee, Chang Youn Kim, Hong Jae Yoo, Sung Hoon Hong