Abstract: An optical system, disposed on an electrical device, including a movable portion, a connected portion, and a driving assembly. The movable portion is connected to an optical module. The connected portion connects the movable portion to the electrical device. The driving assembly drives the movable portion to move relative to the electrical device.

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.

Abstract: A dielectric layer is formed over a substrate, an anti-reflective layer is formed over the dielectric layer, and a first hardmask is formed over the anti-reflective layer. A via opening and a trench opening are formed within the dielectric layer using the anti-reflective layer and the first hardmask as masking materials. After the formation of the trench opening and the via opening, the first hardmask is removed. An interconnect is formed within the openings, and the interconnect has a via with a profile angle of between about 70° and about 80° and a depth ratio of between about 65% and about 70%.

Abstract: A liquid cooling heat exchange apparatus for memory modules comprising a thermal conduction assembly, fastening assembly, and first and second working fluid splitters is provided. The thermal conduction assembly, mounted on the memory nodules via the fastening assembly, comprises a pair of flat flexible conduits, each having at least one fluid passageway communicating with the first and second working fluid splitters, and a pair of cooling spreaders. The pair of flat flexible conduits is in thermal contact with heat producing chips of the memory modules, thermally coupling the first and second working fluid splitters together for transferring heat from the heat producing chips. The pair of cooling spreaders is in thermal contact with the pair of flat flexible conduits for transferring heat from the heat producing chips to the thermal conduction assembly. Each of the at least one fluid passageway is expandable.

Abstract: A dielectric layer is formed over a substrate, an anti-reflective layer is formed over the dielectric layer, and a first hardmask is formed over the anti-reflective layer. A via opening and a trench opening are formed within the dielectric layer using the anti-reflective layer and the first hardmask as masking materials. After the formation of the trench opening and the via opening, the first hardmask is removed. An interconnect is formed within the openings, and the interconnect has a via with a profile angle of between about 70° and about 80° and a depth ratio of between about 65% and about 70%.

Abstract: A method includes forming a 2-D material layer over a substrate, wherein the 2-D material layer comprises transition metal atoms and chalcogen atoms; forming a gate structure over the 2-D material layer; supplying chemical molecules to the 2-D material layer, such that atoms of the chemical molecules react with portions of the chalcogen atoms to weaken covalent bonds between the portions of the chalcogen atoms and the transition metal atoms; and forming source/drain contacts over the 2-D material layer, wherein contact metal atoms of the source/drain contacts form metallic bonds with the transition metal atoms of the 2-D material layer.

Abstract: An IC structure comprises a first transistor formed on a substrate, a first interconnect structure over the first transistor, a dielectric layer over the first interconnect structure, a plurality of 2D semiconductor islands on the dielectric layer, and a plurality of second transistors formed on the plurality of 2D semiconductor islands.

Abstract: A display panel includes a substrate, a first isolation structure, a second isolation structure and a plurality of light emitting structures. The first isolation structure is disposed on the substrate and includes a plurality of through holes. The second isolation substrate is laminated on the first isolation substrate and fills up the plurality of through holes of the first isolation substrate. The plurality of light emitting structures are disposed on the substrate and are isolated from each other via the second isolation structure.

Abstract: An electronic device and an antenna structure are provided. The electronic device includes a metal housing, a partition wall, a first antenna module, and a second antenna module. The metal housing has a T-shaped slot. The slot includes an opening end, a first closed end, and a second closed end. The partition wall is connected with the metal housing. The first antenna module has a first feeding element and a radiating element. The second antenna module has a second feeding element and an antenna array. The first antenna module and the second antenna module are respectively disposed on two sides of the partition wall, and the first antenna module is closer to the opening end than the second antenna module.

Abstract: An integrated circuit (IC) device includes a power control circuit including a first transistor and a second transistor of different types. The first transistor includes a gate terminal configured to receive a control signal, a first terminal electrically coupled to a first power supply node, and a second terminal electrically coupled to a second power supply node. The second transistor includes a gate terminal configured to receive the control signal, and first and second terminals configured to receive a predetermined voltage. The first transistor is configured to, in response to the control signal, connect or disconnect the first and second power supply nodes.

Abstract: A joint assembly configured to be connected to a tube and including a first joint, a second joint and an engagement sleeve. The first joint has a channel and an engagement recess. The engagement recess is located in the channel of the first joint. The second joint has a first end, a second end and a channel. The second end is opposite to the first end. The channel of the second joint extends from the first end to the second end. The first end of the second joint is inserted into the tube. The engagement sleeve is sleeved on the tube. The tube is at least partially clamped by the engagement sleeve and the first end of the second joint. The engagement sleeve has an engagement structure located at an end of the engagement sleeve.

Abstract: A method for laser carving of paint on an outer surface of a vehicle wheel includes a step of priming: priming an outer surface of the wheel to form a painted surface; a step of laser carving: carving the primer from a selected area of the wheel by laser to remove the painted surface from the selected area, the selected area having an exposed area with metallic luster, and a step of fine-polish: polishing the outer surface of the wheel to form a fine-polished area at the exposed area. The painted surface on the wheel can be quickly removed to disclose a selected area with metallic luster, while the wheel is prevented from corrosion so as to reduce manufacturing cost and increase precision.

Abstract: An illumination system includes first laser light sources, second laser light sources, an optical module, and a light homogenizing element. The first and second laser light sources respectively provide first and second beams. A light spot area formed when the second beams are emitted is different from that formed when the first beams are emitted. The optical module converts the first beams into spot-expanding beams which form a light spot area different from that of the first beams. The light homogenizing element includes a light incident face disposed on transmission paths of the second beams and the spot-expanding beams. A difference between light spot areas formed by the second beams and the spot-expanding beams on the light incident face is less than a difference between light spot areas formed when the second beams and the first beams are emitted. A projection apparatus having the illumination system is further disclosed.

Abstract: A method for manufacturing a three-dimensional semiconductor diode device comprises providing a substrate comprising a silicon substrate and a first oxide layer formed on the silicon substrate; depositing a plurality of stacked structures on the substrate, each of the stacked structures comprising a dielectric layer and a conductive layer; etching the stacked structures through a photoresist layer which is patterned to form at least one trench in the stacked structures, a bottom of the trench exposing the first oxide layer; depositing a second oxide layer on the stacked structures and the trench; depositing a high-resistance layer on the second oxide layer, the high-resistance layer comprising a first polycrystalline silicon layer and a first conductive compound layer; and depositing a low-resistance layer on the high-resistance layer, the low-resistance layer comprising a second polycrystalline silicon layer and a second conductive compound layer.

Abstract: A semiconductor device includes a substrate, a first well region, a second well region, an isolation region, a first resistor segment and a second resistor segment. The substrate includes a region having a first conductivity type. The first and the second well regions are disposed in the region of the substrate. The isolation region is disposed on the first and the second well regions. The first and the second resistor segments are electrically connected to each other and disposed on the isolation region. Moreover, the first and the second well regions are disposed directly under the first and the second resistor segments, respectively. The first and the second well regions do not overlap with each other in a vertical projection direction and have a second conductivity type that is opposite to the first conductivity type.

Abstract: An electronic device and an antenna structure are provided. The electronic device includes a metal housing, a partition wall, a first antenna module, and a second antenna module. The metal housing has a T-shaped slot. The slot includes an opening end, a first closed end, and a second closed end. The partition wall is connected with the metal housing. The first antenna module has a first feeding element and a radiating element. The second antenna module has a second feeding element and an antenna array. The first antenna module and the second antenna module are respectively disposed on two sides of the partition wall, and the first antenna module is closer to the opening end than the second antenna module.

Abstract: An integrated circuit (IC) device includes a functional circuit electrically coupled to a first power supply node and operable by a first power supply voltage on the first power supply node, and a power control circuit including a first transistor and a second transistor of different types. The first transistor includes a gate terminal configured to receive a control signal, a first terminal electrically coupled to the first power supply node, and a second terminal electrically coupled to a second power supply node. The second transistor includes a gate terminal configured to receive the control signal, and first and second terminals configured to receive a predetermined voltage. The first transistor is configured to, in response to the control signal, connect or disconnect the first and second power supply nodes to provide or cutoff power supply to the functional circuit.

Abstract: A crossing frames encoding management method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: reading a tag swap information corresponding to a first physical group; encoding a first data; storing a first part of the encoded first data to at least one first physical unit corresponding to a first tag information in the first physical group; and storing a second part of the encoded first data to at least one second physical unit corresponding to a second tag information in the first physical group according to the tag swap information. The first tag information corresponds to a first crossing frames encoding group. The second tag information corresponds to a second crossing frames encoding group. The first crossing frames encoding group is different from the second crossing frames encoding group.

Abstract: A semiconductor device includes a magnetic random access memory (MRAM). The MRAM comprises a plurality of MRAM cells including a first type MRAM cell and a second type MRAM cell. Each of the plurality of MRAM cells includes a magnetic tunneling junction (MTJ) layer including a pinned magnetic layer, a tunneling barrier layer and a free magnetic layer. A size of the MTJ film stack of the first type MRAM cell is different from a size of the MTJ film stack of the second type MRAM cell. In one or more of the foregoing and following embodiments, a width of the MTJ film stack of the first type MRAM cell is different from a width of the MTJ film stack of the second type MRAM cell.