Abstract: A positionable probe card includes a space transformer, a plurality of positioning pins, and a probe head. The space transformer includes a space transforming substrate, the space transforming substrate includes a plurality of apertures, and the positioning pins are respectively fixed in the apertures. The probe head includes a plurality of positioning holes, and the positioning pins are respectively inserted into corresponding positioning holes. In addition, a method of manufacturing a positionable probe card is also disclosed herein.

Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.

Abstract: A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.

Abstract: A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.

Abstract: Provided are an electrolytic copper foil, an electrode comprising the same, and a lithium ion battery comprising the same. The electrolytic copper foil has a drum side and a deposited side opposing to the drum side, wherein a nanoindentation hardness of the drum side is equal to or larger than 0.5 GPa and equal to or smaller than 3.5 GPa; and a lightness of the drum side is equal to or larger than 25 and equal to or smaller than 75.

Abstract: Provided are an electrodeposited copper foil, an electrode comprising the same, and a lithium-ion secondary battery comprising the same. The electrodeposited copper foil has a drum side and a deposited side opposing the drum side, wherein at least one of the drum side and the deposited side exhibits a void volume value (Vv) in the range of 0.17 ?m3/?m2 to 1.17 ?m3/?m2; and an absolute value of a difference between a maximum height (Sz) of the drum side and a Sz of the deposited side is in the range of less than 0.60 ?m.

Abstract: A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.

Abstract: Implementations of the present disclosure provide methods for preventing contact damage or oxidation after via/trench opening formation. In one example, the method includes forming an opening in a structure on the substrate to expose a portion of a surface of an electrically conductive feature, and bombarding a surface of a mask layer of the structure using energy species formed from a plasma to release reactive species from the mask layer, wherein the released reactive species form a barrier layer on the exposed surface of the electrically conductive feature.

Abstract: A method for fabricating a semiconductor device by using a plasma-enhanced atomic layer deposition apparatus. A substrate comprising a silicon substrate and a first oxide layer is provided. A plurality of stacked structures are deposited on the substrate, which comprises a dielectric layer and a conductive layer. The stacked structures are etched to form trenches. A second oxide layer is deposited by using a plasma-enhanced atomic layer deposition apparatus that includes a chamber, an upper electrode, a lower electrode, and a three-dimensional rotation device. The upper electrode is connected to a first radio-frequency power device. The upper electrode is configured to generate a plasma. The lower electrode is connected to a second radio-frequency power device. The three-dimensional rotation device drives the substrate to rotate. A high resistance layer is deposited on the second oxide layer. A low resistance layer is deposited on the high resistance layer.

Abstract: A method for manufacturing a three-dimensional semiconductor diode device comprises providing a substrate comprising a silicon substrate and a first oxide layer formed on the silicon substrate; depositing a plurality of stacked structures on the substrate, each of the stacked structures comprising a dielectric layer and a conductive layer; etching the stacked structures through a photoresist layer which is patterned to form at least one trench in the stacked structures, a bottom of the trench exposing the first oxide layer; depositing a second oxide layer on the stacked structures and the trench; depositing a high-resistance layer on the second oxide layer, the high-resistance layer comprising a first polycrystalline silicon layer and a first conductive compound layer; and depositing a low-resistance layer on the high-resistance layer, the low-resistance layer comprising a second polycrystalline silicon layer and a second conductive compound layer.

Abstract: A method for manufacturing a semiconductor device using a plasma-enhanced atomic layer deposition is provided. A substrate comprising a silicon substrate and a first oxide layer is provided. Stacked structures are deposited on the substrate, which comprises a dielectric layer and a conductive layer. The stacked structures are etched to form at least one trench. A second oxide layer is deposited on the stacked structures and the trench using a plasma-enhanced atomic layer deposition apparatus includes a chamber, an upper electrode including nozzles, and a lower electrode. The upper electrode is connected to a first radio-frequency power device configured to generate plasma and a second radio-frequency power device configured to clean the nozzles. The lower electrode is connected to a third radio-frequency power device. A high resistance layer is deposited on the second oxide layer and a low resistance layer is deposited on the high resistance layer.

Abstract: A method for manufacturing a film bulk acoustic resonance device is disclosed. The proposed method, wherein the device has a specific resonant frequency, includes: providing a substrate having a recess, wherein the recess has a height; configuring a first piezoelectric material layer on the substrate, and causing the recess to form an air gap; configuring a lower electrode on the first piezoelectric material layer; when the height is in a first range, causing a resonant frequency of the film bulk acoustic resonance device versus the height to have a first slope; when the height is in a second range, causing the resonant frequency versus the height to have a second slope; and causing the first slope to be smaller than the second slope.

Abstract: A method for manufacturing a film bulk acoustic resonance device is disclosed. The proposed method, wherein the device has a specific resonant frequency, includes: providing an upper electrode; providing a lower electrode; configuring a first piezoelectric material layer between the upper electrode and the lower electrode; configuring a resonant frequency determining metal layer on the upper electrode, wherein the resonant frequency determining metal layer has a thickness; causing a resonant frequency of the film bulk acoustic resonance device and the thickness to form a curve; and when the thickness on the curve changes linearly, causing the resonant frequency to change non-linearly.

Abstract: A synchronous rectifier controller controls a rectification power switch connected in series with a secondary winding between two power lines. The synchronous rectifier has a gate driver and a slew-rate detector. The gate driver drives the rectification power switch. The slew-rate detector detects a channel voltage of the rectification power switch, checks if a slew rate of the channel voltage exceeds a slope threshold. If the slew rate exceeds the slope threshold, the slew-rate detector turns the rectification power switch ON through the gate driver. If the slew rate is less than the slope threshold, the slew-rate detector reduces the slope threshold.

Abstract: A liquid cooling heat exchange apparatus for memory modules comprising a thermal conduction assembly, fastening assembly, and first and second working fluid splitters is provided. The thermal conduction assembly, mounted on the memory nodules via the fastening assembly, comprises a pair of flat flexible conduits, each having at least one fluid passageway communicating with the first and second working fluid splitters, and a pair of cooling spreaders. The pair of flat flexible conduits is in thermal contact with heat producing chips of the memory modules, thermally coupling the first and second working fluid splitters together for transferring heat from the heat producing chips. The pair of cooling spreaders is in thermal contact with the pair of flat flexible conduits for transferring heat from the heat producing chips to the thermal conduction assembly. Each of the at least one fluid passageway is expandable.

Abstract: A package structure of a roll-shaped thin film includes a thin film roll and a buffer layer. The thin film roll includes a winding core and a thin film wound around the winding core, and the buffer layer is wound around an outer circumference of the thin film. An end portion of the buffer layer is covered with an inner surface of an end portion of the thin film, and the thickness of the buffer layer is in a range of 1-20 mm.

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

Abstract: Provided are an electrodeposited copper foil, a current collector, an electrode, and a lithium-ion secondary battery comprising the same. The electrodeposited copper foil has a deposited side and a drum side opposite the deposited side. In a first aspect, ?RS between the deposited side and the drum side is at most about 95 MPa, and the deposited side exhibits a Vv in a range from about 0.15 ?m3/?m2 to about 1.35 ?m3/?m2. In a second aspect, the deposited side has a Sku of about 1.5 to about 6.5 and the deposited side exhibits a Vv in a range from about 0.15 ?m3/?m2 to about 1.35 ?m3/?m2. The characteristics are beneficial to improve the quality of the electrodeposited copper foil, thereby extending the charge-discharge cycle life of a lithium-ion secondary battery comprising the same.

Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A core layer and a dielectric layer are sequentially stacked over the package array. The core layer includes a plurality of cavities. A plurality of first conductive patches is formed on the dielectric layer above the cavities.