Patents by Inventor Jung Hwan Lee

Jung Hwan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230242618
    Abstract: An atelocollagen according to an embodiment is characterized in that, when analyzed by high-performance liquid chromatography (HPLC), a peak area (S?) for a ? chain is larger than a second peak area for an ? chain (S?2) so that, when a physiologically active material is loaded therein, the atelocollagen may decrease rapid initial release of the physiologically active material or may control reduction in effects of the physiologically active material due to too slow initial release. Further, the atelocollagen of the present invention may exhibit excellent cancer metastasis inhibitory effects.
    Type: Application
    Filed: June 29, 2021
    Publication date: August 3, 2023
    Inventors: Jung Hwan LEE, Se Na LEE, Do Young KIM, Da Gyeong LEE, Jong Ook LEE, Ji Ah CHOI
  • Publication number: 20230220399
    Abstract: One aspect according to the present disclosure relates to a novel nucleic acid ligand which is a new class of nucleic acid compound, the existence of which was considered impossible in the prior art. The novel nucleic acid ligand has specific binding affinity with respect to at least two different targets having three-dimensional structures, and the binding sites for the at least two targets are formed in or from a single nucleic acid ligand. The novel nucleic acid ligand according the present disclosure can simultaneously solve several problems of existing aptamers that the prior art could not solve. One aspect according to the present disclosure relates to a novel screening method for identifying the above-mentioned novel nucleic acid ligand. The novel screening method uses a step for sequentially contacting at least two different targets having three-dimensional structures to screen a novel nucleic acid ligand that was previously thought impossible.
    Type: Application
    Filed: May 7, 2021
    Publication date: July 13, 2023
    Applicant: INTEROLIGO CORPORATION
    Inventors: Jong Ook LEE, Jung Hwan LEE, Do Young KIM, Han Seul PARK, Se Na LEE, Da Gyeong LEE, So Yeon KIM, Ji Ah CHOI
  • Publication number: 20230217659
    Abstract: A semiconductor device includes a cell substrate including a cell array region and an extension region surrounding the cell array region, a mold structure including gate electrodes sequentially stacked on the cell substrate, channel structures disposed on the cell array region and intersecting the gate electrodes, a bit-line connected to at least some of the channel structures, a block isolation region cutting the mold structure, a source layer disposed between the cell substrate and the mold structure and connected to a side surface of each of the channel structures, and a support layer disposed between the source layer and the mold structure on upper surfaces of the cell substrate and the source layer. The support layer includes a support structure contacting the upper surface of the cell substrate. The support structure includes a peripheral portion surrounding the cell array region, and a mesh portion disposed on the extension region.
    Type: Application
    Filed: November 1, 2022
    Publication date: July 6, 2023
    Inventors: Jung-Hwan LEE, Sun Young LEE, Seok Hwa JUNG
  • Patent number: 11688795
    Abstract: A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: June 27, 2023
    Assignee: KEY FOUNDRY CO., LTD.
    Inventors: Hyun Kwang Shin, Jung Hwan Lee
  • Publication number: 20230197409
    Abstract: An antenna assembly, which is capable of controlling widely an etching rate in a plasma treatment process, and a plasma processing equipment including the same are provided. The antenna assembly provided to generate plasma includes a feeding line to which a radio frequency (RF) signal may be applied, and a coil member including a plurality of unit coils coupled to the feeding line and spaced apart from each other in a vertical direction at a predetermined gap.
    Type: Application
    Filed: December 18, 2022
    Publication date: June 22, 2023
    Applicant: SEMES CO., LTD.
    Inventors: Hyun Jin KIM, GALSTYAN OGSEN, Jung Hwan LEE, Dong Jun PARK, Sang Hyeok AHN
  • Publication number: 20230197411
    Abstract: An impedance matching circuit, which is provided for quick impedance matching, a power supply apparatus, and a plasma processing equipment including the same are provided. The impedance matching circuit includes a parallel capacitor array connected to a radio frequency (RF) power supply to generate a RF signal, and a series capacitor array connected to the RF power supply in series, wherein the parallel capacitor array or the series capacitor array includes a mechanical vacuum variable capacitor and an electrical switch capacitor module connected to the mechanical vacuum variable capacitor in parallel.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 22, 2023
    Applicant: SEMES CO., LTD.
    Inventors: Hyun Jin KIM, Jung Hwan LEE, Galstyan OGSEN, Sung Suk WI, Min Keun BAE
  • Patent number: 11679447
    Abstract: Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a chamber providing a space in which a substrate is treated, a support unit supporting the substrate inside the chamber, a laser unit irradiating laser to an edge region of the substrate, a vision unit capturing the edge region of the substrate to measure an offset value of the substrate, and an adjustment unit adjusting an irradiation location of the laser based on the offset value of the substrate.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: June 20, 2023
    Assignee: SEMES CO., LTD.
    Inventors: Soo Young Park, Ohyeol Kwon, Jun Keon Ahn, Jung Hwan Lee
  • Patent number: 11665896
    Abstract: A semiconductor device include a nonvolatile memory device, including a first well region formed in a substrate, a tunneling gate insulator formed on the first well region, a floating gate formed on the tunneling gate insulator, a control gate insulator formed on the substrate, a control gate formed on the control gate insulator, and a first source region and a first drain region formed on opposite sides of the control gate, respectively, and a first logic device, including a first logic well region formed in the substrate, a first logic gate insulator formed on the first logic well region, a first logic gate formed on the first logic gate insulator, wherein the first logic gate comprises substantially a same material as a material of the control gate of the nonvolatile memory device.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: May 30, 2023
    Assignee: KEY FOUNDRY CO., LTD.
    Inventors: Kwang Il Kim, Yang Beom Kang, Jung Hwan Lee, Min Kuck Cho, Hyun Chul Kim
  • Publication number: 20230160869
    Abstract: The present invention relates to a system for monitoring electrical properties of materials of deep bedrock samples for estimating nuclide movement in disposal site of spent fuel and, more specifically, to a system for monitoring electrical properties of materials of deep bedrock samples for estimating nuclide movement in disposal site of spent fuel which installs a tube wherein ring-shaped potential electrode is formed in multi layers inside a column; adheres the potential electrode to deep bedrock samples by pressing on the external side of the tube while filling the deep bedrock samples inside of the tube; and reproduces real condition of deep bedrock and monitors precisely by measuring electrical resistivity for each location of the deep bedrock samples while injecting nuclide and underground water to the inside the tube.
    Type: Application
    Filed: November 24, 2022
    Publication date: May 25, 2023
    Inventors: Hae Ryong JUNG, Min Seok KIM, Chang Min SHIN, Seung Hyun KIM, Hyung Ju YUN, Sang Hwan LEE, Man Ho HAN, Jung Hwan LEE
  • Patent number: 11636898
    Abstract: Provided herein may be a semiconductor memory device including a memory cell, a read and write circuit, a current sensing circuit, and control logic. The memory cell array includes a plurality of memory cells. The read and write circuit includes a plurality of page buffers coupled to the plurality of memory cells through a plurality of bit lines, respectively. The current sensing circuit is coupled to the read and write circuit through a plurality of sensing lines. The control logic is configured to control operations of the current sensing circuit and the read and write circuit. At least two page buffers among the plurality of page buffers are coupled to one of the plurality of sensing lines. The control logic controls the read and write circuit to simultaneously perform a current sensing operation for the at least two page buffers.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: April 25, 2023
    Assignee: SK hynix Inc.
    Inventors: Jung Mi Ko, Kwang Ho Baek, Seong Je Park, Young Don Jung, Ji Hwan Kim, Jung Hwan Lee
  • Publication number: 20230109869
    Abstract: Provided are compositions for preventing or treating cancer including Asarum maculatum Nakai extracts, or a fraction thereof. According to an aspect, an Asarum maculatum Nakai extract has an excellent anticancer efficacy against various cancers including diffuse-type gastric cancer, and a cancer treatment agent having an excellent effect may be developed by using the extract as an active ingredient.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 13, 2023
    Applicants: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hak Cheol KWON, Jaeyoung KWON, Seong-Hwan KIM, Jung Hwan LEE, Jin Wook CHA, Ho Seong HWANG, Won Kyu KIM, Yujin KWON, Suyeon CHO, Taek Joo LEE, Jung Hwa KANG, Wan Hee LEE, Hyunki KIM
  • Publication number: 20230084826
    Abstract: The present invention disclosed herein relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus that performs substrate processing through a pressure change between a high pressure and a low pressure. The substrate processing apparatus includes: a process chamber (100) comprising a chamber body (110) which has an opened upper portion and in which a through-hole (150) is defined in a bottom surface thereof, and a top lid (140) coupled to the upper portion of the chamber body (110) to define an inner space (S1); a substrate support (200) comprising a substrate support plate (210) which is installed in the process chamber (100) and on which a substrate (1) is seated on a top surface thereof, and a substrate support shaft (220) installed to pass through the through-hole (150) so as to support the substrate support plate (210).
    Type: Application
    Filed: September 1, 2022
    Publication date: March 16, 2023
    Applicant: WONIK IPS CO., LTD.
    Inventors: Tae Dong KIM, Jung Hwan LEE, Cheong Hwan JEONG, Sung Ho ROH, Young Jun KIM
  • Publication number: 20230073660
    Abstract: The present invention disclosed herein relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus in which a substrate is processed at a high pressure and a low pressure. The present invention discloses a substrate processing apparatus including: a process chamber having an inner space; a substrate support on which a substrate is seated on a top surface thereof; an inner lid part which is installed to be vertically movable in the inner space and of which a portion is in close contact with the bottom surface of the process chamber to define a sealed processing space in which the substrate support is disposed; a gas supply part configured to supply a process gas to the processing space; and an inner lid driving part configured to drive the vertical movement of the inner lid part.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Applicant: WONIK IPS CO., LTD.
    Inventors: Sung Ho ROH, Jung Hwan LEE, Cheong Hwan JEONG, Tae Dong KIM, Young Jun KIM, Moon Chul KUM, Chan Soo PARK, Mi Sook KIM, Yong Ki KIM
  • Publication number: 20230073851
    Abstract: The present invention relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus in which a substrate is processed at a high pressure and a low pressure. The substrate processing apparatus of the present invention includes: a process chamber (100) including a chamber body (110) which has an opened upper portion and in which an installation groove (130) is defined at a central side of a bottom surface (120) thereof, and a gate (111) configured to load/unload a substrate (1) is disposed at one side thereof, and a top lid (140) coupled to the upper portion of the chamber body (110) to define an inner space (S1); a substrate support (200) installed to be inserted into the installation groove (130) of the chamber body (110) and having a top surface on which the substrate (1) is seated.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Applicant: WONIK IPS CO., LTD.
    Inventors: Tae Dong KIM, Jung Hwan LEE, Cheong Hwan JEONG, Sung Ho ROH, Young Jun KIM
  • Publication number: 20230072156
    Abstract: The present invention disclosed herein relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus that performs substrate processing through a pressure change between a high pressure and a low pressure. The present invention discloses a substrate processing apparatus including; a process chamber (100) comprising a chamber body (110) which has an opened upper portion, in which an installation groove (130) is defined at a central side of a bottom surface (120) thereof, and which comprises a gate (111) for loading/unloading a substrate (1) is disposed at one side thereof and a top lid (140) coupled to the upper portion of the chamber body (110) to define an inner space, a substrate support (200) installed to be inserted into the installation groove (130) of the chamber body (110) and having a top surface on which the substrate (1) is seated.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Applicant: WONIK IPS CO., LTD.
    Inventors: Sung Ho ROH, Jung Hwan LEE, Cheong Hwan JEONG, Tae Dong KIM, Young Jun KIM, Moon Chul KUM, Chan Soo PARK, Mi Sook KIM, Yong Ki KIM
  • Publication number: 20230070804
    Abstract: The present invention disclosed herein relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus in which a substrate is processed at a high pressure and a low pressure. The present invention discloses a substrate processing apparatus including: a process chamber (100) which has an inner space and in which an installation groove (130) is defined at a central side on a bottom surface (120); a substrate support (200) installed to be inserted into the installation groove (130) and having a top surface on which the substrate is seated; an inner lid part (300) which is installed to be movable vertically in the inner space and descends so that a portion thereof is in close contact with the bottom surface (120) adjacent to the installation groove (130) to define a sealed processing space (S2) in which the substrate support (200) is disposed therein.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Applicant: WONIK IPS CO., LTD.
    Inventors: Tae Dong KIM, Jung Hwan LEE, Cheong Hwan JEONG, Sung Ho ROH, Young Jun KIM, Moon Chul KUM, Chan Soo PARK, Mi Sook KIM, Yong Ki KIM
  • Patent number: 11591491
    Abstract: Provided is an ink composition for an inkjet print steel plate, an inkjet print steel plate using the same, and a method for producing an inkjet print steel plate. The ink composition comprises: a linear acrylate-based oligomer; a reactive acrylate-based monomer; an ultraviolet curable initiator; at least one selected from the group consisting of a dye and a pigment; and at least one selected from the group consisting of an antioxidant, an antifoaming agent, and a dispersant.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: February 28, 2023
    Assignee: POSCO CO., LTD
    Inventors: Jin-Tae Kim, Jung-Hwan Lee, Ha-Na Choi, Yon-Kyun Song
  • Publication number: 20230055235
    Abstract: The present invention relates to an aptamer or a functional fragment thereof, capable of specifically binding to PD-L1 or capable of inhibiting interaction between PD-1 and PD-L1 by specifically binding to PD-L1, which includes a nucleic acid sequence of SEQ ID NO. 1, 2, 10 or 18.
    Type: Application
    Filed: December 7, 2020
    Publication date: February 23, 2023
    Inventors: Jung Hwan LEE, Jong Ook LEE, Jin Woo KIM
  • Publication number: 20230059628
    Abstract: A semiconductor device includes: a logic region and a non-volatile memory (NVM) region; a logic gate insulating film disposed on a substrate in the logic region; at least one gate oxidation acceleration ion implantation layer disposed in the NVM region; at least one NVM gate insulating film disposed on the at least one gate oxidation acceleration ion implantation layer; a logic gate electrode disposed on the logic gate insulating film; and at least one NVM gate electrode disposed on the at least one NVM gate insulating film, wherein a thickness of the at least one NVM gate insulating film is equal or greater than a thickness of the logic gate insulating film.
    Type: Application
    Filed: May 13, 2022
    Publication date: February 23, 2023
    Applicant: KEY FOUNDRY CO., LTD.
    Inventors: Su Jin KIM, Min Kuck CHO, Jung Hwan LEE, In Chul JUNG
  • Publication number: 20230053444
    Abstract: A single poly non-volatile memory device is provided. The single poly non-volatile memory device is formed in a semiconductor substrate, and includes a sensing transistor, a selection transistor, and a capacitor, wherein a thickness of a selection gate insulating film is formed to be thicker than a thickness of a sensing gate insulating film, wherein a thickness of a control gate insulating film of the capacitor is formed to be the same, or greater than, a thickness of the sensing gate insulating film, and wherein the sensing gate of the sensing transistor and the control gate of the capacitor are physically and electrically connected to each other.
    Type: Application
    Filed: December 29, 2021
    Publication date: February 23, 2023
    Applicant: KEY FOUNDRY CO., LTD.
    Inventors: Su Jin KIM, Min Kuck CHO, Jung Hwan LEE, In Chul JUNG