Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.

Abstract: The present invention relates to a DNA aptamer specifically binding to a hepatocellular carcinoma-related Glypican-3 (GPC3) protein, treatment of cancers related to the Glypican-3 protein using the same, a composition for inhibiting a cancer and a composition for diagnosing a cancer comprising the same as an active ingredient.

Abstract: A three-dimensional semiconductor device includes gate electrodes including pad regions sequentially lowered by a first step portion in a first direction and sequentially lowered by a second step portion in a second direction perpendicular to the first direction, the second step portion being lower than the first step portion, wherein a length of a single pad region among pad regions sequentially lowered by the second step portion in the second direction is less than a length of a remainder of the pad regions in the second direction.

Abstract: A semiconductor device includes a soft repair control circuit configured to generate an enable signal, in response to a soft repair control signal, wherein the enable signal is enabled when first and second internal addresses counted in a refresh operation have the same combination as first and second failure addresses, and the semiconductor device also includes a core circuit including first, second, third, and fourth regions each including a plurality of word lines which are activated based on a combination of the first, the second, third, and fourth internal addresses, wherein the core circuit is configured to repair, in response to the enable signal, a word line in which a failure has occurred and which is included in a region selected among the first, second, third, and fourth regions by the third and fourth internal addresses.

Abstract: A semiconductor device can include a semiconductor substrate having a memory cell region and a pad region that is adjacent to the memory cell region, the pad region can include a first pad region, a second pad region between the memory cell region and the first pad region, and a buffer region that is between the first and second pad regions. A separation source structure can include a first portion and a second portion that are parallel to each other in a plan view of the semiconductor device. A first source structure and a second source structure can be disposed between the first and second portions of the separation source structure, where the first and second source structures can have end portions that oppose each other, the first source structure being disposed in the first pad region, and the second source structure being disposed in the second pad region.

Abstract: Disclosed are a water storage tank bladder, a manufacturing method therefor, the water storage tank including the bladder, and a water treatment apparatus including the water storage tank. According to one embodiment of the present invention, the water storage tank bladder used in the water storage tank to receive and store water and discharge the stored water has a lower side of which the thickness can be thicker than the thickness of the upper side of the bladder and thicker than the thickness of the lateral sides of the bladder.

Abstract: An apparatus for processing a substrate includes a process chamber, a support unit that supports the substrate in the process chamber, a gas supply unit that supplies a process gas, and a plasma source that generates plasma from the process gas. The support unit includes an electrostatic chuck, and the apparatus further includes a power supply that supplies a chucking voltage to the electrostatic chuck and a management unit that feedback controls a voltage applied to the power supply for each process and controls a heat transfer gas flow supplied between the substrate and the electrostatic chuck. The management unit includes a first monitoring unit that monitors a physical property change of the substrate. The management unit includes a first controller that performs control to compensate for the chucking voltage by feeding back a chucking force value corresponding to a preset reference value based on the monitored property changes.

Abstract: A semiconductor device includes a substrate including a recess, the recess being positioned below an isolation region and having a side portion including a plurality of stepped portions, a plurality of gate electrodes spaced apart from each other on the substrate, and stacked in a direction perpendicular to an upper surface of the substrate, a channel structure passing between a first set of the plurality of gate electrodes, and the isolation region passing between a second set of the plurality of gate electrodes, the isolation region extending from the upper surface of the substrate and having an inclined lateral surface.

Abstract: A cancer targeted therapeutic agent includes a drug-linker-AS1411 structure. The drug may be selected from monomethyl auristatin E (MMAE), monomethyl auristatin F (MMAF), cytarabine, gemcitabine, maytansine, DM1, DM4, calicheamicin and a derivative thereof, doxorubicin, duocarmycin and a derivative thereof, pyrrolobenzodiazepine (PBD), SN-38, a-amanitin, or a tubulysin analog.

Abstract: A drug delivery system includes an atelocollagen-[aptamer-drug] complex which is prepared by mixing an aptamer-drug conjugate comprised of an aptamer and a drug attached to the aptamer with an atelocollagen dispersion. The aptamer is selected from the group consisting of AS1411, CRO, and ERBB2, and the drug is selected from the group consisting of Gemcitabine, Doxorubicin, and siRNA. An anticancer composition including the drug delivery system can compensate for shortcomings of existing anticancer agents and anticancer therapies.

Abstract: A water discharge device is disclosed. A water discharge device according to an embodiment of the present invention may comprise: a main body having a flow channel formed therein such that water flows through the same and having a discharge opening connected to the flow channel and to the outside such that the water, which has flowed through the flow channel, is discharged to the outside; an opening/closing portion comprising an opening/closing member movably provided in the flow channel so as to open/close an opening/closing hole formed in the flow channel; and a manipulation portion that comprises a rotatable member, which rotates, and interworks with the main body and the opening/closing portion such that the opening/closing member is moved in the flow channel by a rotation of the rotatable member.

Abstract: A three-dimensional semiconductor device includes gate electrodes including pad regions sequentially lowered by a first step portion in a first direction and sequentially lowered by a second step portion in a second direction perpendicular to the first direction, the second step portion being lower than the first step portion, wherein a length of a single pad region among pad regions sequentially lowered by the second step portion in the second direction is less than a length of a remainder of the pad regions in the second direction.

Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.

Abstract: A semiconductor device includes a substrate including a recess, the recess being positioned below an isolation region and having a side portion including a plurality of stepped portions, a plurality of gate electrodes spaced apart from each other on the substrate, and stacked in a direction perpendicular to an upper surface of the substrate, a channel structure passing between a first set of the plurality of gate electrodes, and the isolation region passing between a second set of the plurality of gate electrodes, the isolation region extending from the upper surface of the substrate and having an inclined lateral surface.

Abstract: A method of manufacturing a transparent pattern printed steel plate includes forming a printed paint film layer by jetting transparent ink onto at least one surface of a steel plate, and curing the printed paint film layer with ultraviolet light to form a cured printed paint film layer. Further, a method of manufacturing a transparent pattern printed steel plate includes preparing a steel plate having a color painted film layer formed on at least one surface thereof, forming a printed paint film layer by jetting transparent ink onto the color painted film layer, and curing the printed paint film layer to form a cured printed paint film layer.

Abstract: A clothes treatment apparatus and a control method thereof are disclosed. The clothes treatment apparatus includes a fixed nozzle device and a moving nozzle device to supply at least one of steam and heated air to clothes. As a result, the clothes may be washed effectively or refreshed.

Abstract: A single poly multi time program (MTP) cell includes a second conductivity-type well, a sensing transistor comprising a drain, a sensing gate, and a source, a drain electrode connected to the drain, a source electrode connected to the source; a control gate connected to the sensing gate of the sensing transistor, and a control gate electrode, wherein the sensing transistor, the drain electrode, the source electrode, the control gate, and the control gate electrode are located on the second conductivity-type well.

Abstract: Provided herein may be a control logic, semiconductor memory device, method of operating the control logic, and or method of operating the semiconductor memory device. The semiconductor memory device may include a control logic. The control logic may be configured to control a program voltage to be applied to the selected word line. The control logic may be configured to control a pass voltage to be applied to an unselected word line.

Abstract: Provided herein is a semiconductor memory device and a method for operating the same. The semiconductor memory device may include a memory cell array including a plurality of memory blocks, each including dummy cells coupled to dummy word lines and normal memory cells coupled to normal word lines, a peripheral circuit configured to perform an erase operation on a memory block selected from among the plurality of memory blocks and control logic configured to control the peripheral circuit, during the erase operation, to apply a pre-program voltage pulse to the dummy word lines and the normal word lines, and to control application of dummy word line voltages to the dummy word lines based on Erase-Write (EW) cycling information while applying an erase voltage to a common source line of the selected memory block, wherein the EW cycling information indicates a number of erase-write cycles of the selected memory block.

Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.