Patents by Inventor Junya Maruyama
Junya Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100248402Abstract: A technique for forming a TFT element over a substrate having flexibility typified by a flexible plastic film is tested. When a structure in which a light-resistant layer or a reflective layer is employed to prevent the damage to the delamination layer, it is difficult to fabricate a transmissive liquid crystal display device or a light emitting device which emits light downward. A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.Type: ApplicationFiled: April 23, 2010Publication date: September 30, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junya MARUYAMA, Toru TAKAYAMA, Yumiko OHNO, Shunpei YAMAZAKI
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Publication number: 20100221870Abstract: An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed.Type: ApplicationFiled: May 10, 2010Publication date: September 2, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinji MAEKAWA, Gen FUJII, Junya MARUYAMA, Toru TAKAYAMA, Yumiko FUKUMOTO, Yasuyuki ARAI
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Publication number: 20100200871Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.Type: ApplicationFiled: April 23, 2010Publication date: August 12, 2010Inventors: Toshimitsu Konuma, Junya Maruyama
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Publication number: 20100195033Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.Type: ApplicationFiled: April 14, 2010Publication date: August 5, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yumiko OHNO, Masakazu MURAKAMI, Toshiji HAMATANI, Hideaki KUWABARA, Shunpei YAMAZAKI
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Publication number: 20100187534Abstract: An object of the present invention to provide a semiconductor device manufactured in short time by performing the step of forming the thin film transistor and the step of forming the photoelectric conversion layer in parallel, and to provide a manufacturing process thereof. According to the present invention, a semiconductor device is manufactured in such a way that a thin film transistor is formed over a first substrate, a photoelectric conversion element is formed over a second substrate, and the thin film transistor and the photoelectric conversion element are connected electrically by sandwiching a conductive layer between the first and second substrates opposed to each other so that the thin film transistor and the photoelectric conversion element are located between the first and second substrates. Thus, a method for manufacturing a semiconductor device which suppresses the increase in the number of steps and which increases the throughput can be provided.Type: ApplicationFiled: April 1, 2010Publication date: July 29, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kazuo NISHI, Junya MARUYAMA, Naoto KUSUMOTO, Yuusuke SUGAWARA
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Publication number: 20100167437Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.Type: ApplicationFiled: March 10, 2010Publication date: July 1, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO
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Patent number: 7745993Abstract: To provide a bright and highly reliable light-emitting device. An anode (102), an EL layer (103), a cathode (104), and an auxiliary electrode (105) are formed sequentially in lamination on a reflecting electrode (101). Further, the anode (102), the cathode (104), and the auxiliary electrode (105) are either transparent or semi-transparent with respect to visible radiation. In such a structure, lights generated in the EL layer (103) are almost all irradiated to the side of the cathode (104), whereby an effect light emitting area of a pixel is drastically enhanced.Type: GrantFiled: August 18, 2005Date of Patent: June 29, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takeshi Fukunaga, Junya Maruyama
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Patent number: 7746333Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.Type: GrantFiled: January 2, 2007Date of Patent: June 29, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
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Patent number: 7741642Abstract: The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.Type: GrantFiled: February 5, 2007Date of Patent: June 22, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Toru Takayama, Junya Maruyama, Yumiko Ohno, Masakazu Murakami, Toshiji Hamatani, Hideaki Kuwabara, Shunpei Yamazaki
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Publication number: 20100148179Abstract: A semiconductor device having a semiconductor element (a thin film transistor, a thin film diode, a photoelectric conversion element of silicon PIN junction, or a silicon resistor element) which is light-weight, flexible (bendable), and thin as a whole is provided as well as a method of manufacturing the semiconductor device. In the present invention, the element is not formed on a plastic film. Instead, a flat board such as a substrate is used as a form, the space between the substrate (third substrate (17)) and a layer including the element (peeled layer (13)) is filled with coagulant (typically an adhesive) that serves as a second bonding member (16), and the substrate used as a form (third substrate (17)) is peeled off after the adhesive is coagulated to hold the layer including the element (peeled layer (13)) by the coagulated adhesive (second bonding member (16)) alone. In this way, the present invention achieves thinning of the film and reduction in weight.Type: ApplicationFiled: December 11, 2009Publication date: June 17, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junya Maruyama, Toru Takayama, Yuugo Goto
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Publication number: 20100144070Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.Type: ApplicationFiled: January 6, 2010Publication date: June 10, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO, Mai AKIBA
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Patent number: 7732262Abstract: To provide a method for manufacturing a semiconductor device including a transfer step that is capable of controlling the adhesiveness of a substrate and an element-formed layer in the case of separating the element-formed layer including a semiconductor element or an integrated circuit formed over the substrate from the substrate and bonding it to another substrate. An adhesive agent made of a good adhesiveness material is formed between the semiconductor element or the integrated circuit comprising plural semiconductor elements formed over the substrate (a first substrate) and the substrate, and thus it is possible to prevent a semiconductor element from peeling off a substrate in manufacturing the semiconductor element, and further, to make it easier to separate the semiconductor element from the substrate by removing the adhesive agent after forming the semiconductor element.Type: GrantFiled: June 30, 2006Date of Patent: June 8, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Keitaro Imai, Toru Takayama, Yuugo Goto, Junya Maruyama, Yumiko Ohno
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Patent number: 7732824Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.Type: GrantFiled: November 3, 2006Date of Patent: June 8, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Junya Maruyama
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Patent number: 7727859Abstract: It is an object of the present invention to provide a semiconductor device in which a barrier property is improved; a compact size, a thin shape, and lightweight are achieved; and flexibility is provided. By providing a stacked body including a plurality of transistors in a space between a pair of substrates, a semiconductor device is provided, in which a harmful substance is prevented from entering and a barrier property is improved. In addition, by using a pair of substrates which are thinned by performing grinding and polishing, a semiconductor device is provided, in which a compact size, a thin shape, and lightweight are achieved. Further, a semiconductor device is provided, in which flexibility is provided and a high-added value is achieved.Type: GrantFiled: June 12, 2006Date of Patent: June 1, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Yasuko Watanabe, Junya Maruyama, Yoshitaka Moriya
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Patent number: 7727854Abstract: An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed.Type: GrantFiled: December 14, 2004Date of Patent: June 1, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinji Maekawa, Gen Fujii, Junya Maruyama, Toru Takayama, Yumiko Fukumoto, Yasuyuki Arai
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Patent number: 7723209Abstract: A technique for forming a TFT element over a substrate having flexibility typified by a flexible plastic film is tested. When a structure in which a light-resistant layer or a reflective layer is employed to prevent the damage to the delamination layer, it is difficult to fabricate a transmissive liquid crystal display device or a light emitting device which emits light downward. A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.Type: GrantFiled: December 22, 2003Date of Patent: May 25, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno, Shunpei Yamazaki
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Publication number: 20100120205Abstract: A manufacturing method of a wiring board and a semiconductor device at low cost and by a simple process, without performing complicated steps many times is proposed. Furthermore, a manufacturing method of a wiring board at low cost and with fewer adverse effects on the environment, and a manufacturing method of a semiconductor device using the wiring board are proposed. A pattern of a conductive material is formed over a first substrate, a conductive film is formed over the pattern by an electrolytic plating process, the pattern and the conductive film are separated, an IC chip including at least one thin film transistor is formed over a second substrate, and the conductive film is electrically connected to the IC chip.Type: ApplicationFiled: January 21, 2010Publication date: May 13, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junya Maruyama, Tomoyuki Aoki
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Patent number: 7714950Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.Type: GrantFiled: May 4, 2007Date of Patent: May 11, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7704765Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, capable of keeping a peeling layer from being peeled from a substrate in the phase before the completion of a semiconductor element and peeling a semiconductor element rapidly. It is considered that a peeling layer tends to be peeled from a substrate because the stress is applied to a peeling layer due to the difference in thermal expansion coefficient between a substrate and a peeling layer, or because the volume of a peeling layer is reduced and thus the stress is applied thereto by crystallization of the peeling layer due to heat treatment. Therefore, according to one feature of the invention, the adhesion of a substrate and a peeling layer is enhanced by forming an insulating film (buffer film) for relieving the stress on the peeling layer between the substrate and the peeling layer before forming the peeling layer over the substrate.Type: GrantFiled: August 9, 2007Date of Patent: April 27, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Junya Maruyama, Atsuo Isobe, Susumu Okazaki, Koichiro Tanaka, Yoshiaki Yamamoto, Koji Dairiki, Tomoko Tamura
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Patent number: 7691686Abstract: An object of the present invention to provide a semiconductor device manufactured in short time by performing the step of forming the thin film transistor and the step of forming the photoelectric conversion layer in parallel, and to provide a manufacturing process thereof. According to the present invention, a semiconductor device is manufactured in such a way that a thin film transistor is formed over a first substrate, a photoelectric conversion element is formed over a second substrate, and the thin film transistor and the photoelectric conversion element are connected electrically by sandwiching a conductive layer between the first and second substrates opposed to each other so that the thin film transistor and the photoelectric conversion element are located between the first and second substrates. Thus, a method for manufacturing a semiconductor device which suppresses the increase in the number of steps and which increases the throughput can be provided.Type: GrantFiled: May 16, 2005Date of Patent: April 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuo Nishi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara