Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

Abstract: Provided is a monolithic gate driver capable of performing block-reversal driving without causing deterioration of display quality or an increase in power consumption. Gate bus lines are divided into z blocks. Agate driver (400) is provided with a block scanning circuit (40), as well as odd-numbered line scanning circuits (42) each provided for each block and even-numbered line scanning circuits (44) each provided for each block. The block scanning circuit (40) sequentially selects the first to z-th blocks one by one, and alternately selects the odd-numbered line scanning circuits (42) and the even-numbered line scanning circuits (44). Each of the odd-numbered line scanning circuits (42) sequentially and selectively drives the odd-numbered gate bus lines included in the corresponding block. Each of the even-numbered line scanning circuits (44) sequentially and selectively drives the even-numbered gate bus lines included in the corresponding block.

Abstract: A processing system includes a transfer chamber having therein a transfer unit for transferring a substrate and at least one processing unit connected to the transfer chamber. The transfer chamber is maintained in a vacuum state. The processing unit is configured to perform a processing on a substrate. The processing unit includes a first chamber in which a first processing is performed on a substrate, and a second chamber detachably installed in the first chambers. A second processing is performed on a substrate in the second chamber installed in the first chamber. Wall portions of the first chamber and the second chamber are maintained at different temperatures.

Abstract: A liquid crystal display device (100) according to the present invention includes a first substrate (10) including pixel electrodes (11), gate lines (G) and switching elements (12), a second substrate (20) including a plurality of signal electrodes (21) which are electrically independent of each other, and a liquid crystal layer (30) interposed between the first and second substrates. The first substrate further includes a gate driver (15) which generates gate signals to be supplied to the gate lines. The second substrate further includes an external connecting terminal section (24). A signal that has been input through the external connecting terminal section is supplied to the gate driver. The present invention provides a liquid crystal display device with a counter source structure which contributes to narrowing its frame area.

Abstract: Provided is a transfer sheet whereby a T-shirt or the like can be printed in few steps by means of an electronic image forming device that uses powdered toner, liquid ink, or the like containing a plastic resin. By means of mirror-image printing a picture pattern, which is an electronic image, onto sheet A, aligning sheet A and sheet B, and heat-pressing, there is spread coating over the portion of the picture pattern printed to sheet A. Sheet A has a structure layering a mold release layer, a resin layer, and a porous resin layer in a substrate, and sheet B layers a mold release layer, a resin layer, an adhesive layer, and a colored porous resin layer in a substrate.

Abstract: There is provided a display device capable of displaying an image that barely changes with low power consumption on the basis of video data included in a transmitted command, and there is also provided a method for driving the same. A display timing controller (31) determines every frame period whether or not an externally transmitted command includes updated video data. As a result, when it is determined that no updated video data is included, screen refreshing is paused by not reading video data stored in frame memory (36). Moreover, when it is determined that updated video data is included, screen refreshing is performed by reading video data stored in the frame memory (36).

Abstract: A substrate processing device includes a depressurizable hot wall chamber having a sidewall with a temperature which becomes higher than room temperature and a first substrate transferring port provided in the sidewall, a depressurizable transfer chamber having a transfer arm mechanism and a second substrate transferring port, and a gate valve unit provided between the hot wall chamber and the transfer chamber. The gate valve unit includes: a housing having a sidewall provided with communicating holes, a first housing substrate transferring port, and a second housing substrate transferring port; a valve body which is elevatable in the housing; and a double sealing structure having a first sealing member and a second sealing member provided at an outer side of the first sealing member. The communicating holes communicate a gap between the first sealing member and the second sealing member with an internal space of the housing.

Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film. transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

Abstract: A liquid crystal display device (100) according to the present invention includes a first substrate (10) including pixel electrodes (11), gate lines (G) and switching elements (12), a second substrate (20) including a plurality of signal electrodes (21) which are electrically independent of each other, and a liquid crystal layer (30) interposed between the first and second substrates. The first substrate further includes a gate driver (15) which generates gate signals to be supplied to the gate lines. The second substrate further includes an external connecting terminal section (24). A signal that has been input through the external connecting terminal section is supplied to the gate driver. The present invention provides a liquid crystal display device with a counter source structure which contributes to narrowing its frame area.

Abstract: Provided is a monolithic gate driver capable of performing block-reversal driving without causing deterioration of display quality or an increase in power consumption. Gate bus lines are divided into z blocks. Agate driver (400) is provided with a block scanning circuit (40), as well as odd-numbered line scanning circuits (42) each provided for each block and even-numbered line scanning circuits (44) each provided for each block. The block scanning circuit (40) sequentially selects the first to z-th blocks one by one, and alternately selects the odd-numbered line scanning circuits (42) and the even-numbered line scanning circuits (44). Each of the odd-numbered line scanning circuits (42) sequentially and selectively drives the odd-numbered gate bus lines included in the corresponding block. Each of the even-numbered line scanning circuits (44) sequentially and selectively drives the even-numbered gate bus lines included in the corresponding block.

Abstract: A plurality of first and second sensor pixel circuits each sensing light during a designated sensing period and retaining the amount of sensed light otherwise are arranged in a pixel region. A backlight is turned on once for a predetermined time in one-frame period. A sensing period when the backlight is turned on and a sensing period when the backlight is turned off are set once, respectively, in the one-frame period. The first sensor pixel circuit is reset. The second sensor pixel circuit is reset. Read from sensor pixel circuits of two types is performed in parallel in a line sequential manner during a period other than the periods and. A difference circuit provided outside of the sensor pixel circuits is used for obtaining a difference between an amount of light when the backlight is turned on and an amount of light when the backlight is turned off.

Abstract: A sensor pixel circuit (9) includes: a light receiving element (PD); a first node Vsig that retains charges corresponding to an amount of light incident on the light receiving element; and a second node Vint that receives charges from the first node Vsig and retains the charges. Under control by a driving circuit (7), during one of a detection period while a light source (3) for sensors is in an ON state and a detection period while the light source (3) for sensors is in an OFF state, charges corresponding to an amount of light incident on the light receiving element (PD) during this detection period are accumulated in the first node Vsig. The charges accumulated are transferred from the first node Vsig to the second node Vint.

Abstract: Disclosed is a display device having an optical sensor with increased sensitivity. The display device is provided with: a display panel that includes a plurality of display pixel circuits (8) and a plurality of sensor pixel circuits (9a) in a display region (4); and a driver circuit (7) that supplies a driving signal to the sensor pixel circuits (9a). The sensor pixel circuits (9a) are each provided with: a light receiving element (PD1); a storage node (INT) that retains electrical charges corresponding to the light amount that entered the light receiving element (PD1); and a read-out switching element (M1) connected to the storage node (INT). The display device is further provided with a first switching element (T1) that is connected between the light receiving element (PD1) and the storage node (INT) and that operates in a saturation region, and a second switching element (T2) that resets the storage node (INT).

Abstract: A shift register 10 is configured such that m unit circuits 11 each including a shift unit 12 and three buffer units 13r, 13g, and 13b are in a multi-stage cascade connection and that 3m signals in total including three signals from each stage are outputted. The m shift units 12 perform a shift operation, and a first signal Y is outputted from each stage. When a clock signal CK is at a high level, the first signal Y rises higher than a normal high level due to bootstrapping. The buffer unit 13r controls an output signal YR to be at a high level based on the buffer control signal CR and the first signal Y. A buffer control circuit 7 controls buffer control signals CR, CG, and CB to be at a high level for a time period shorter than a half cycle of the clock signal. With this, a shift register with a reduced circuit amount and low power consumption is provided.

Abstract: A raw material recovery method for recovering a raw material of an organic metallic compound, which has the property of being stable toward a specific refrigerant without being decomposed thereby, from exhaust gas discharged from a treatment container in which a metallic thin film is formed on the surface of an object to be treated by using source gas obtained by vaporizing the raw material is characterized by being provided with a solidification step for solidifying the unreacted source gas by cooling the exhaust gas by bringing the exhaust gas into contact with the refrigerant and reprecipitating the raw material, and a recovery step for separating and recovering the raw material reprecipitated in the solidification step from the refrigerant. To provide a method for controlling an exhaust gas flow rate so that flow of gas in a processing chamber becomes uniform.

Abstract: The disclosed deposition device for forming a thin film using a starter gas comprising an organic metal compound is provided with: a processing container 22; a mounting platform 28 which has a heater 34 for heating the workpiece W; a gas introduction mechanism 80 which introduces the starter gas toward the area more exterior than the outer peripheral end of the workpiece W on the mounting platform 28; an internal partition wall 90 which is disposed such that the lower end of said processing space contacts the mounting platform 28 to form gas outlets 92 between the lower portion of the space and the edges of the mounting platform 28; and a orifice forming member 96 which extends radially inward toward the mounting platform 28 and forms an orifice 98 communicating with the gas outlet 92.

Abstract: A method for vapor deposition on a substrate in a vapor deposition system having a process space separated from a transfer space. The method disposes a substrate in a process space of a processing system that is vacuum isolated from a transfer space of the processing system, processes the substrate at either of a first position or a second position in the process space while maintaining vacuum isolation from the transfer space by way of a movement accommodating sealing material, and deposits a material on the substrate at either the first position or the second position.

Abstract: A plurality of sensor pixel circuits are disclosed, each including one photodiode, one accumulation node accumulating charge corresponding to an amount of light, a read transistor having a control terminal connected to the accumulation node, and transistors turning on or off in accordance with a clock signal, and switching a path for a current flowing through the photodiode are arranged in a pixel region. In accordance with the clock signal, when a backlight is turned on, a current flows out of the accumulation node, and a potential at the accumulation node drops. When the backlight is turned off, a current flows into the accumulation node, and the potential at the accumulation node rises.

Abstract: A plurality of sensor pixel circuits each including two photodiodes, one accumulation node accumulating charge corresponding to an amount of light, and a read transistor having a control terminal connected to the accumulation node are arranged in a pixel region. In accordance with a clock signal, when a backlight is turned on, a transistor turns on, a current flows through the photodiode, and a potential at the accumulation node drops. When the backlight is turned off, a transistor turns on, a current flows through the photodiode, and the potential at the accumulation node rises. Sensitivity characteristics of the two photodiodes may be changed using the clock signal. The sensor pixel circuit described above is used for detecting a difference between an amount of light to be incident when the backlight is turned on and an amount of light to be incident when the backlight is turned off.

Abstract: A substrate mounting mechanism on which a target substrate is placed is provided. The substrate mounting mechanism includes a heater plate, which has a substrate mounting surface on which the target substrate is placed and has a heater embedded therein to heat the substrate to a deposition temperature at which a film is deposited. The substrate mounting mechanism also includes a temperature control jacket, which is formed to cover at least a surface of the heater plate other than the substrate mounting surface and adjusts the temperature to a non-deposition temperature below the deposition temperature.