Abstract: A trap mechanism for trapping exhaust gas from a process chamber. The trap assembly includes a housing containing a plurality of trap units. The plurality of trap units are arranged successively along a flow direction of said exhaust gas. Each trap unit includes a set of trap panels parallel to each other and spaced apart from each other. The two opposite surfaces with a larger area of each trap panel are oriented substantially parallel to a flow direction of the exhaust gas flow. The two opposite surfaces with a smaller area of each trap panels are oriented orthogonal to the exhaust gas flow.

Abstract: Provided is a mounting table structure for use in forming a thin film on a surface of a target object mounted on the mounting table structure by using a raw material gas including an organic metal compound in a processing chamber. The mounting table structure includes: a mounting table main body which mounts thereon the target object and has therein a heater; and a base which supports the mounting table main body while surrounding a side surface and a bottom surface of the mounting table main body, the base having therein a coolant path where a coolant flows therethrough and being maintained at a temperature higher than the solidification temperature or the liquefaction temperature of the raw material gas, but lower than the decomposition temperature of the raw material gas.

Abstract: Provided is a placing table structure which is disposed in a processing container and has a subject to be processed thereon so as to form a thin film on the subject in the processing container by using raw material gas which generates thermal decomposition reaction having reversibility. The placing table structure is provided with a placing table for the purpose of placing the subject to be processed on a placing surface, i.e., an upper surface of the placing table structure, and a decomposition suppressing gas supply means which is arranged in the placing table for the purpose of supplying decomposition suppressing gas, which suppresses thermal decomposition of the raw material gas, toward a peripheral section of the subject placed on the placing surface of the placing table.

Abstract: At the time of partial drive, the levels of voltages applied to data lines SL1 to SLn are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines SL1 to SLn are set to be higher than those for a moving-image display region with a relatively high rewrite frequency. By this, the same effect as that obtained when a counter voltage is switched according to the rewrite frequency can be obtained. Thus, flicker occurring in each region of the display screen can be suppressed.

Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.

Abstract: In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.

Abstract: Provided is a liquid crystal display device with reduced power consumption employing a CS drive method. A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).

Abstract: A semiconductor layer for an active element included in each of a plurality of pixels in a display section is constituted by an oxide layer containing at least one element selected from the group consisting of In, Ga, and Zn. There is provided, for the display section, a liquid crystal panel's timing controller (13) configured to carry out control so that (i) a length of a first period during which image data is written is not more than twice that of the second period and/or (ii) one (1) frame period is longer than 16.7 msec.

Abstract: There is provided a display device capable of displaying an image that barely changes with low power consumption on the basis of video data included in a transmitted command, and there is also provided a method for driving the same. A display timing controller (31) determines every frame period whether or not an externally transmitted command includes updated video data. As a result, when it is determined that no updated video data is included, screen refreshing is paused by not reading video data stored in frame memory (36). Moreover, when it is determined that updated video data is included, the screen refreshing is performed by reading video data stored in the frame memory (36).

Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

Abstract: Provided is a monolithic gate driver capable of performing block-reversal driving without causing deterioration of display quality or an increase in power consumption. Gate bus lines are divided into z blocks. Agate driver (400) is provided with a block scanning circuit (40), as well as odd-numbered line scanning circuits (42) each provided for each block and even-numbered line scanning circuits (44) each provided for each block. The block scanning circuit (40) sequentially selects the first to z-th blocks one by one, and alternately selects the odd-numbered line scanning circuits (42) and the even-numbered line scanning circuits (44). Each of the odd-numbered line scanning circuits (42) sequentially and selectively drives the odd-numbered gate bus lines included in the corresponding block. Each of the even-numbered line scanning circuits (44) sequentially and selectively drives the even-numbered gate bus lines included in the corresponding block.

Abstract: A processing system includes a transfer chamber having therein a transfer unit for transferring a substrate and at least one processing unit connected to the transfer chamber. The transfer chamber is maintained in a vacuum state. The processing unit is configured to perform a processing on a substrate. The processing unit includes a first chamber in which a first processing is performed on a substrate, and a second chamber detachably installed in the first chambers. A second processing is performed on a substrate in the second chamber installed in the first chamber. Wall portions of the first chamber and the second chamber are maintained at different temperatures.

Abstract: A liquid crystal display device (100) according to the present invention includes a first substrate (10) including pixel electrodes (11), gate lines (G) and switching elements (12), a second substrate (20) including a plurality of signal electrodes (21) which are electrically independent of each other, and a liquid crystal layer (30) interposed between the first and second substrates. The first substrate further includes a gate driver (15) which generates gate signals to be supplied to the gate lines. The second substrate further includes an external connecting terminal section (24). A signal that has been input through the external connecting terminal section is supplied to the gate driver. The present invention provides a liquid crystal display device with a counter source structure which contributes to narrowing its frame area.

Abstract: Provided is a transfer sheet whereby a T-shirt or the like can be printed in few steps by means of an electronic image forming device that uses powdered toner, liquid ink, or the like containing a plastic resin. By means of mirror-image printing a picture pattern, which is an electronic image, onto sheet A, aligning sheet A and sheet B, and heat-pressing, there is spread coating over the portion of the picture pattern printed to sheet A. Sheet A has a structure layering a mold release layer, a resin layer, and a porous resin layer in a substrate, and sheet B layers a mold release layer, a resin layer, an adhesive layer, and a colored porous resin layer in a substrate.

Abstract: There is provided a display device capable of displaying an image that barely changes with low power consumption on the basis of video data included in a transmitted command, and there is also provided a method for driving the same. A display timing controller (31) determines every frame period whether or not an externally transmitted command includes updated video data. As a result, when it is determined that no updated video data is included, screen refreshing is paused by not reading video data stored in frame memory (36). Moreover, when it is determined that updated video data is included, screen refreshing is performed by reading video data stored in the frame memory (36).

Abstract: A substrate processing device includes a depressurizable hot wall chamber having a sidewall with a temperature which becomes higher than room temperature and a first substrate transferring port provided in the sidewall, a depressurizable transfer chamber having a transfer arm mechanism and a second substrate transferring port, and a gate valve unit provided between the hot wall chamber and the transfer chamber. The gate valve unit includes: a housing having a sidewall provided with communicating holes, a first housing substrate transferring port, and a second housing substrate transferring port; a valve body which is elevatable in the housing; and a double sealing structure having a first sealing member and a second sealing member provided at an outer side of the first sealing member. The communicating holes communicate a gap between the first sealing member and the second sealing member with an internal space of the housing.

Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film. transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

Abstract: A liquid crystal display device (100) according to the present invention includes a first substrate (10) including pixel electrodes (11), gate lines (G) and switching elements (12), a second substrate (20) including a plurality of signal electrodes (21) which are electrically independent of each other, and a liquid crystal layer (30) interposed between the first and second substrates. The first substrate further includes a gate driver (15) which generates gate signals to be supplied to the gate lines. The second substrate further includes an external connecting terminal section (24). A signal that has been input through the external connecting terminal section is supplied to the gate driver. The present invention provides a liquid crystal display device with a counter source structure which contributes to narrowing its frame area.

Abstract: Provided is a monolithic gate driver capable of performing block-reversal driving without causing deterioration of display quality or an increase in power consumption. Gate bus lines are divided into z blocks. Agate driver (400) is provided with a block scanning circuit (40), as well as odd-numbered line scanning circuits (42) each provided for each block and even-numbered line scanning circuits (44) each provided for each block. The block scanning circuit (40) sequentially selects the first to z-th blocks one by one, and alternately selects the odd-numbered line scanning circuits (42) and the even-numbered line scanning circuits (44). Each of the odd-numbered line scanning circuits (42) sequentially and selectively drives the odd-numbered gate bus lines included in the corresponding block. Each of the even-numbered line scanning circuits (44) sequentially and selectively drives the even-numbered gate bus lines included in the corresponding block.

Abstract: A plurality of first and second sensor pixel circuits each sensing light during a designated sensing period and retaining the amount of sensed light otherwise are arranged in a pixel region. A backlight is turned on once for a predetermined time in one-frame period. A sensing period when the backlight is turned on and a sensing period when the backlight is turned off are set once, respectively, in the one-frame period. The first sensor pixel circuit is reset. The second sensor pixel circuit is reset. Read from sensor pixel circuits of two types is performed in parallel in a line sequential manner during a period other than the periods and. A difference circuit provided outside of the sensor pixel circuits is used for obtaining a difference between an amount of light when the backlight is turned on and an amount of light when the backlight is turned off.