Abstract: A semiconductor memory device is arranged so that its circuit area is made smaller and the stored data may be constantly outputted at fast speed. The semiconductor memory device includes a memory cell array and an auxiliary cell array concatenated with word lines on the increasing side of bit-line addresses in the memory cell array. The auxiliary cell array stores data of memory cells in the range from a first bit-line address on a next word-line address to a bit-line address located apart by a predetermined number of bits. A Y-address driver is also included in the semiconductor memory device. The Y-address driver reads data from the auxiliary cell array following the last bit-line address if the read of data pieces at a time ranges from the last bit-line address to the first bit-line address on the next word-line address in the memory cell array.

Abstract: It is an object of the present invention to provide a transformerless charger capable of preventing a human body from receiving an electric shock from a charging terminal, and of making it easy to clean the charging terminal. In order to achieve this object, the transformerless charger of the present invention comprises: a charging terminal for supplying charging voltage to rechargeable electronic equipment; a transformerless power supply circuit for supplying charging voltage to the charging terminal; a flip cover that covers the charging terminal to prevent the charging terminal from being exposed; and a switch that allows or blocks the passage of a current between the charging terminal and the transformerless power supply circuit in synchronization with an opening or closing motion of the flip cover.

Abstract: The code system is realized by that a plurality of waveforms A and B each having duty ratios of 50% in which only any one of a rising edge and a falling edge is present are combined with each other, and “1” and “0” are allocated to the combined waveform. In accordance with the present invention, both a clock and data can be transmitted at the same time, and can be readily demodulated without using a complex PLL circuit. As a trial manufacture according to the present invention, the demodulator could be realized which could allow variations contained in an input frequency by more than 1 digit under operating voltage of 2 V. The effectiveness of this patent could be confirmed.

Abstract: An asynchronous semiconductor memory device includes an output circuit, which outputs data read from a memory unit, and a high impedance control circuit. The high impedance circuit is connected to the output circuit, stores a burst completion address, and compares a present address with the burst completion address. The high impedance control circuit causes a data output terminal of the output circuit to enter a high impedance state when the present address substantially coincides with the burst completion address. Due to the high impedance control circuit, an exclusive terminal for high impedance control is not necessary.

Abstract: The code system is realized by that a plurality of waveforms A and B each having duty ratios of 50% in which only any one of a rising edge and a falling edge is present are combined with each other, and “1” and “0” are allocated to the combined waveform. In accordance with the present invention, both a clock and data can be transmitted at the same time, and can be readily demodulated without using a complex PLL circuit. As a trial manufacture according to the present invention, the demodulator could be realized which could allow variations contained in an input frequency by more than 1 digit under operating voltage of 2 V. The effectiveness of this patent could be confirmed.

Abstract: An assembling apparatus for assembling rotating electrical machines having permanent magnets and armatures cores. The apparatus holds the armature core while the permanent magnets are assembled on to it thus avoiding hand labor. At all times, the rotor is supported so that it cannot cant relative to the stator and its permanent magnets and thus, no damage to the magnets or any coating thereon or to the armature will occur.

Abstract: The present invention is a memory circuit, comprises: a memory cell array including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells disposed in the positions of intersection between the bit lines and the word lines; and a page buffer, which is connected to the bit line and which detects memory cell data by judging with predetermined sense timing the potential of the bit line when a pre-charged bit line potential is discharged in accordance to a cell current of a selected memory cell. Further the sense timing differs in accordance with the position of the selected memory cell in the memory cell array.

Abstract: A semiconductor integrated circuit device is provided with an IC chip so as to prevent its circuits from malfunction when the IC chip is cracked. To detect chip cracks, a resistor R01 is disposed at the outer periphery of the area in which one wants to detect the chip crack. If the chip is cracked and the resistance value of the resistor R01 is changed, the resistance change is detected, thereby controlling internal signals such as the power on reset signal and stopping the whole operation of the circuit device so as to prevent the circuits from malfunction. Thus, the system security can also be improved.

Abstract: An armature for a rotating electrical machine and more particularly to an insulating cover for the pole teeth around which the windings are formed that has good strength against the winding without risk of damage of the insulator due to increased thickness in the highly stressed areas.

Abstract: An asynchronous semiconductor memory device includes an output circuit, which outputs data read from a memory unit, and a high impedance control circuit. The high impedance circuit is connected to the output circuit, stores a burst completion address, and compares a present address with the burst completion address. The high impedance control circuit causes a data output terminal of the output circuit to enter a high impedance state when the present address substantially coincides with the burst completion address. Due to the high impedance control circuit, an exclusive terminal for high impedance control is not necessary.

Abstract: A very effective and easily assembled low cost rotating electrical machine useable as a starter motor. The commutator is formed at the end of the rotor shaft opposite to its drive end to minimize bending loads on the plain bearing at that end of the rotor shaft. In addition the end cap holding the plain bearing has lugs and stiffening ribs to minimize these loads and provide attachment to an associated mechanism. Thus the machine will have a long life and trouble fee existence.

Abstract: Several embodiments of rotating electrical machines having a protruding wall provided as a wire guide at the forward end of an arm section of the insulator around which the coils are wound. Therefore, when a wire is wound around on the outside of the slots to form a coil on magnetic pole teeth, the wire at the coil end portion is guided toward a slot entrance between magnetic pole teeth, providing smooth wire winding action. In addition, this protruding wall prevents the wound wire on the magnetic pole teeth from slipping out from the slot.

Abstract: An armature for a rotating electrical machine and more particularly to an insulating cover for the pole teeth around which the windings are formed that has good strength against the winding without risk of damage of the insulator due to increased thickness in the highly stressed areas.

Abstract: A semiconductor integrated circuit device is provided with an IC chip so as to prevent its circuits from malfunction when the IC chip is cracked. To detect chip cracks, a resistor R01 is disposed at the outer periphery of the area in which one wants to detect the chip crack. If the chip is cracked and the resistance value of the resistor R01 is changed, the resistance change is detected, thereby controlling internal signals such as the power on reset signal and stopping the whole operation of the circuit device so as to prevent the circuits from malfunction. Thus, the system security can also be improved.

Abstract: The present invention comprises a power transmission system, an IC card, and an information communication system using an IC card. In the power transmission system, power is transmitted by radio from the power transmission device to the IC card. In the IC card, the transmitted induced power is converted into a DC voltage, the transmitted induced power or a voltage corresponding to the induced power is detected, and a desired DC voltage to be suppled to the internal circuit is obtained in controlling resistance the detected induced power or the voltage corresponding to the induced power.

Abstract: A semiconductor integrated circuit device provided with an IC chip so as to prevent its circuits from malfunction when the IC chip is cracked. To detect chip cracks, a resistor R01 is disposed at the outer periphery of the area which wants to detect the chip crack. If the chip is cracked and the resistance value of the resistor R01 is changed, the resistance change is detected, thereby controlling internal signals such as the power on reset signal and stopping the whole operation of the circuit device so as to prevent the circuits from malfunction. Thus, the system security can also be improved.

Abstract: A method for controlling an internal supply voltage generating circuit reduces power consumption in an active mode. The internal supply voltage generating circuit includes a first voltage-drop regulator, which supplies a relatively large driving power to an internal circuit, and a second voltage-drop regulator, which supplies a relatively small driving power to the internal circuit. First, the second voltage-drop regulator is activated and the first voltage-drop regulator is inactivated in one of a stand-by mode and a power-down mode. Then, at least the first voltage-drop regulator is activated in an active mode, and the first voltage-drop regulator is inactivated in an active pause of the active mode. The first voltage-drop regulator is activated when the active pause is cancelled.

Abstract: The present invention comprises a power transmission system, an IC card, and an information communication system using an IC card. In the power transmission system, power is transmitted by radio from the power transmission device to the IC card. In the IC card, the transmitted induced power is converted into a DC voltage, the transmitted induced power or a voltage corresponding to the induced power is detected, and a desired DC voltage to be suppled to the internal circuit is obtained in controlling resistance the detected induced power or the voltage corresponding to the induced power.

Abstract: An assembling apparatus for assembling rotating electrical machines having permanent magnets and armatures cores. The apparatus holds the armature core while the permanent magnets are assembled on to it thus avoiding hand labor. At all times, the rotor is supported so that it cannot cant relative to the stator and its permanent magnets and thus, no damage to the magnets or any coating thereon or to the armature will occur.

Abstract: A method for controlling an internal supply voltage generating circuit reduces power consumption in an active mode. The internal supply voltage generating circuit includes a first voltage-drop regulator, which supplies a relatively large driving power to an internal circuit, and a second voltage-drop regulator, which supplies a relatively small driving power to the internal circuit. First, the second voltage-drop regulator is activated and the first voltage-drop regulator is inactivated in one of a stand-by mode and a power-down mode. Then, at least the first voltage-drop regulator is activated in an active mode, and the first voltage-drop regulator is inactivated in an active pose of the active mode. The first voltage-drop regulator is activated when the active pose is cancelled.