Abstract: A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on the floating gate using an ALD process. The dielectric layer pattern can include a metal precursor that includes zirconium and an oxidant. A control gate can be formed on the dielectric layer pattern. The semiconductor device can include the dielectric layer pattern provided herein.

Abstract: In some embodiments, a multi-layer dielectric structure, such as a capacitor dielectric region, is formed by forming a first dielectric layer on a substrate according to a CVD process and forming a second dielectric layer directly on the first dielectric layer according to an ALD process. In further embodiments, a multi-layer dielectric structure is formed by forming a first dielectric layer on a substrate according to an ALD process and forming a second dielectric layer directly on the first dielectric layer according to a CVD process. The CVD-formed layers may comprise one selected from the group consisting of SiO2, Si3N3, Ta2O5, HfO2, ZrO2, TiO2, Y2O3, Pr2O3, La2O3, Nb2O5, SrTiO3 (STO), BaSrTiO3 (BST) and PbZrTiO3 (PZT). The ALD-formed layers may comprise one selected from the group consisting of SiO2, Si3N3, Al2O3, Ta2O5, HfO2, ZrO2, TiO2, Y2O3, Pr2O3, La2O3, Nb2O5, SrTiO3 (STO), BaSrTiO3 (BST) and PbZrTiO3 (PZT).

Abstract: The present invention can provide methods of forming a layer including lanthanum by utilizing a lanthanum precursor existing in a liquid phase at a room temperature. The present invention can further provide methods of forming layers including lanthanum on objects and methods of manufacturing a capacitor.

Abstract: Flash memory devices include a semiconductor substrate having an active region. A gate pattern on the active region includes a floating gate pattern and a control gate pattern with an inter-gate dielectric layer pattern therebetween. The inter-gate dielectric layer pattern includes a plurality of hafnium oxide layers and a plurality of aluminum oxide layers, ones of which are alternately arrayed.

Abstract: A semiconductor device and a method for forming the same. A dielectric layer is formed on a semiconductor substrate or on a lower electrode of a capacitor. Vacuum annealing is performed on the dielectric layer. Thus, impurities remaining in the dielectric layer can be effectively removed, and the dielectric layer can be densified. As a result, the electrical characteristics of the semiconductor device are improved. For example, the leakage current characteristics of the dielectric layer are improved and capacitance is increased.

Abstract: A semiconductor device and a method for forming the same. A dielectric layer is formed on a semiconductor substrate or on a lower electrode of a capacitor. Vacuum annealing is performed on the dielectric layer. Thus, impurities remaining in the dielectric layer can be effectively removed, and the dielectric layer can be densified. As a result, the electrical characteristics of the semiconductor device are improved. For example, the leakage current characteristics of the dielectric layer are improved and capacitance is increased.

Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.

Abstract: A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.

Abstract: A semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al2O3 dielectric layer has a thickness of 30-60 ?. The HfO2 dielectric layer has a thickness of 40 ? or less.

Abstract: A semiconductor memory device that includes a composite Al2O3HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al2O3 dielectric layer has a thickness of 30-60 ?. The HfO2 dielectric layer has a thickness of 40 ? or less.

Abstract: Methods of supplying a source to a reactor include charging a gaseous source into a charging volume by selectively activating a source charger coupled between the charging volume and a source reservoir. The gaseous source is then supplied from the charging volume into a deposition process reactor by selectively activating a source supplier coupled between the charging volume and the reactor after the gaseous source in the charging volume attains a desired internal pressure. Apparatus for supplying a source and methods and apparatus for depositing an atomic layer are also provided.

Abstract: Disclosed is a method for forming metal oxide dielectric layers, more particularly HfO2 dielectric layers, using an atomic layer deposition (ALD) method in which a series of thin intermediate layers are formed and treated with one or more oxidizers and nitrogents before the next intermediate layer is formed on the substrate. The intermediate oxidation treatments reduce the number of organic contaminants incorporated into the metal oxide layer from the organometallic precursors to produce a dielectric layer having improved current leakage characteristics. The dielectric layers formed in this manner remain susceptible to crystallization if exposed to temperatures much above 550° C., so subsequent semiconductor manufacturing processes should be modified or eliminated to avoid such temperatures or limit the duration at such temperatures to maintain the performance of the dielectric materials.

Abstract: The present invention provides methods of forming metal thin films, lanthanum oxide films and high dielectric films. Compositions of metal thin films, lanthanum oxide films and high dielectric films are also provided. Further provided are semiconductor devices comprising the metal thin films, lanthanum oxide films and high dielectric films provided herein.

Abstract: An apparatus for depositing a thin film includes a reaction chamber, a reaction gas provider to supply a reaction gas and/or inert gas to the reaction chamber, an oxidant provider to supply a first oxidant and a second oxidant to the reaction chamber, and an air drain to exhaust gas from the apparatus. The oxidant provider is operable to supply the second oxidant to the reaction chamber using the first oxidant as a transfer gas.

Abstract: In some embodiments, a multi-layer dielectric structure, such as a capacitor dielectric region, is formed by forming a first dielectric layer on a substrate according to a CVD process and forming a second dielectric layer directly on the first dielectric layer according to an ALD process. In further embodiments, a multi-layer dielectric structure is formed by forming a first dielectric layer on a substrate according to an ALD process and forming a second dielectric layer directly on the first dielectric layer according to a CVD process. The CVD-formed layers may comprise one selected from the group consisting of SiO2, Si3N3, Ta2O5, HfO2, ZrO2, TiO2, Y2O3, Pr2O3, La2O3, Nb2O5, SrTiO3 (STO), BaSrTiO3 (BST) and PbZrTiO3 (PZT). The ALD-formed layers may comprise one selected from the group consisting of SiO2, Si3N3, Al2O3, Ta2O5, HfO2, ZrO2, TiO2, Y2O3, Pr2O3, La2O3, Nb2O5, SrTiO3 (STO), BaSrTiO3 (BST) and PbZrTiO3 (PZT).

Abstract: A semiconductor memory device that includes a composite Al2O3/HfO2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al2O3 dielectric layer and an HfO2 dielectric layer sequentially formed on the lower electrode, the Al2O3 dielectric layer having a thickness greater than or equal to the HfO2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al2O3 dielectric layer has a thickness of 30-60 Å. The HfO2 dielectric layer has a thickness of 40 Å or less.

Abstract: Methods of forming Ta2O5 layers in a process chamber are disclosed. A Ta2O5 layer can be maintained at a first temperature that is less than a temperature for crystallization of the Ta2O5 layer. At least one of a position of the Ta2O5 layer in the process chamber relative to the heater and a pressure in the process chamber is changed to increase the temperature of the Ta2O5 layer to about the temperature for crystallization.

Abstract: A semiconductor device and a method for forming the same. A dielectric layer is formed on a semiconductor substrate or on a lower electrode of a capacitor. Vacuum annealing is performed on the dielectric layer. Thus, impurities remaining in the dielectric layer can be effectively removed, and the dielectric layer can be densified. As a result, the electrical characteristics of the semiconductor device are improved. For example, the leakage current characteristics of the dielectric layer are improved and capacitance is increased.

Abstract: In a method of forming an oxide layer using an atomic layer deposition and a method of forming a capacitor of a semiconductor device using the same, a precursor including an amino functional group is introduced onto a substrate to chemisorb a portion of the precursor on the substrate. Then, the non-chemisorbed precursor is removed. Thereafter, an oxidant is introduced onto the substrate to chemically react the chemisorbed precursor with the oxidant to form an oxide layer on the substrate. A deposition rate is fast and an oxide layer having a good deposition characteristic may be obtained. Also, a thin oxide film having a good step coverage and a decreased pattern loading rate can be formed.

Abstract: A method for manufacturing a semiconductor device employing a dielectric layer for forming a conductive layer into a three-dimensional shape. The dielectric layer is formed on a substrate in such a manner as to provide an intrinsic etch rate within the layer which increases in the direction of the thickness or depth of the dielectric layer. This variable intrinsic etch rate within the dielectric layer is achieved by changing one of a plurality of deposition variables. Once formed, the dielectric layer is selectively etched to form a through hole to contact a conductive area underlying the dielectric layer. A conductive layer is formed in the through hole, which may be a storage node of a capacitor.