Patents by Inventor Koji Maruyama
Koji Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9649595Abstract: In a mixing structure with an injector 3 arranged 2 immediately after a bend 1a of an exhaust pipe 1, urea water 5 being injected by the injector 3 into the exhaust pipe 1 for mixing, a pipe diameter Dp downstream of the bend 1a of the exhaust pipe 1 is large relative to a pipe diameter De upstream of the bend.Type: GrantFiled: April 8, 2013Date of Patent: May 16, 2017Assignee: HINO MOTORS, LTD.Inventors: Minoru Kowada, Hideki Endo, Koji Maruyama, Tetsuichi Kominami
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Patent number: 9632564Abstract: In a power supply device, the bridge circuit is configured by connecting, in parallel, a plurality of series circuits of an inverse-parallel connection circuit of a semiconductor switch and a diode. A control unit controls switching of a semiconductor switch so that a voltage v between AC terminals becomes zero voltage in equal periods ? before and after a center point shifted from one zero crossing point in one cycle of the input current by a compensation period (angle) ? calculated from a voltage applied to a resonance circuit constituted by the power receiving coil and a resonance capacitor Cr and an induced voltage of the power receiving coil, and becomes a positive-negative voltage whose peak value is the voltage Vo between DC terminals in other periods.Type: GrantFiled: June 10, 2014Date of Patent: April 25, 2017Assignees: CENTRAL JAPAN RAILWAY COMPANY, FUJI ELECTRIC CO., LTD.Inventors: Toshiaki Murai, Yoshiyasu Hagiwara, Tadashi Sawada, Masayuki Tobikawa, Ayako Saga, Michio Tamate, Koji Maruyama, Tomotaka Nishijima
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Patent number: 9608539Abstract: In a power supply device the bridge circuit is configured such that a plurality of series circuits of two inverse parallel connection circuits of a semiconductor switch and a diode are connected in parallel. The power supply device includes a control unit configured to control the semiconductor switch such that a voltage between AC terminals of the bridge circuit becomes a zero voltage only during a prescribed time period before and after two zero crossing points in one cycle of the input current and such that the voltage becomes a positive-negative voltage in which the output voltage is a peak current value during other time periods. Consequently, a power factor of the power receiving circuit is improved and a loss of an entire device is inhibited, and a size and a cost of the entire device may be reduced.Type: GrantFiled: March 7, 2014Date of Patent: March 28, 2017Assignees: CENTRAL JAPAN RAILWAY COMPANY, FUJI ELECTRIC CO., LTD.Inventors: Ayako Ichinose, Michio Tamate, Koji Maruyama, Tomotaka Nishijima
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Publication number: 20160344301Abstract: A three-level power converter includes a first module housing a vertical arm forming a three-level power conversion circuit; a second module disposed adjacent to the first module and housing an intermediate arm forming the three-level power conversion circuit; high-potential and low-potential connecting terminal boards each extending vertically, and having a lower end connected to connecting terminals on an upper surface of the first module, and an upper end provided with an external connecting end; and a flat intermediate-potential connecting terminal board extending vertically, and having a lower end connected to connecting terminals on an upper surface of the second module, and an upper end provided with an external connecting end. The high-potential, low-potential, and intermediate-potential connecting terminal boards are stacked close to and parallel to one another. Each of the external connecting ends is connected to a corresponding terminal of a DC capacitor.Type: ApplicationFiled: August 8, 2016Publication date: November 24, 2016Inventors: Koji MARUYAMA, Takaaki TANAKA
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Publication number: 20160163515Abstract: A plasma processing apparatus includes a dielectric member having communication holes through which an internal space communicates with a processing space; a first electrode and a second electrode; a first gas supply device which supplies a first processing gas; a first high frequency power supply which supplies a first high frequency power to at least one of the electrodes to generate a first plasma of the first processing gas; a depressurizing device which introduces the first processing gas and radicals in the first plasma; a second high frequency power supply which supplies a second high frequency power to generate a second plasma of the first processing gas and to attract ions; and a control unit which adjusts, by controlling a total amount of the first high frequency powers, the radical amount in the second plasma and adjusts, by controlling a ratio therebetween, the ion amount therein.Type: ApplicationFiled: July 3, 2014Publication date: June 9, 2016Inventors: Koji Maruyama, Masato Horiguchi, Tetsuri Matsuki, Akira Koshiishi
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Publication number: 20160028224Abstract: A series circuit of capacitors and a series circuit of semiconductor switches such as SiC-MOSFETs are connected in parallel to a direct current power source, and one end of a bidirectional switch formed of semiconductor switches, such as IGBTs, and diodes, such as SiC-SBDs (Silicon Carbide Schottky Barrier Diodes), is connected to a series connection point (an M point) of the capacitors, while the other end of the bidirectional switch is connected to a series connection point of the semiconductor switches, in a three-level inverter that outputs three voltage levels by operating the semiconductor switches so as to satisfy at least one of the condition that the peak value of an alternating current output voltage Vo is a value of 80% or more of the voltage of the capacitors and the condition that an output power factor is 0.8 or more.Type: ApplicationFiled: October 7, 2015Publication date: January 28, 2016Applicant: FUJI ELECTRIC CO., LTD.Inventors: Ryuji YAMADA, Koji MARUYAMA, Takaaki TANAKA
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Publication number: 20150298283Abstract: A substrate treatment device which can detect a metal film remaining as a residue on a polished surface of a substrate after polishing with high accuracy is provided. The substrate treatment device includes a polishing section 3 that polishes a surface to be polished of the substrate to remove the metal film formed on the surface to be polished, a cleaning section 4 that cleans and dries the substrate polished by the polishing section 3, and a temporary table 180 on which the substrate is temporarily placed after being polished by the polishing section 3. Sensors 8, 9 for detecting the metal film remaining on the polished surface of the substrate are provided at the temporary table 180.Type: ApplicationFiled: April 17, 2015Publication date: October 22, 2015Inventor: Koji MARUYAMA
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Patent number: 9048191Abstract: A plasma etching method includes supplying an etching gas containing an oxygen gas and a sulfur fluoride gas at a predetermined flow rate into a processing chamber that accommodates a processing substrate including a silicon layer and a resist layer, and etching the silicon layer with plasma generated from the etching gas using the resist layer as a mask. The plasma etching method further includes a first step of etching the silicon layer while a flow ratio of the oxygen gas to the sulfur fluoride gas is adjusted to a first flow ratio; a second step of etching the silicon layer while decreasing a flow rate of the oxygen gas to decrease the flow ratio to a second flow ratio, which is lower than the first flow ratio; and a third step of etching the silicon layer while the flow ratio is adjusted to the second flow ratio.Type: GrantFiled: June 12, 2012Date of Patent: June 2, 2015Assignee: Tokyo Electron LimitedInventors: Shuichiro Uda, Takaaki Nezu, Shinji Fuchigami, Koji Maruyama
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Patent number: 9034772Abstract: A method of etching a substrate by plasma via a mask having a predetermined pattern at back of a silicon layer of the substrate, a semiconductor device being formed at front of which supported by a support substrate, includes a main etching step in which plasma is generated by supplying a process gas including a mixed gas whose flow ratio of fluorine compound gas, oxygen gas and silicon fluoride gas is 2:1:1.5 or a process gas including a mixed gas in which at least the ratio of one of the oxygen gas and the silicon fluoride gas, using the fluorine compound gas as a standard, is larger than the above ratio, and the substrate is etched by the plasma; and an over etching step in which the substrate is further etched by plasma while applying a high frequency for bias whose frequency is less than or equal to 400 kHz.Type: GrantFiled: July 18, 2013Date of Patent: May 19, 2015Assignee: TOKYO ELECTRON LIMITEDInventors: Koji Maruyama, Mikio Yamamoto
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Publication number: 20150041996Abstract: In a mixing structure with an injector 3 arranged 2 immediately after a bend 1a of an exhaust pipe 1, urea water 5 being injected by the injector 3 into the exhaust pipe 1 for mixing, a pipe diameter Dp downstream of the bend 1a of the exhaust pipe 1 is large relative to a pipe diameter De upstream of the bend.Type: ApplicationFiled: April 8, 2013Publication date: February 12, 2015Applicant: HINO MOTORS, LTD.Inventors: Minoru Kowada, Hideki Endo, Koji Maruyama, Tetsuichi Kominami
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Publication number: 20150020851Abstract: A substrate cleaning device 1 includes a substrate holding unit 10 configured to hold a substrate W, a first cleaning unit 11 having a first cleaning member 11a caused to come into contact with a first surface WA of the substrate W held by the substrate holding unit 10 to clean the first surface WA, a second cleaning unit 12 having a second cleaning member 12a caused to come into contact with the first surface WA of the substrate W held by the substrate holding unit 10 to clean the first surface WA, and a controller 50 configured to control the first and second cleaning units 11, 12 so that, when any one of the first cleaning member 11a and the second cleaning member 12a cleans the first surface WA of the substrate W held by the substrate holding unit 10, the other cleaning member is at a position apart from the substrate W held by the substrate holding unit 10.Type: ApplicationFiled: July 17, 2014Publication date: January 22, 2015Inventors: Takeshi Sakurai, Eiji Hirai, Kaoru Hamaura, Mitsuru Miyazaki, Koji Maruyama
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Publication number: 20140372780Abstract: In a power supply device, the bridge circuit is configured by connecting, in parallel, a plurality of series circuits of an inverse-parallel connection circuit of a semiconductor switch and a diode. A control unit controls switching of a semiconductor switch so that a voltage v between AC terminals becomes zero voltage in equal periods ? before and after a center point shifted from one zero crossing point in one cycle of the input current by a compensation period (angle) ? calculated from a voltage applied to a resonance circuit constituted by the power receiving coil and a resonance capacitor Cr and an induced voltage of the power receiving coil, and becomes a positive-negative voltage whose peak value is the voltage Vo between DC terminals in other periods.Type: ApplicationFiled: June 10, 2014Publication date: December 18, 2014Applicants: CENTRAL JAPAN RAILWAY COMPANY, FUJI ELECTRIC CO., LTD.Inventors: Toshiaki MURAI, Yoshiyasu HAGIWARA, Tadashi SAWADA, Masayuki TOBIKAWA, Ayako SAGA, Michio TAMATE, Koji MARUYAMA, Tomotaka NISHIJIMA
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Publication number: 20140356587Abstract: A method of preventing fouling structure including: preparing an antifouling pressure-sensitive adhesive tape including a base material layer (A) and a pressure-sensitive adhesive layer (A), and an easily adhering pressure-sensitive adhesive tape including a base material layer (B) easily adhering to the pressure-sensitive adhesive layer (A) and a pressure-sensitive adhesive layer (B); bonding the easily adhering pressure-sensitive adhesive tape to a surface of a structure, and bonding the antifouling pressure-sensitive adhesive tape onto the bonded easily adhering pressure-sensitive adhesive tape so that lengthwise directions of the tapes are non-parallel with each other, or bonding the two or more antifouling pressure-sensitive adhesive tapes and the at least one easily adhering pressure-sensitive adhesive tape onto a surface of a structure so that the antifouling pressure-sensitive adhesive tapes are prevented from overlapping each other and a junction between the antifouling pressure-sensitive adhesive taType: ApplicationFiled: January 15, 2013Publication date: December 4, 2014Applicant: NITTO DENKO CORPORATIONInventors: Kazutaka Hara, Naoki Kurata, Tomonari Naito, Taiki Sueyoshi, Satoru Suzuki, Koji Maruyama
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Patent number: 8900122Abstract: An endoscope apparatus according to the present invention is featured by including: an endoscope which has a connector main body; an apparatus main body to which the connector main body can be detachably mounted; a closed space which, after the connector main body is mounted to the apparatus main body, is formed in exterior housings of the apparatus main body and the connector main body by being closed by the exterior housings; a heat generating portion which is provided in the closed space; and a fan which is provided in the closed space, and performs at least one of dissipation of heat of the heat generating portion to the closed space and transfer of heat in the atmosphere in the closed space to the exterior housing.Type: GrantFiled: February 1, 2008Date of Patent: December 2, 2014Assignee: Olympus CorporationInventors: Koji Maruyama, Takashi Suzuki
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Publication number: 20140292092Abstract: In a power supply device the bridge circuit is configured such that a plurality of series circuits of two inverse parallel connection circuits of a semiconductor switch and a diode are connected in parallel. The power supply device includes a control unit configured to control the semiconductor switch such that a voltage between AC terminals of the bridge circuit becomes a zero voltage only during a prescribed time period before and after two zero crossing points in one cycle of the input current and such that the voltage becomes a positive-negative voltage in which the output voltage is a peak current value during other time periods. Consequently, a power factor of the power receiving circuit is improved and a loss of an entire device is inhibited, and a size and a cost of the entire device may be reduced.Type: ApplicationFiled: March 7, 2014Publication date: October 2, 2014Applicants: FUJI ELECTRIC CO., LTD., CENTRAL JAPAN RAILWAY COMPANYInventors: Ayako ICHINOSE, Michio TAMATE, Koji MARUYAMA, Tomotaka NISHIJIMA
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Patent number: 8787728Abstract: According to one embodiment, a data reproduction apparatus comprises a reproduction module configured to reproduce image data, a resolution selection module configured to select one of resolutions, an image quality mode selection module configured to select on or off state of an image quality mode, a selection disable module configured to disable the resolution selection module to select a prescribed resolution when the image quality mode selection module selects the on state of the image quality mode, and an image processor configured to improve a quality of the image data reproduced by the reproduction module in accordance with the resolution selected by the resolution selection module when the image quality mode selection module selects the on state of the image quality mode.Type: GrantFiled: August 7, 2009Date of Patent: July 22, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koji Maruyama, Mitsutaka Kuwabara, Satoshi Kataoka
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Patent number: 8716144Abstract: A method for manufacturing a semiconductor device for forming a deep hole in a substrate by using a photoresist film formed on the substrate includes a positioning step of positioning a substrate inside an etching chamber, the substrate having a photoresist film including an opening part formed thereon, a first etching step of performing plasma etching on the substrate positioned inside the etching chamber by using a first mixed gas including at least SiF4 and O2 with the photoresist film as a mask, and a second etching step of forming a hole in the substrate by performing plasma etching on the substrate by using a second mixed gas including at least SF6, O2, and HBr after the first etching step.Type: GrantFiled: November 17, 2010Date of Patent: May 6, 2014Assignee: Tokyo Electron LimitedInventors: Shuichiro Uda, Koji Maruyama, Yusuke Hirayama
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Patent number: 8718442Abstract: According to one embodiment, a data reproduction apparatus comprises a reproduction module configured to reproduce image data, a resolution selection module configured to select one of resolutions, an image quality mode selection module configured to select on or off state of an image quality mode, a selection disable module configured to disable the resolution selection module to select a prescribed resolution when the image quality mode selection module selects the on state of the image quality mode, and an image processor configured to improve a quality of the image data reproduced by the reproduction module in accordance with the resolution selected by the resolution selection module when the image quality mode selection module selects the on state of the image quality mode.Type: GrantFiled: October 27, 2011Date of Patent: May 6, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koji Maruyama, Mitsutaka Kuwabara, Satoshi Kataoka
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Publication number: 20140113450Abstract: A plasma etching method includes supplying an etching gas containing an oxygen gas and a sulfur fluoride gas at a predetermined flow rate into a processing chamber that accommodates a processing substrate including a silicon layer and a resist layer, and etching the silicon layer with plasma generated from the etching gas using the resist layer as a mask. The plasma etching method further includes a first step of etching the silicon layer while a flow ratio of the oxygen gas to the sulfur fluoride gas is adjusted to a first flow ratio; a second step of etching the silicon layer while decreasing a flow rate of the oxygen gas to decrease the flow ratio to a second flow ratio, which is lower than the first flow ratio; and a third step of etching the silicon layer while the flow ratio is adjusted to the second flow ratio.Type: ApplicationFiled: June 12, 2012Publication date: April 24, 2014Inventors: Shuichiro Uda, Takaaki Nezu, Shinji Fuchigami, Koji Maruyama
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Publication number: 20140024221Abstract: A method of etching a substrate by plasma via a mask having a predetermined pattern at back of a silicon layer of the substrate, a semiconductor device being formed at front of which supported by a support substrate, includes a main etching step in which plasma is generated by supplying a process gas including a mixed gas whose flow ratio of fluorine compound gas, oxygen gas and silicon fluoride gas is 2:1:1.5 or a process gas including a mixed gas in which at least the ratio of one of the oxygen gas and the silicon fluoride gas, using the fluorine compound gas as a standard, is larger than the above ratio, and the substrate is etched by the plasma; and an over etching step in which the substrate is further etched by plasma while applying a high frequency for bias whose frequency is less than or equal to 400 kHz.Type: ApplicationFiled: July 18, 2013Publication date: January 23, 2014Applicant: Tokyo Electron LimitedInventors: Koji Maruyama, Mikio Yamamoto