Abstract: Techniques for signal line connecting are described herein. An apparatus may include a first signal contact pad and a second signal contact pad adjacent to the first signal contact pad. The apparatus also includes a ground pad. The contact pads are disposed in an arrangement reducing inequality between unshielded lengths of a first signal line, a second signal line, and a drain line lines to be respectively connected to the first signal contact pad, the second signal contact pad, and the ground contact pad.

Abstract: Techniques for routing signal traces in a circuit board are described. An example of an electronic device in accordance with the described techniques includes a circuit board comprising a plurality of conductive layers. The conductive layers include a signal layer and a reference plane. The signal layer includes signal traces and the reference plane includes an additional signal trace.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.

Abstract: A display module is provided. A light source is configured to provide an illumination beam. A light guide plate has a first surface, a second surface opposite to the first surface, and an incident surface connecting the first surface and the second surface. The illumination beam enters the light guide plate through the incident surface. A reflective element is connected to the light guide plate and has a plurality of first reflective surfaces inclined with respect to the second surface. A reflective display unit is capable of modulating a polarization state of the illumination beam to form a modulated beam. The second surface is disposed between the reflective display unit and the first surface. The first surface is disposed between the second surface and a reflective polarizer, and the reflective polarizer filters the modulated beam into an image beam.

Abstract: A maintenance method for network connection and a computer system are provided. The method is adapted to a computer system having a real-time clock. The real-time clock is configured to regularly wake up the computer system to check whether a network connection is working normally. In the method, a wake up operation to wake up the computer system is received from a user. It is determined whether a connection time of maintaining the network connection so far from a last time of entering a power saving mode is greater than a counting time for the real-time clock to wake up the computer system. It is tested whether the network connection is working normally when the connection time is greater than the counting time. The counting time of the real-time clock is updated to the connection time when the network connection is working normally.

Abstract: A projection display apparatus includes a light source configured to emit a first light, a reflective light modulator configured to modulate the first light to form a second light conveying a rendered image, a polarizer and a light guide plate. The light guide plate can include a plurality of optical elements embedded in the thickness of the light guide plate or provided on an outer surface of the light guide plate. An illuminating light entering the light guide plate can be redirected toward the light modulator by reflection at the grooves or optical elements. Moreover, an image light from the light modulator can travel through the light guide plate to the polarizer.

Abstract: An electronic apparatus having an input unit and a network card and a wake-up method thereof are provided. In the method, an input event triggered by the input unit is received. Next, whether the electronic apparatus is in a partial wake-up mode entered after being woken up by the network card is determined. Then, the electronic apparatus is woken up to a normal operation mode if the electronic apparatus is in the partial wake-up mode.

Abstract: A clock generator circuit of a liquid display panel includes a charge sharing switch unit, a first capacitor, a first switch, a second switch, a third switch and a fourth switch. The charge sharing switch unit is configured to receive control signals and accordingly output a first-polarity voltage to the first capacitor. The clock generator circuit is configured to turn on the first switch, the second switch, the third switch and the fourth switch according to a specific sequence thereby outputting a clock signal. An operation method for the aforementioned clock generator circuit is also provided.

Abstract: A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.

Abstract: A press-fit cable is described herein. The press-fit cable includes a plurality of cable wires and a plurality of pins. The plurality of pins is coupled with the plurality of cable wires. Additionally, the plurality of pins is to directly mate to a circuit board without a receptacle.

Abstract: The present invention provides a light source device for a reflective microdisplay panel is disclosed. The light source device comprises: a first light bar, disposed on a first side of the reflective microdisplay panel. The first light bar comprises: a substrate, a plurality of micro LED units, and a controlling unit. The micro LED units are formed on the substrate, each micro LED unit corresponding to a screen area of the reflective microdisplay panel. The controlling unit is coupled to the micro LED units, and utilized for controlling luminance of each of the micro LED units individually according to luminance of the screen areas of the reflective microdisplay panel.

Abstract: A capacitive touch sensor structure comprises a substrate, a first transmissive electrode, a first wire, a first receiving electrode and a second wire. The first transmissive electrode is disposed on the substrate and has at least one first electrode. The first wire is disposed on the substrate and connects to the first electrode of the first transmissive electrode. The first receiving electrode is disposed on the substrate and has at least one second electrode. The second wire is disposed on the substrate and extends along a first direction to connect to the first receiving electrode. The first electrode has a plurality of first slits and the second electrode has a plurality of second slits.

Abstract: A FinFET device includes a dielectric layer formed over a semiconductor substrate and having an upper dielectric layer surface. A fin of semiconductor material extends upwards from the substrate through an opening in the dielectric layer. A base portion of the fin, which is recessed below the upper dielectric layer surface, includes a base channel region that separates first and second base source/drain regions. An upper channel region extends upwards from the base channel region and terminates in an upper fin surface disposed above the upper dielectric layer surface. A gate electrode straddles the upper channel region and is separated from the upper channel region by a gate dielectric. First and second epitaxial source/drain regions meet the first and second base source/drain regions, respectively, at first and second interfaces, respectively. The first and second interfaces are recessed in the opening and arranged below the upper dielectric layer surface.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.

Abstract: The present invention provides a semiconductor device structure which integrates a lateral diffused metal oxide semiconductor (LDMOS) with a Schottky diode, including: a substrate, having a first conductivity type, a gate positioned on the substrate, a drain region formed in the substrate, the drain region having a second conductivity type complementary to the first conductivity type, a source region formed in the substrate, the source region having the second conductivity type, a high-voltage well region formed in the substrate, the high-voltage well region having a first conductivity type; a Schottky diode disposed on the substrate and disposed beside the LDMOS, wherein the semiconductor device structure is an asymmetric structure, and a deep well region disposed in the substrate and having the second conductivity type, wherein the LDMOS and the Schottky diode are all formed within the deep well region.

Abstract: Disclosed is an apparatus for pesticide detection in aqueous solution was provided, wherein an electrochemical biosensor, a container for mixing and an electrical signal analyzer were used, and the biosensor is disposable.

Abstract: A FinFET device includes a dielectric layer formed over a semiconductor substrate and having an upper dielectric layer surface. A fin of semiconductor material extends upwards from the substrate through an opening in the dielectric layer. A base portion of the fin, which is recessed below the upper dielectric layer surface, includes a base channel region that separates first and second base source/drain regions. An upper channel region extends upwards from the base channel region and terminates in an upper fin surface disposed above the upper dielectric layer surface. A gate electrode straddles the upper channel region and is separated from the upper channel region by a gate dielectric. First and second epitaxial source/drain regions meet the first and second base source/drain regions, respectively, at first and second interfaces, respectively. The first and second interfaces are recessed in the opening and arranged below the upper dielectric layer surface.

Abstract: A semiconductor device having an open profile gate electrode, and a method of manufacture, are provided. A funnel-shaped opening is formed in a dielectric layer and a gate electrode is formed in the funnel-shaped opening, thereby providing a gate electrode having an open profile. In some embodiments, first and second gate spacers are formed alongside a dummy gate electrode. The dummy gate electrode is removed and upper portions of the first and second gate spacers are removed. The first and second gate spacers may be formed of different materials having different etch rates.

Abstract: A FinFET device includes a dielectric layer formed over a semiconductor substrate and having an upper dielectric layer surface. A fin of semiconductor material extends upwards from the substrate through an opening in the dielectric layer. A base portion of the fin, which is recessed below the upper dielectric layer surface, includes a base channel region that separates first and second base source/drain regions. An upper channel region extends upwards from the base channel region and terminates in an upper fin surface disposed above the upper dielectric layer surface. A gate electrode straddles the upper channel region and is separated from the upper channel region by a gate dielectric. First and second epitaxial source/drain regions meet the first and second base source/drain regions, respectively, at first and second interfaces, respectively. The first and second interfaces are recessed in the opening and arranged below the upper dielectric layer surface.

Abstract: A clip assembly includes a seat having a surrounding wall with a receiving hole, and a locking mechanism proximate to the surrounding wall and including a pair of movable levers. Each movable lever has an engaging portion movably inserted into the receiving hole, and a driven portion. A drive unit has a button that is moved to a pressed position, where the driven portions are pushed to move away from each other and out of the receiving hole. A clip mechanism includes a connection body received in the receiving hole and having two connecting holes to respectively engage the engaging portions. The engaging portions are disengageable from the connecting holes by pressing the button.