Patents by Inventor Kun Huang

Kun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180247913
    Abstract: The present disclosure relates to a method for manufacturing a semiconductor device. The method includes providing a first electronic component including a first metal contact and a second electronic component including a second metal contact, changing a lattice of the first metal contact, and bonding the first metal contact to the second metal contact under a predetermined pressure and a predetermined temperature.
    Type: Application
    Filed: February 27, 2017
    Publication date: August 30, 2018
    Applicants: ADVANCED SEMICONDUCTOR ENGINEERING, INC., NATIONAL CHUNG HSING UNIVERSITY
    Inventors: Ying-Ta CHIU, Shang-Kun HUANG, Yong-Da CHIU, Jenn-Ming SONG
  • Patent number: 10062518
    Abstract: A dye adsorption method and a dye adsorption apparatus is provided in this disclosure. The dye adsorption method includes a dye adsorption step. In the dye adsorption step, a dye is injected into and flowed through a space between two electrodes of a solar cell facing each other to obtain at least one dye-adsorbed electrode.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: August 28, 2018
    Assignees: Industrial Technology Research Institute, Formosa Plastics Corporation
    Inventors: Po-Tsung Hsiao, Jung-Pin Chiou, Yung-Liang Tung, Chih-Chou Chang, Liang-Kun Huang, Po-Min Chen, Wan-Tun Hung
  • Patent number: 10044153
    Abstract: An electrical connector for coaxial conductor includes a shell, a first cap, a second cap, a conducting member and a conductor. The first cap and the second cap are in contact with each other and simultaneously located in the shell. The conducting member has an end pressing against the first cap and another end against the second cap. The conductor is extended through the second cap, such that a section of the conductor that is projected into the second cap is connected to the conducting member. With the shell, the first cap, the second cap, the conducting member and the conductor assembled in the above manner, the number of parts for the electrical connector is decreased to enable a reduced overall volume of the electrical connector.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: August 7, 2018
    Assignee: Din Yi Industrial Co., Ltd.
    Inventor: Ching-Kun Huang
  • Patent number: 10037853
    Abstract: A dye adsorption method and a dye adsorption apparatus is provided in this disclosure. The dye adsorption method includes a dye adsorption step. In the dye adsorption step, a dye is injected into and flowed through a space between two electrodes of a solar cell facing each other to obtain at least one dye-adsorbed electrode.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: July 31, 2018
    Assignees: Industrial Technology Research Institute, Formosa Plastics Corporation
    Inventors: Po-Tsung Hsiao, Jung-Pin Chiou, Yung-Liang Tung, Chih-Chou Chang, Liang-Kun Huang, Po-Min Chen, Wan-Tun Hung
  • Publication number: 20180201805
    Abstract: A resin composition comprises a modified polyimide compound, an epoxy resin, and a solvent. The modified polyimide compound has a chemical structural formula of the Ar? represents a group selected from a group consisting of phenyl having a chemical structural formula of diphenyl ether having a chemical structural formula of biphenyl having a chemical structural formula hexafluoro-2,2-diphenylpropane having a chemical structural formula of benzophenone having a chemical structural formula of and diphenyl sulfone having a chemical structural formula of and any combination thereof, the epoxy resin and the modified polyimide compound are in a molar ratio of about 0.1:1 to about 1:1. A polyimide film and a method for manufacturing the polyimide film using the resin composition are also provided.
    Type: Application
    Filed: August 29, 2017
    Publication date: July 19, 2018
    Inventors: MING-JAAN HO, MAO-FENG HSU, SHOU-JUI HSIANG, NAN-KUN HUANG, YU-WEN KAO, CHIA-YIN TENG, CHING-HSUAN LIN
  • Publication number: 20180182559
    Abstract: A dye adsorption method and a dye adsorption apparatus is provided in this disclosure. The dye adsorption method includes a dye adsorption step. In the dye adsorption step, a dye is injected into and flowed through a space between two electrodes of a solar cell facing each other to obtain at least one dye-adsorbed electrode.
    Type: Application
    Filed: February 26, 2018
    Publication date: June 28, 2018
    Inventors: Po-Tsung HSIAO, Jung-Pin CHIOU, Yung-Liang TUNG, Chih-Chou CHANG, Liang-Kun HUANG, Po-Min CHEN, Wan-Tun HUNG
  • Patent number: 9984967
    Abstract: A semiconductor structure includes a first dielectric layer, a first conductive via, a partial landing pad, a second dielectric layer, and a second conductive via. The first conductive via is disposed in the first dielectric layer. The partial landing pad is disposed on the first conductive via and the first dielectric layer, in which the partial landing pad has a top surface and a bottom surface, and the top surface of the partial landing pad has a width greater than or substantially equal to that of the bottom surface of the partial landing pad. The second dielectric layer is disposed on the partial landing pad. The second conductive via is disposed in the second dielectric layer and electrically connected to the partial landing pad.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Yu Cheng, Shih-Kang Tien, Ching-Kun Huang
  • Publication number: 20180111106
    Abstract: A method for producing microparticles includes filling a tank with a first fluid. A nozzle including a plurality of first outlet ports facing the tank is provided. A second fluid forms a plurality of liquid films on the first outlet ports. The liquid films on the first outlet ports absorb a vibrational energy to form a plurality of microdroplets that falls into the first fluid. The first fluid envelops outer layers of the microdroplets to form a plurality of semi-products of microparticles. Each semi-product includes an outer layer formed by the first fluid and an inner layer formed by the second fluid. The semi-products in the tank are collected. The outer layers of the semi-products are removed to form a plurality of microparticle products.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 26, 2018
    Inventors: Zong-Hsin Liu, Cheng-Han Hung, Ying-Chieh Lin, Cheng-Tang Pan, Yao-Kun Huang, Ying-Cheng Lu
  • Publication number: 20180111103
    Abstract: A nozzle for producing microparticles includes a nozzle body having an oscillating device and an amplifying portion connected to the oscillating device and located between first and second ends of the nozzle body. A through-hole extends from the first end through the amplifying portion and the second end. A tube assembly is mounted in the through-hole and includes first and second tubes between which a first fluid passageway is defined. A second fluid passageway is defined in the second tube. Two ends of the first tube respectively form a first filling port and a plurality of first outlet ports both of which intercommunicate with the first fluid passageway. Two ends of the second tube respectively form a second filling port and a second outlet port both of which intercommunicate with the second fluid passageway. A formation space is defined between the second outlet port and the first outlet ports.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 26, 2018
    Inventors: Zong-Hsin Liu, Cheng-Han Hung, Ying-Chieh Lin, Cheng-Tang Pan, Yao-Kun Huang, Ying-Cheng Lu
  • Publication number: 20180099256
    Abstract: A nozzle for producing microparticles includes a nozzle body having a first end and a second end opposite to the first end. The nozzle body further includes a through-hole extending from the first end through the second end. A fluid passageway is defined in the through-hole and forms a filling port in the first end of the nozzle body and a plurality of outlet ports in the second end of the nozzle body. The nozzle body further includes an oscillating device and an amplifying portion. The oscillating device is connected to the amplifying portion. The amplifying portion surrounds the fluid passageway and is located adjacent to the second end of the nozzle body.
    Type: Application
    Filed: December 14, 2016
    Publication date: April 12, 2018
    Inventors: Zong-Hsin Liu, Cheng-Han Hung, Ying-Chieh Lin, Cheng-Tang Pan, Yao-Kun Huang, Ying-Cheng Lu
  • Patent number: 9920893
    Abstract: A bus line LED module includes a printed circuit board on which LEDs are mounted and lens portion formed over the LEDs. A pair of wires is positioned beneath the printed circuit board within a bottom portion assembly to form a top portion assembly. A pair of windows within a bottom portion assembly enables access to a portion of the wires where a metal-to-metal contact to the metal inner portion of the wires is made. A pair of metal connectors extends from the printed circuit board to make metal-to-metal contact with the metal wires. A sealing connection is made between the top portion assembly and the bottom portion assembly.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: March 20, 2018
    Assignee: General LED Opco, LLC
    Inventors: Michelle Kun Huang, Gray Lankford
  • Publication number: 20180069089
    Abstract: A method of forming a semiconductor structure is disclosed. A substrate having a first area and a second area is provided, wherein a first surface of the first area is lower than a second surface of the second area. A first insulating layer, a first gate, a first dielectric layer and a first dummy gate are sequentially formed on the first surface of the first area. A second dielectric layer and a second dummy gate are formed on the second surface of the second area. An inter-layer dielectric layer is formed around the first gate, the first dummy gate and the second dummy gate. The first dummy gate and the second dummy gate are removed, so as to form a first trench and a second trench in the inter-layer dielectric layer. A second gate and a third gate are filled respectively in the first trench and the second trench.
    Type: Application
    Filed: October 31, 2017
    Publication date: March 8, 2018
    Applicant: United Microelectronics Corp.
    Inventors: Kun-Huang Yu, Shih-Yin Hsiao
  • Publication number: 20180019065
    Abstract: A dye adsorption method and a dye adsorption apparatus is provided in this disclosure. The dye adsorption method includes a dye adsorption step. In the dye adsorption step, a dye is injected into and flowed through a space between two electrodes of a solar cell facing each other to obtain at least one dye-adsorbed electrode.
    Type: Application
    Filed: November 8, 2016
    Publication date: January 18, 2018
    Inventors: Po-Tsung HSIAO, Jung-Pin CHIOU, Yung-Liang TUNG, Chih-Chou CHANG, Liang-Kun HUANG, Po-Min CHEN, Wan-Tun HUNG
  • Patent number: 9871315
    Abstract: An electrical connector includes a housing internally defining a receiving passage having a front installation hole and a rear stop hole; an inner cap assembled to an inner side of the stop hole and internally defining a mounting passage; a pad assembled to an inner side of the installation hole and internally defining a holding passage; a conductor extended through and held in the holding passage with a forward exposed conducting pin section; and a flat spring member having a rear abutting end mounted in the mounting passage and a front clamping end riveted to a rear end of the conductor and forward pressed against a rear end surface of the pad, such that a spacing chamber is defined between an inner wall surface of the housing and the flat spring member. Therefore, the electrical conductor has fewer parts than conventional electrical connectors to enable reduced assembling complexity and time.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: January 16, 2018
    Assignee: Din Yi Industrial Co., Ltd.
    Inventor: Ching Kun Huang
  • Publication number: 20180005835
    Abstract: Provided is a memory device including a first gate, a second gate and an inter-gate dielectric layer. The first gate is buried in a substrate. The second gate includes metal and is disposed on the substrate. The inter-gate dielectric layer is disposed between the first and second gates. The inter-gate dielectric layer comprises a high-k layer having a dielectric constant of greater than about 10.
    Type: Application
    Filed: September 14, 2017
    Publication date: January 4, 2018
    Applicant: United Microelectronics Corp.
    Inventors: Kun-Huang Yu, Shih-Yin Hsiao
  • Patent number: 9860180
    Abstract: A multi-level flow table search method includes extracting matching information of a data packet when the data packet is received and selecting a keyword from the matching information of the data packet according to flow-table match-field configuration information. The method also includes searching for a match field of each-level flow table in a multi-level flow table starting from a first-level flow table in the multi-level flow table by using the keyword as a search keyword, and matching the search keyword with the match field. If matching of a match field of a current-level flow table is completed, the method includes executing a corresponding instruction, and if the current-level flow table is not a last-level flow table or there is an instruction for executing an action, executing a corresponding action.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: January 2, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wanfu Ding, Chengyong Lin, Gaogang Xie, Hongtao Guan, Kun Huang, Jixing Yu
  • Patent number: 9837401
    Abstract: Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate the spacer on a first side of the gate, and a drain region is disposed proximate the spacer on a second side of the gate. A metal layer is disposed over the source region and the drain region. The metal layer extends beneath the spacers by about 25% or greater than a width of the spacers.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: December 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Kun Huang, Shih-Che Lin, Hung-Chih Yu
  • Patent number: 9824827
    Abstract: The instant disclosure relates to a method for making solid electrolytic capacitor package structure with improved conductive terminals. The first step is to provide at least one conductive terminal having an electrical contact portion and a lead-out portion. The next step is to remove a portion of mantle layer from the surface of the core layer of at least one conductive terminal by a dry-type process. The next step is to sequentially stack together a plurality of stacked-type capacitors to form a capacitor unit and then electrically connect the capacitor unit to at least one conductive terminal. The next step is to form a package body to encapsulate the capacitor unit and the electrical contact portion of at least one conductive terminal. The last step is to bend the lead-out portion of at least one conductive terminal to an axis that extends along the surface of the package body.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: November 21, 2017
    Assignee: APAQ TECHNOLOGY CO., LTD.
    Inventors: Chi-Hao Chiu, Ming-Tsung Chen, Kun-Huang Chang
  • Patent number: 9812327
    Abstract: Provided is a memory device including a first gate, a second gate and an inter-gate dielectric layer. The first gate is buried in a substrate. The second gate includes metal and is disposed on the substrate. The inter-gate dielectric layer is disposed between the first and second gates. A method of forming a memory device is further provided.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: November 7, 2017
    Assignee: United Microelectronics Corp.
    Inventors: Kun-Huang Yu, Shih-Yin Hsiao
  • Patent number: D798698
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: October 3, 2017
    Inventors: Ru-Tai Shih, Kun-Huang Shih, Syu-Guei Shih