Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A sacrificial layer on a substrate, a P-type doped semiconductor layer having an N-well on the sacrificial layer, and a dielectric stack on the P-type doped semiconductor layer are subsequently formed. A channel structure extending vertically through the dielectric stack and the P-type doped semiconductor layer is formed. The dielectric stack is replaced with a memory stack, such that the channel structure extends vertically through the memory stack and the P-type doped semiconductor layer. The substrate and the sacrificial layer are removed to expose an end of the channel structure. Part of the channel structure abutting the P-type doped semiconductor layer is replaced with a semiconductor plug.

Abstract: Three-dimensional memory devices and fabricating methods therefore are disclosed. The memory device can comprise a stack structure comprising a plurality of gate layers, a plurality of first insulating layers, and a plurality of second insulating layers. The stack structure has a staircase region comprising a plurality of stair structures. Each stair structure comprises a first portion of the stair structure comprising one gate layer and a first portion of one first insulating layer, and a second portion of the stair structure comprising a second portion of the one first insulating layer and a second insulating layer. The memory device can further comprise at least one contact structure each located on a top surface of one of the plurality of stair structures, and at least one contact portion in contact with the at least one contact structure.

Abstract: The present disclosure provides a method for forming a three-dimensional (3D) memory device. The method includes disposing an alternating dielectric stack over a substrate, wherein the alternating dielectric stack includes first dielectric layers and second dielectric layers alternatingly stacked on the substrate. The method also includes forming a channel structure penetrating through the alternating dielectric stack and extending into the substrate, wherein the channel structure includes a channel layer disposed on a sidewall of a memory film. The method further includes removing the substrate and a portion of the memory film that extends into the substrate to expose a portion of the channel layer; and disposing an array common source (ACS) on the exposed portion of the channel layer.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a peripheral circuit on the substrate, a memory stack including interleaved conductive layers and dielectric layers above the peripheral circuit, a first semiconductor layer above the memory stack, a second semiconductor layer above and in contact with the first semiconductor layer, a plurality of channel structures each extending vertically through the memory stack and the first semiconductor layer, and a source contact above the memory stack and in contact with the second semiconductor layer.

Abstract: Three-dimensional (3D) memory devices and methods for forming the same are disclosed. In certain aspects, a 3D memory device includes a stack structure including interleaved conductive layers and stack dielectric layers, a channel structure extending through the stack structure, and a doped semiconductor layer. The channel structure includes a memory film and a semiconductor channel. The semiconductor channel includes a doped portion and an undoped portion. A part of the doped portion of the semiconductor channel extends beyond the stack structure in a first direction. A part of the doped semiconductor layer is in contact with a sidewall of the part of the doped portion of the semiconductor channel that extends beyond the stack structure.

Abstract: Three-dimensional (3D) memory devices and methods for forming the same are disclosed. In certain aspects, a 3D memory device includes a stack structure including interleaved conductive layers and dielectric layers, a channel structure extending through the stack structure, and a doped semiconductor layer including a plate and a plug extending from the plate into the channel structure. The channel structure includes a memory film and a semiconductor channel. The semiconductor channel includes a doped portion, and a part of the doped portion of the semiconductor channel extends beyond the stack structure in a first direction. The doped portion of the semiconductor channel circumscribes the plug of the doped semiconductor layer.

Abstract: Three-dimensional (3D) memory devices and methods for forming the same are disclosed. In certain aspects, a 3D memory device includes a stack structure including interleaved conductive layers and dielectric layers, a doped semiconductor layer, and a channel structure extending through the stack structure and in contact with the doped semiconductor layer. The channel structure includes a composite dielectric film and a semiconductor channel along a first direction. The composite dielectric film includes a gate dielectric portion and a memory portion along a second direction perpendicular to the first direction. A part of the gate dielectric portion faces, along the first direction, one of the conductive layers that is closest to the doped semiconductor layer.

Abstract: A three-dimensional (3D) memory device includes a core array region and a staircase region adjacent to the core array region. The core array region includes a memory stack having a plurality of conductor layers and a plurality of dielectric layers stacked alternatingly, a first semiconductor layer disposed over the memory stack, and a channel structure extending through the memory stack and the first semiconductor layer. The staircase region includes a staircase structure, a supporting structure disposed over the staircase structure, and a plurality of contacts contacting the plurality of conductor layers in the staircase structure. The first semiconductor layer overlaps the core array region in a plan view of the 3D memory device and the supporting structure overlaps the staircase region in the plan view of the 3D memory device.

Abstract: Techniques are described for determining weight distribution of a vehicle. A method of performing autonomous driving operation includes receiving two sets of values from two sets of sensors, where a first set of sensors measure weights or pressures applied on axles of a vehicle, and where a second set of sensors measure pressures in tires of the vehicle. The method performs an error detection and removal operation to remove or filter out any erroneous values from the two sets of values to obtain two sets of filtered values. The method determines one or more values that describe a weight or pressure applied on the axle to obtain the weight distribution of the vehicle based on the first set of filtered values or the second set of filtered values. Based on the obtained weight distribution of the vehicle, the method can determine a driving operation of the vehicle.

Abstract: A smart acoustic information recognition-based welded weld impact quality determination method and system, comprising: controlling a tip of an ultrasonic impact gun (1) to perform impact treatment on a welded weld with different treatment pressures, treatment speeds, treatment angles and impact frequencies, obtaining acoustic signals during the impact treatment, calculating feature values of the acoustic signals, and constructing an acoustic signal sample set including various stress conditions; marking the acoustic signal sample set according to impact treatment quality assessment results for the welded weld; establishing a multi-weight neural network model, and using the marked acoustic signal sample set to train the multi-weight neural network model; obtaining feature values of welded weld impact treatment acoustic signals to be determined, inputting the feature values into the trained multi-weight neural network model, and outputting determination results for welded weld impact treatment quality to be det

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack, a channel structure, a channel local contact, a slit structure, and a staircase local contact. The memory stack includes interleaved conductive layers and dielectric layers above the substrate. The channel structure extends vertically through the memory stack. The channel local contact is above and in contact with the channel structure. The slit structure extends vertically through the memory stack. The staircase local contact is above and in contact with one of the conductive layers at a staircase structure on an edge of the memory stack. Upper ends of the channel local contact, the slit structure, and the staircase local contact are flush with one another.

Abstract: A system for predicting and summarizing medical events from electronic health records includes a computer memory storing aggregated electronic health records from a multitude of patients of diverse age, health conditions, and demographics including medications, laboratory values, diagnoses, vital signs, and medical notes. The aggregated electronic health records are converted into a single standardized data structure format and ordered arrangement per patient, e.g., into a chronological order. A computer (or computer system) executes one or more deep learning models trained on the aggregated health records to predict one or more future clinical events and summarize pertinent past medical events related to the predicted events on an input electronic health record of a patient having the standardized data structure format and ordered into a chronological order.

Abstract: This disclosure relates to methods, polynucleotides, vectors, viral particles, cells, and systems or the engineering of human tissues. One aspect of the disclosure relates to using lineage-specific miRNA binding molecules to bias tissue lineage. Another aspect of the disclosure relates to using lineage-specific transcription factor overexpression to bias tissue lineage.

Abstract: A system for predicting and summarizing medical events from electronic health records includes a computer memory storing aggregated electronic health records from a multitude of patients of diverse age, health conditions, and demographics including medications, laboratory values, diagnoses, vital signs, and medical notes. The aggregated electronic health records are converted into a single standardized data structure format and ordered arrangement per patient, e.g., into a chronological order. A computer (or computer system) executes one or more deep learning models trained on the aggregated health records to predict one or more future clinical events and summarize pertinent past medical events related to the predicted events on an input electronic health record of a patient having the standardized data structure format and ordered into a chronological order.

Abstract: The present disclosure relates to a high and low pressure manifold liquid supply system for fracturing units, including: a trailer, a high and low pressure manifold arranged on the trailer, a support frame arranged on a platform of the trailer, and a power distribution switch cabinet arranged on the support frame, which is configured to be electrically connected to the electrically-driven fracturing units and configured to distribute electricity to the electrically-driven fracturing units. Through the high and low pressure manifold liquid supply system integrated with electricity supply facilities therein according to the present disclosure, the electrically-driven fracturing units are powered, in this way, the electricity supply and distribution system in the well site can be effectively simplified, the connection distance of the cables can be shorten, and further the time spent on connection can be saved, thereby improving the well site layout efficiency.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A stop layer, a first polysilicon layer, a sacrificial layer, a second polysilicon layer, and a dielectric stack are sequentially formed at a first side of a substrate. A channel structure extending vertically through the dielectric stack, the second polysilicon layer, the sacrificial layer, and the first polysilicon layer, stopping at the stop layer, is formed. An opening extending vertically through the dielectric stack and the second polysilicon layer, stopping at the sacrificial layer to expose part of the sacrificial layer, is formed. The sacrificial layer is replaced, through the opening, with a third polysilicon layer between the first and second polysilicon layers. The substrate is removed from a second side opposite to the first side of the substrate, stopping at the stop layer.

Abstract: This disclosure provides a floor grinding machine. The floor grinding machine includes: a body bracket; a grinding disc connected to the body bracket, wherein the grinding disc has a first position configured to grind a ground and a second position configured to replace a grinding member provided thereon; a first moving wheel provided on the body bracket; a second moving wheel connected to the body bracket, wherein the second moving wheel has a travelling position in which the second moving wheel is capable moving along the ground and an avoiding position in which the second moving wheel is away from the ground. The floor grinding machine has a first working state configured to grind the ground and a second working state configured to travel or to replace the grinding member.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A peripheral circuit is formed on a first substrate. A first semiconductor layer is formed on a second substrate. A supporting structure and a second semiconductor layer coplanar with the supporting structure are formed on the first semiconductor layer. A memory stack is formed above the supporting structure and the second semiconductor layer. The memory stack has a staircase region overlapping the supporting structure. A channel structure extending vertically through the memory stack and the second semiconductor layer into the first semiconductor layer is formed. The first substrate and the second substrate are bonded in a face-to-face manner.

Abstract: The invention provides a control system for controlling an intelligent system to reduce the power consumption based on a Bluetooth device, comprising: a main control chip; the Bluetooth device connected with the main control chip; a controller connected with the Bluetooth device and the main control chip, respectively, wherein the controller is connected with a power supply and is used for controlling the on and off of the power supply circuit of the control chip; and an isolation circuit connected among the Bluetooth device, main control chip and the controller, when the controller controls the power supply circuit to be switched off, the isolation circuit enables the Bluetooth device at an enabled state. The issues, that the cost is increased due to the fact that the single-chip microcomputer is additionally arranged to realize Bluetooth wake-up and the overall power consumption of the intelligent system is high, are overcome.