Abstract: Methods, computer program products, and/or systems are provided that perform the following operations: obtaining video data; dividing the video data into a plurality of video fragments based, at least in part, on page detection; extracting one or more elements from each of the plurality of video fragments; determining element type data for each of the one or more extracted elements; generating element style data for the one or more extracted elements; determining page flow for the plurality of video fragments; and generating one or more pages based, at least in part, on the one or more elements extracted from the plurality of video fragments, the element type data, the element style data, and the page flow.

Abstract: A data processing method and apparatus are described. The data processing apparatus obtains an input tensor corresponding to input data. The data processing apparatus determines M1 first-type tensor blocks and M2 second-type tensor blocks. P processing units in the data processing apparatus process the M tensor blocks concurrently. In a first time period, all of the tensor blocks that are processed concurrently by the P processing units are first-type tensor blocks. In a second time period, all of the tensor blocks that are processed concurrently by the P processing units are second-type tensor blocks.

Abstract: A high-nickel ternary core-shell precursor for a lithium battery, a positive electrode material and a preparation method therefor. The chemical structural formula of the precursor is zNi(C4H7N2O2)2—Nix-zM1yM21-x-y(OH)2, wherein M1 and M2 are two of cobalt, aluminum, and manganese. The preparation method comprises: pumping a prepared metal salt solution, a dimethylglyoxime-ammonia water composite solution, and an ammonia water solution into a reaction kettle, maintaining the pH of a reaction system, and controlling the reaction time to obtain a sphere-like precursor inner core with a structural formula of Ni(C4H7N2O2)2; pumping the metal salt solution and the ammonia water solution, stopping pumping the dimethylglyoxime-ammonia water composite solution, pumping a sodium hydroxide solution to obtain a sphere-like core-shell precursor, washing, drying, sieving and deironing the precursor, mixing with a lithium source, and calcining to prepare the positive electrode material.

Abstract: A barrier structure for bearing a high-energy impact and construction method thereof are provided. The barrier structure includes a supporting pile array arranged between two opposite mountain slope surfaces. The supporting pile array is arranged in a straight line and includes two or more supporting piles. The two or more supporting piles are fixed at a lower part of a mountain. A barrier net is connected to the two or more supporting piles. The barrier net passes through the supporting pile array and extends to the two opposite mountain slope surfaces. The barrier net is fixed on the two opposite mountain slope surfaces. Pull plates are disposed on the two opposite mountain slope surfaces, and one side of each of the pull plates is fixed to a corresponding slope surface of the two opposite mountain slope surfaces through reverse prestressed anchor cables.

Abstract: Three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. In certain aspects, a disclosed 3D memory device can comprise a first semiconductor structure including a core region, a staircase region, and a periphery region, and a second semiconductor structure including a second periphery circuit on a substrate. The first semiconductor structure can include a memory stack on an activated semiconductor layer in the core region, a staircase structure on a supplemental semiconductor layer in the staircase region, and a first periphery circuit on a doped semiconductor film in the periphery region. The second semiconductor structure is connected with the first semiconductor structure.

Abstract: Three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. In certain aspects, a method for forming a 3D memory device can comprise forming a first semiconductor structure, comprising forming a stack structure on a first substrate, and forming a gate line slit structure including a filling structure penetrating the stack structure and extending into the first substrate. The method can further comprise forming a second semiconductor structure including a periphery circuit on a second substrate, and bonding the second semiconductor structure to the first semiconductor structure. The method can further comprise removing a portion of the first substrate and a portion of the gate line slit structure extended into the first substrate, and forming a supplemental semiconductor layer on a remaining portion of the first substrate.

Abstract: Three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. In certain aspects, a disclosed 3D memory device comprises a first semiconductor structure including a core region, a spacer region, and a periphery region, and a second semiconductor structure including a second periphery circuit on a substrate. The first semiconductor structure comprises a memory stack on a semiconductor layer in the core region, a first periphery circuit on the semiconductor layer in the periphery region, and a spacer structure in the spacer region to separate the memory stack and the first periphery circuit. The second semiconductor structure is connected to the first semiconductor structure.

Abstract: A multi-timescale voltage regulation method based on source-grid-load-storage multi -terminal collaboration of a power distribution network is disclosed, which comprises: establishing, based on a Petri network, a multi-mode switching control model based on voltage security event trigger to realize effective control of a global voltage; establishing multi-objective optimization taking into account a source-storage-load regulation cost and a network transmission loss to realize collaborative and dynamic control of controllable resources of a source terminal, a load terminal and a storage terminal in each operating mode; and establishing a source-storage-load multi-terminal collaboration-based distributed voltage control model based on voltage security event trigger over a short timescale by taking into account the problems of voltage magnitude being out of limit and voltage leap, and solving online an optimal control sequence of the source terminal, the load terminal and the storage terminal in a receding horiz

Abstract: A method and apparatus for performing a biosignal analysis task using a set of models includes receiving an input biosignal. Information that identifies the biosignal analysis task to be performed in association with the input biosignal is received. A waveform model and a digital signal processing (DSP) model are selected. A first type of feature and a second type of feature of the input biosignal are identified. An analysis model is selected, and the biosignal analysis task is performed using the analysis model.

Abstract: A cloud data center tenant-level outbound rate limiting method includes: starting a timer, receiving and generating statistics of outbound packets of tenants in a current period, obtaining local traffic rate information of the tenants based on all the outbound packets of the tenants in the current period, and generating local bandwidth demand frames of the tenants based on the local traffic rate information of the tenants; when a timing of the timer reaches the end of the current period, sending the local bandwidth demand frames of the tenants to a switch; receiving a global bandwidth demand frame sent by the switch, and computing bandwidth budgets of the tenants based on the local traffic rate information of the tenants and the global bandwidth demand frames of the tenants; modifying rate limiting parameters, and limiting the rate of the outbound packets of the tenants in a next period.

Abstract: A method of localizing a mobile robot 100 with respect to a target object 601 using an initial map of a reference object which is a representation of the target object is disclosed herein.

Abstract: A speech synthesis method an includes: obtaining a target phoneme of a target user and a timbre identifier of the target user, the target phoneme being determined based on a target text; inputting the target phoneme into a first submodel of a speech synthesis model, to obtain a target phonetic posteriorgram of the target phoneme, the target phonetic posteriorgram reflecting features of phonemes in the target phoneme and pronunciation duration features of phonemes in the target phoneme; and inputting the target phonetic posteriorgram and the timbre identifier into a second submodel of the speech synthesis model, to obtain target speech corresponding to the target text and the timbre identifier, the second submodel being configured to predict the target phonetic posteriorgram and a predicted intermediate variable of the target speech, and the predicted intermediate variable reflecting a frequency domain feature of the target speech.

Abstract: Aspects of the disclosure provide a semiconductor device including a stack structure and a first conductive pillar. The stack structure can include a plurality of interlayer insulating layers and gate layers arranged alternately along a stack direction, and stack structure an array region and a staircase region adjoining the array region. The stack structure has a plurality of staircases in the staircase region arranged corresponding to the gate layers. Each of the gate layers can include a first gate part at the corresponding staircase and a second gate part connected to the first gate part, and a thickness of the first gate part along the stack direction is less than that of the second gate part along the stack direction. The first conductive pillar is arranged in the staircase region and penetrates through the stack structure along the stack direction, and the first conductive pillar is electrically connected with the first gate part.

Abstract: A barrier structure for bearing a high-energy impact and construction method thereof are provided. The barrier structure includes a supporting pile array arranged between two opposite mountain slope surfaces. The supporting pile array is arranged in a straight line and includes two or more supporting piles. The two or more supporting piles are fixed at a lower part of a mountain. A barrier net is connected to the two or more supporting piles. The barrier net passes through the supporting pile array and extends to the two opposite mountain slope surfaces. The barrier net is fixed on the two opposite mountain slope surfaces. Pull plates are disposed on the two opposite mountain slope surfaces, and one side of each of the pull plates is fixed to a corresponding slope surface of the two opposite mountain slope surfaces through reverse prestressed anchor cables.

Abstract: A method for preparing 3,3?-diaminobenzidine, the method comprising the following steps: subjecting 4,4?-biphenol and N,N-dimethylsulfamoyl chloride to an esterification reaction in a specified solvent at 40-70° C. to obtain 4,4?-biphenyl bis(N,N-dimethylaminosulfonate) as a first intermediate; subjecting the 4,4?-biphenyl bis(N,N-dimethylaminosulfonate) to a chlorination reaction with a chlorinating reagent under acidic conditions to obtain 3,3?-dichloro-4,4?-biphenyl bis(N,N-dimethylaminosulfonate) as a second intermediate; subjecting the second intermediate 3,3?-dichloro-4,4?-biphenyl bis(N,N-dimethylaminosulfonate) to an ammonolysis reaction with anammoniation reagent in the presence of a combined catalyst to obtain a crude product of 3,3?,4,4?-tetraaminobiphenyl, wherein the combined catalyst is a mixture of proline, a cuprous salt and a phase transfer catalyst; and subjecting the crude product of 3,3?,4,4?-tetraaminobiphenyl to a post-treatment to obtain a purified 3,3?,4,4?-tetraaminobiphenyl product.

Abstract: The present disclosure provides an N protein epitope mutation marker for preparing an epitope deletion-marked vaccine strain of type II porcine reproductive and respiratory syndrome virus (PRRSV) and use thereof, belonging to the technical field of biological products. In the mutation marker, one or more amino acids are mutated based on an epitope sequence at positions 92 to 103 of a C-terminal of an N protein of the type II PRRSV; and the epitope mutation marker has an amino acid sequence shown in SEQ ID NO: 1, where X1 is selected from the group consisting of T, P, and A; and X2 is selected from the group consisting of V and A.

Abstract: An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.

Abstract: This disclosure relates to adaptive recommendations for user-generated mediasets. A mediaset component provides for users to generate mediasets. A user-generated mediaset can include a user-generated playlist or a user-generated media channel. A monitoring component monitors consumption of media, e.g., by a consumer. A relatedness component determines a set of the user-generated mediasets that are related to the media consumed by the consumer. A recommendation component recommends a subset of the user-generated mediasets based on a set of criteria. A rights management component determines a set of authorizations of the consumer for respective media content associated with the set of user-generated mediasets, and takes at least one action based on the set of authorizations, e.g., updating one of the mediasets based on the set of authorizations.

Abstract: Three-dimensional (3D) NAND memory devices and methods are provided. In one aspect, a 3D NAND memory device includes a substrate, a layer stack, memory cells, a semiconductor layer, a contact structure, and gate line slit structures. The substrate includes a doped region. The layer stack is formed over the substrate. The memory cells are formed through the layer stack over the substrate. The semiconductor layer is formed on the doped region and a side portion of a channel layer that extends through the layer stack. The contact structure electrically contacts the doped region. A dielectric material is filled in the gate line slit structures. Air gaps are formed in the gate line slit structures by the dielectric material.