Abstract: The present application provides a support structure, including: a support body; and at least one buffer portion, provided within the support body, where the buffer portion includes a plurality of buffer blocks provided adjacent to each other; where at least one first slit is provided on a support surface of the buffer portion, the first slit divides the buffer portion into the plurality of the buffer blocks, and the plurality of the buffer blocks are connected to each other at at least one position of the buffer portion other than the support surface. The present application further provides a seat cushion structure and a child safety seat.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes an array of memory cells and a first semiconductor layer in contact with sources of the array of NAND memory strings. The second semiconductor structure includes a second semiconductor layer, a first peripheral circuit of the array of memory cells including a first transistor in contact with a first side of the second semiconductor layer, and a second peripheral circuit of the array of NAND memory strings including a second transistor in contact with a second side of the second semiconductor layer opposite to the first side.

Abstract: A head propeller of the flying vehicle compresses incoming flow at a vehicle head inside an upper duct to a lower duct through an air suction channel. A portion of airflow is compressed to the lower duct through the air suction channel under an action of a guide plate and a vehicle body propeller. A bottom propeller of the flying vehicle compresses an airflow into pressure bins of the lower duct at a lower portion through the air suction channel. A sealing state of the pressure bins of the lower duct is destroyed. High-pressure airflow inside the lower duct is jetted out from an air outlet channel to the upper duct. A tail propeller guides the airflow to the tail portion of the vehicle body. The upper duct and the lower duct are constructed inside the pipeline, so a running resistance of the flying vehicle is reduced.

Abstract: Compositions and methods for making a plurality of probes for analyzing a plurality of nucleic acid samples are provided. Compositions and methods for analyzing a plurality of nucleic acid samples to obtain sequence information in each nucleic acid sample are also provided.

Abstract: A data storage method includes: in response to a stream ID carried by an IO write request of a host satisfying a first preset condition, writing data corresponding to the IO write request into a first storage unit; and in response to the stream ID carried by the IO write request satisfying a second preset condition, writing the data corresponding to the IO write request into a second storage unit, wherein the stream ID indicates write latency requirement information of the data corresponding to the IO write request, wherein a data write latency indicated by the stream ID satisfying the first preset condition is less than the data write latency indicated by the stream ID satisfying the second preset condition, wherein a read and write performance of the first storage unit is higher than the read and write performance of the second storage unit.

Abstract: Methods, devices, and systems for three-dimensional (3D) memory devices are provided. In one aspect, a method for forming a three-dimensional (3D) semiconductor device includes: forming a first stack structure including a plurality of alternating sacrificial layers and dielectric layers, the first stack structure having a first region and a second region; forming gate line slits extending through the first stack structure in the first region and the second region; forming a contact via extending to a target sacrificial layer in the second region; forming cavities coupled to the contact via through the gate line slits; and forming conductive layers in replace of the sacrificial layers in the cavities and a contact in the contact via by depositing a conductive material in the contact via and the cavities. The 3D semiconductor device includes a second stack structure having the conductive layers and the dielectric layers.

Abstract: Performance of a negative electrode material is improved. The negative electrode material is a negative electrode material for a battery that includes carbon, sodium tungstate provided on a surface of the carbon, and silicon provided on the surface of the carbon.

Abstract: A log-structured merge-tree (LSM-Tree) based key-value (KV) data storage method includes writing KV data into a NAND flash memory. The KV data includes a key-value pair including a key and a corresponding value. The KV data is stored in a key-value solid state drive (KVSSD), which includes a storage class memory (SCM) and the NAND flash memory. The method further includes storing metadata of the KV data in the SCM. The metadata of the KV data includes the key and index information of the corresponding value of the KV data, and the index information of the corresponding value of the KV data indicates address information of the KV data in the NAND flash memory.

Abstract: A method for combined characterization of pore structure includes steps as follows. Firstly, CO2, N2 and high-pressure mercury intrusion porosimetry characterization curves are plotted based on actual measurement data, then, average values of the overlapping range of the CO2 and N2 characterization curves are calculated, and a function yi?=ƒ(x) is fitted. Each pore volume yi? corresponding to each pore diameter xi is calculated, and a curve is plotted with xi as a horizontal coordinate and yi? as a vertical coordinate, thereby obtaining a characterization curve of the overlapping range between CO2 and N2 adsorptions. The same data processing is used to process the overlapping range data of the N2 and high-pressure mercury intrusion porosimetry characterization curves, to obtain the characterization curve between them. The characterization curves are spliced with the original CO2, N2, and high-pressure mercury intrusion porosimetry characterization curves to obtain a combined characterization curve.

Abstract: A method for calculating a surface relaxation rate of a shale includes: a relaxation time T distribution curve and a pore throat radius r distribution curve are obtained through experiments; abscissas of the two distribution curves are standardized, and the abscissa of the relaxation time T distribution curve is expanded or shrunk to ensure an abscissa value corresponding to a maximum ordinate value in the transformed relaxation time T distribution curve is same as an abscissa value corresponding to a maximum ordinate value in the pore throat radius r distribution curve; straight lines with a number of N parallel to a y-axis of a combined curve graph including the two distribution curves are drawn and a ? value corresponding to each straight line is calculated; and ? value with the number of N are processed to obtain a final surface relaxation rate ??.

Abstract: Examples of the present application disclose semiconductor devices, fabrication methods of semiconductor devices, and semiconductor apparatus. In one example, the semiconductor device includes a first die, the first die includes a first bonding layer, wherein the first bonding layer includes a first connection structure and a first metal ring, the first metal ring disposed around the first connection structure.

Abstract: In certain aspects, a semiconductor device includes a substrate and a first transistor. The first transistor includes a first well in the substrate and having a recess, a recess gate structure including a protrusion structure, and a first source and a first drain spaced apart by the recess gate structure. The protrusion structure extends into the recess of the first well. The recess gate structure includes a first gate dielectric and a first gate electrode on the first gate dielectric.

Abstract: Examples of the present disclosure provide a semiconductor device, a manufacturing method thereof, and a memory system. The semiconductor device comprises: a stacking structure comprising a memory array area and a first sealing area; and at least one circle of sealing structure in the first sealing area and surrounding the memory array area, wherein the sealing structure comprises a sealing ring body penetrating through the stacking structure and at least two circles of first dummy interconnection structures connected with the sealing ring body.

Abstract: The present application discloses a semiconductor device and a fabrication method thereof, and a memory and a memory system. At least one cleavage plane guide structure extending along a second direction is disposed in a first cutting region adjacent to a first device region in a first direction in the semiconductor device, the second direction intersects the first direction, and the cleavage plane guide structure includes a first portion and a second portion that extend along the second direction, and the second portion has higher cleavage plane passability than the first portion. As such, a chip can cleave according to a preset direction and portion when stealth dicing is performed on the chip.

Abstract: A response interaction system for intelligently interacting with a low-voltage user includes: a distribution network and system master station, an intelligent electric meter, a mobile APP, an intelligent interaction terminal, an intelligent gateway, and a low-voltage user load. In the process of the low-voltage user participating in the demand response, the distribution network and system master station publishes a demand response plan and a demand response notification through the mobile APP, the low-voltage user receives the demand response plan and the demand response notification through the mobile APP, the low-voltage user is connected to the intelligent interaction terminal through the mobile APP and controls a load to operate or not operate through the intelligent gateway, to perform the demand response task.

Abstract: A semiconductor device includes an insulating layer, a conductive layer stacking with the insulating layer, a spacer structure through the conductive layer and in contact with the insulating layer, a contact structure in the spacer structure and extending vertically through the insulating layer, and a channel structure including a semiconductor channel, a portion of the semiconductor channel being in contact with the conductive layer. The contact structure includes a first contact portion and a second contact portion in contact with each other.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack comprising interleaved conductive layers and dielectric layers, a plurality of semiconductor layers contacted with each other and located adjacent to the memory stack, a plurality of channel structures each extending vertically through the memory stack and at least one of the semiconductor layers, a source contact in contact with at least one of the semiconductor layers, and a contact pad located on one side of the semiconductor layers that are away from the memory stack.

Abstract: The present invention belongs to the technical field of antibacterial drugs, and discloses a pyrrolylacylpiperidylamine compound and use thereof. The present invention in particular relates to a pyrrolylacylpiperidylamine compound and a pharmaceutically acceptable salt thereof, and use thereof in the preparation of a medicament for resisting infections with bacteria, mycoplasma or chlamydia.