Patents by Inventor Kwang Soo Kim

Kwang Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180182775
    Abstract: A vertical semiconductor device includes odd and even cell blocks, and odd and even block pad structures. Each of the odd cell blocks includes first conductive line structures including conductive lines and insulation layers alternatively stacked in a first direction. Each of the even cell blocks includes second conductive line structures having substantially the same shape as the first conductive line structures. The odd block pad structure is connected to first edge portions of the first conductive line structures. The even block pad structure is connected to second edge portions, opposite the first edge portions, of the second conductive line structures. Each of the odd cell blocks and the even cell blocks has a first width in a third direction. Each of the odd and even block pad structures is formed on a region of a substrate having a second width greater than the first width in the third direction.
    Type: Application
    Filed: June 29, 2017
    Publication date: June 28, 2018
    Inventors: KWANG-SOO KIM, TAE-SEOK JANG
  • Patent number: 10006650
    Abstract: An air blower enables cold-air dehumidification by removing moisture in summer, can supply instantaneous hot air when the room temperature temporarily goes down, enables hot-air humidification by supplying moisture in winter, enables a four-season use by using an additional humidification function in spring and fall, controls room temperature and room humidity by providing an indoor temperature/humidity sensor and a water temperature sensor, saves energy by intelligently operating and stopping all the functions, provides warning signs through lamps for indicating supply or discharge or lack of water with a high/low water level gauge of a water tank and a high water level gauge of a water tank for dehumidification, prevents safety accidents such as damage or conflagration and the like of components related to a fan driving motor by providing a fan driving motor overheating prevention sensor, prevents the leakage of water when a main body falls down.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: June 26, 2018
    Inventor: Kwang Soo Kim
  • Publication number: 20180174661
    Abstract: A three-dimensional semiconductor memory device including a substrate including a first connection region, a second connection region, and a cell array region disposed between the first and second connection regions. The memory device further includes an electrode structure including a plurality of electrodes vertically stacked on the substrate, wherein each of the electrodes has a pad exposed on the first connection region, and a dummy electrode structure disposed adjacent to the electrode structure and including a plurality of dummy electrodes vertically stacked on the substrate. Each dummy electrode has a dummy pad exposed on the second connection region. The electrode structure includes a first stair structure and a second stair structure which each includes the pads of the electrodes exposed on the first connection region. The first stair structure extends along a first direction, and the second stair structure extends along a second direction that crosses the first direction.
    Type: Application
    Filed: October 5, 2017
    Publication date: June 21, 2018
    Inventors: KWANG-SOO KIM, Heonkyu Lee
  • Publication number: 20180164227
    Abstract: Disclosed is a substrate inspection system. The substrate inspection system comprises a substrate inspection apparatus that inspects a substrate by irradiating light thereto. The substrate inspection apparatus comprises a light source to irradiate light onto the substrate, a detector to receive light from the substrate, and a controller to control an inspection mode of the substrate inspection apparatus by controlling the light source and the detector. The inspection mode comprises a first inspection mode to inspect whether a particle is present on the substrate and a second inspection mode to inspect a thickness of the substrate.
    Type: Application
    Filed: November 1, 2017
    Publication date: June 14, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Taejoong KIM, Kwang Soo KIM, lwa YOICHIRO, Byeonghwan JEON, Yougduk KIM, Wansung PARK, Tae-Heung AHN, Jaechol JOO
  • Publication number: 20180166462
    Abstract: Disclosed is a semiconductor memory device may include a substrate including a cell array region and a contact region and a stacking structure including a plurality of insulating layers and a plurality of gate electrodes alternately stacked on the substrate. The stacking structure may include a stepwise structure in the contact region. Ones of the plurality of gate electrodes may include a respective pad unit that comprises a step of the stepwise structure. At least one of the pad units may include a base pad and a protrusion pad on the base pad. The protrusion pad may be between and spaced apart from two edges of a surface of the base pad that are perpendicular to an extension direction of the respective gate electrode.
    Type: Application
    Filed: July 18, 2017
    Publication date: June 14, 2018
    Inventors: Kwang-Soo Kim, Se Mee Jang
  • Publication number: 20180144998
    Abstract: Disclosed are an inspection apparatus and a method of manufacturing a semiconductor device using the same. The inspection apparatus includes a stage configured to receive a substrate, an objective lens on the stage and configured to enlarge the substrate optically, an ocular lens on the objective lens and configured to form at its image plane an image of the substrate, and a plurality of sensors above the ocular lens and in the image plane of the ocular lens.
    Type: Application
    Filed: June 19, 2017
    Publication date: May 24, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-Won PARK, Jeong-Su HA, Sangbong PARK, Kwang Soo KIM, Byeong Kyu CHA
  • Publication number: 20180138049
    Abstract: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon nitride surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon nitride. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon nitride from the semiconductor substrate.
    Type: Application
    Filed: November 14, 2016
    Publication date: May 17, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Jungmin Ko, Tom Choi, Nitin Ingle, Kwang-Soo Kim, Theodore Wou
  • Patent number: 9970647
    Abstract: A lighting module may be provided that includes: a bottom plate having thermally a heat radiating characteristic; a light emitter comprising a substrate disposed on the bottom plate and a plurality of light emitting devices disposed on the substrate; an optical structure covering the light emitter, the optical structure comprising an outer frame surrounding the substrate and a plurality of lenses corresponding to the plurality of the light emitting devices; an upper case covering the optical structure and coupled to the bottom plate and having an opening for allowing lights which have passed through the plurality of lenses of the optical structure; and a gasket disposed between the outer frame of the optical structure and the upper case.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: May 15, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Kwang Soo Kim, Young Ho Shin, Ki Man Park, Bu Kwan Je, Sang Hoon Park, Ye Seul Yang
  • Publication number: 20180102316
    Abstract: An integrated circuit (IC) device includes: a channel region that extends on the substrate to penetrate a plurality of word lines; a bit line contact pad that contacts an upper surface of the channel region; a bit line that contacts the bit line contact pad and extends on the bit line contact pad in a direction parallel to the main surface of the substrate; a common source line that partially fills a word line cut region and has a height lower than that of the channel region; and a common source via contact that contacts an upper surface of the common source line in the word line cut region.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 12, 2018
    Inventor: KWANG-SOO KIM
  • Publication number: 20180088865
    Abstract: A memory card includes first and second groups of terminals, at least one controller, and first and second nonvolatile memories. The first group of terminals are adjacent to an edge at an insertion side of a substrate and include a first power terminal to provide a first voltage. The second group of terminals is spaced farther apart from the edge at the insertion side than the first group of terminals and includes a second power terminal to provide a second voltage. The at least one memory controller is connected to the first and second groups of terminals, and the first and second nonvolatile memories are independently connected to the at least one controller. The at least one controller simultaneously accesses the first nonvolatile memory and the second nonvolatile memory when the first group of terminals and the second group of terminals are connected to an external host.
    Type: Application
    Filed: July 18, 2017
    Publication date: March 29, 2018
    Inventors: In-Jae LEE, Kwang-Soo KIM, Hyong-Woo YU
  • Patent number: 9915623
    Abstract: An optical inspection apparatus includes an inspection target unit on which an inspection target is loaded, an illumination optical unit configured to irradiate incident light to the inspection target, an objective lens unit disposed between the illumination optical unit and the inspection target unit, a detection optical unit configured to receive reflective light reflected from the inspection target to thereby detect a presence or absence of a defect on the inspection target, and a control unit configured to control the illumination optical unit and the detection optical unit. The illumination optical unit includes a light source part configured to irradiate the incident light, and a spatial filter array configured to modify a transmission region of the incident light irradiated from the light source part. The spatial filter array includes a spatial filter part, and a filter movement part configured to move the spatial filter part.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang Soo Kim, Taejoong Kim, Byeonghwan Jeon, Yongsuk Choi, Youngduk Kim, Taeseok Oh, SangYun Lee, Yong-Ho Choi
  • Patent number: 9903705
    Abstract: An automatic focus control apparatus includes a light detector, which receives light reflected by a surface of a wafer and generates a light reception signal based on the received signal, a controller, which generates a driving signal, the driving signal being one of a first signal and a second signal, the driving signal indicating whether to perform automatic focus control based on the light reception signal, a focus error corrector, which generates a focus error correction signal based on the driving signal, and a stage driver, which displaces a wafer stage supporting the wafer by adjusting the z-axis position of the wafer stage based on the focus error correcting signal if the driving signal is the first signal, and maintains the z-axis position of the wafer stage based on the focus error correction signal if the driving signal is the second signal.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: February 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-soo Kim, Harutaka Sekiya, Kwang-jun Yoon, Sung-won Park, Young-duk Kim, Heon-ju Shin, Byeong-hwan Jeon
  • Patent number: 9904426
    Abstract: Provided is a touch chip including a touch input detector and a compensator, wherein an input terminal of the touch input detector and an output terminal of the compensator are together connected to a touch input sensing electrode, and a direction change of a first current flowing through the input terminal of the touch input detector and a direction change of a second current flowing through the output terminal of the compensator are performed through synchronization.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: February 27, 2018
    Assignee: ZINITIX CO., LTD.
    Inventors: Bok-Man Kim, Byeong Checl So, Seon Woong Jang, Kwang Soo Kim
  • Patent number: 9897552
    Abstract: An optical transformation module includes a light generator generating a parallel light beam to be incident onto a surface of an inspection object and changing a wavelength of the parallel light beam, and a rotating grating positioned on a path of the parallel light beam and rotatable by a predetermined rotation angle such that the parallel light beam is transformed according to the wavelength of the parallel light beam and the rotation angle of the rotating grating to have a desired incidence angle and a desired incidence position onto the surface of the inspection object.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: February 20, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-Joong Kim, Yong-Deok Jeong, Kwang-Soo Kim, Byeong-Hwan Jeon, Yu-Sin Yang, Sang-Kil Lee, Chung-Sam Jun
  • Patent number: 9859207
    Abstract: An integrated circuit (IC) device includes: a channel region that extends on the substrate to penetrate a plurality of word lines; a bit line contact pad that contacts an upper surface of the channel region; a bit line that contacts the bit line contact pad and extends on the bit line contact pad in a direction parallel to the main surface of the substrate; a common source line that partially fills a word line cut region and has a height lower than that of the channel region; and a common source via contact that contacts an upper surface of the common source line in the word line cut region.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: January 2, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kwang-Soo Kim
  • Publication number: 20170373089
    Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.
    Type: Application
    Filed: December 29, 2016
    Publication date: December 28, 2017
    Inventors: Kwang Soo KIM, Shin Hwan KANG, Jae Hoon JANG, Kohji KANAMORI
  • Patent number: 9853049
    Abstract: A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of channel areas passing through the gate structure and extending in a direction perpendicular to the upper surface of the substrate, a source area disposed on the substrate to extend in a first direction and including impurities, and a common source line extending in the direction perpendicular to the upper surface of the substrate to be connected to the source area, and including a plurality of layers containing different materials.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: December 26, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang Soo Kim, Jae Hoon Jang, Byoung Keun Son
  • Publication number: 20170365616
    Abstract: A vertical non-volatile memory device includes a substrate including a cell region; a lower insulating layer on the substrate; a lower wiring pattern in the cell region having a predetermined pattern and connected to the substrate through the lower insulating layer; and a plurality of vertical channel layers extending in a vertical direction with respect to a top surface of the substrate in the cell region, spaced apart from one another in a horizontal direction with respect to the top surface of the substrate, and electrically connected to the lower wiring pattern. The memory device also includes a plurality of gate electrodes stacked alternately with interlayer insulating layers in the cell region in the vertical direction along a side wall of a vertical channel layer and formed to extend in a first direction along the horizontal direction.
    Type: Application
    Filed: April 12, 2017
    Publication date: December 21, 2017
    Inventors: Shin-hwan KANG, Heon-kyu LEE, Kohji KANAMORI, Jae-duk LEE, Jae-hoon JANG, Kwang-soo KIM
  • Publication number: 20170309635
    Abstract: A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of channel areas passing through the gate structure and extending in a direction perpendicular to the upper surface of the substrate, a source area disposed on the substrate to extend in a first direction and including impurities, and a common source line extending in the direction perpendicular to the upper surface of the substrate to be connected to the source area, and including a plurality of layers containing different materials.
    Type: Application
    Filed: August 19, 2016
    Publication date: October 26, 2017
    Inventors: Kwang Soo Kim, Jae Hoon JANG, Byoung Keun SON
  • Patent number: 9798697
    Abstract: A high energy efficiency sensor node and an operating method thereof are provided. The high energy efficiency sensor node may include a sensing unit to generate sensed information and to store the sensed information in a database when a set period commences, and a control unit to obtain n pieces of sensed information corresponding to n periods from the database, and to transmit the n pieces of sensed information obtained to a first neighbor node when the n periods elapse.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: October 24, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae-Wook Heo, Kwang Soo Kim, Hyunhak Kim, Jong-Arm Jun