Patents by Inventor Kyu-in Han

Kyu-in Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240025770
    Abstract: A light emitting module including a light source configured to irradiate ultraviolet light, a board on which the light source is disposed, a tube accommodating the board and including a transparent region to transmit the ultraviolet light emitted from the light source, a first base coupled to one side of the tube, a second base coupled to the other side of the tube, a fixation groove disposed in the tube and connected to at least one of the first and second bases, in which the board is coupled to be inserted into the fixation groove, and the fixation groove is spaced apart from a center of the first base when viewed in a cross-section perpendicular to a length direction of the tube.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 25, 2024
    Inventors: Jae Young Choi, Woong Ki Jeong, Kyu Won Han, Yeo Jin Yoon
  • Patent number: 11881430
    Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: January 23, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Jin Kang, Jong Min Baek, Woo Kyung You, Kyu-Hee Han, Han Seong Kim, Jang Ho Lee, Sang Shin Jang
  • Patent number: 11862146
    Abstract: Audio signals of speech may be processed using an acoustic model. An acoustic model may be implemented with multiple streams of processing where different streams perform processing using different dilation rates. For example, a first stream may process features of the audio signal with one or more convolutional neural network layers having a first dilation rate, and a second stream may process features of the audio signal with one or more convolutional neural network layers having a second dilation rate. Each stream may compute a stream vector, and the stream vectors may be combined to a vector of speech unit scores, where the vector of speech unit scores provides information about the acoustic content of the audio signal. The vector of speech unit scores may be used for any appropriate application of speech, such as automatic speech recognition.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: January 2, 2024
    Assignee: ASAPP, INC.
    Inventors: Kyu Jeong Han, Tao Ma, Daniel Povey
  • Patent number: 11855355
    Abstract: An antenna apparatus includes a patch antenna pattern; a first feed via to feed power to the patch antenna pattern in a non-contact manner on a first side of the patch antenna pattern; and a plurality of feed patterns disposed on the first side of the patch antenna pattern on different levels and overlapping each other, and including at least one feed pattern that is electrically connected to the first feed via, and each having a width greater than a width of the first feed via and a cross-sectional area smaller than a cross-sectional area of the patch antenna pattern.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: December 26, 2023
    Assignees: Samsung Electro-Mechanics Co., Ltd., Seoul National University R&DB Foundation
    Inventors: Ju Hyoung Park, Jung Woo Seo, Jung Suek Oh, Jeong Ki Ryoo, Kyu Bum Han
  • Publication number: 20230411498
    Abstract: A method for fabricating semiconductor device may include forming a source/drain pattern on a fin-type pattern, forming an etch stop film and an interlayer insulating film on the source/drain pattern, forming a contact hole in the interlayer insulating film, forming a sacrificial liner along a sidewall and a bottom surface of the contact hole, performing an ion implantation process while the sacrificial liner is present, removing the sacrificial liner and forming a contact liner along the sidewall of the contact hole, and forming a source/drain contact on the contact liner. The ion implantation process may include implant impurities into the source/drain pattern. The source/drain contact may be connected to the source/drain pattern.
    Type: Application
    Filed: February 28, 2023
    Publication date: December 21, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Hee HAN, Bong Kwan BAEK, Sang Shin JANG, Koung Min RYU, Jong Min BAEK, Jung Hoo SHIN, Jun Hyuk LIM, Jung Hwan CHUN
  • Publication number: 20230408678
    Abstract: A method includes scanning for registered fine-time measurement (FTM)-enabled Wi-Fi nodes to generate a list of the FTM-enabled Wi-Fi nodes. The method also includes performing a ranging operation by (i) selecting nodes to range with from the list of the FTM-enabled Wi-Fi nodes and (ii) processing ranging responses from the selected nodes to generate distance measurements. The method further includes estimating a position of a device based on the distance measurements generated from the ranging operation.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 21, 2023
    Inventors: Rebal Al Jurdi, Hao Chen, Boon Loong Ng, Kyu-Hui Han, Jianzhong Zhang
  • Patent number: 11845276
    Abstract: Disclosed is an inkjet head and a method of ejecting an ink using the same. An inkjet head according to one embodiment of the present invention may include nozzles each including a ejecting hole through which a solution including a light-emitting element is ejected and pairs of electrodes which are provided around the ejecting holes to face each other and which apply an electrode voltage to the light-emitting element.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: December 19, 2023
    Assignee: STI CO., LTD.
    Inventors: Kyu Yong Han, Myeong Jin Kim
  • Publication number: 20230397682
    Abstract: A method of manufacturing an eyelash extension system having the steps: providing a set of eyelash extensions onto a stage, wherein the eyelash extension system has eyelash filaments extending from a laterally facing surface of an eyelash support strip; and; pushing an adhesive element out of a tape assembly and onto a medially facing surface of an eyelash support strip using a pushing plate. An eyelash extension system having an eyelash support strip having a laterally facing surface and a medially facing surface; and an adhesive element fixed to the medially facing surface.
    Type: Application
    Filed: September 28, 2021
    Publication date: December 14, 2023
    Inventors: Kyu Sang Han, Kichul Ahn
  • Publication number: 20230390875
    Abstract: The present invention relates to an apparatus for preventing welding distortion and a method for welding a pipe and a flange using same, the apparatus being capable of effectively reducing welding distortion of a flange, which occurs during welding with a pipe and improving economic efficiency and productivity. The apparatus for preventing the welding distortion comprises: at least one counterweight which is arranged to be in contact with one side of a flange that is to be welded to a pipe, and has a hollow portion therein; and a fastening tool which fixes the counterweight to the flange, wherein the hollow portion of the counterweight may accommodate a refrigerant.
    Type: Application
    Filed: October 28, 2021
    Publication date: December 7, 2023
    Applicant: POSCO Co., Ltd
    Inventors: Jae-Yik Lee, Kyu-Tae Han
  • Publication number: 20230390437
    Abstract: A lighting device including at least one first light source configured to emit a visible light through a first light emitting surface, at least one second light source spaced apart from the first light source and configured to emit light having a wavelength for sterilization through a second light emitting surface, and a housing having a bottom portion, on which the first and second light sources are disposed. The housing can include at least one sidewall portion connected to the bottom portion to enclose the first light source and the second light source in one common area, in which the first and second light emitting surfaces face substantially the same direction, and both the first light emitting surface and the second light emitting surface can be disposed at a different elevation from the bottom portion of the housing.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 7, 2023
    Inventors: Jae Young CHOI, Kyu Won HAN, Seong Tae JANG, Sang Wook JUNG, Woong Ki JEONG
  • Publication number: 20230395667
    Abstract: Provided is a semiconductor device including an active pattern extended in a first direction, a plurality of gate structures including a gate electrode and a gate spacer disposed to be spaced apart from each other in the first direction on the active pattern and extended in a second direction, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner structure extended along a sidewall of the source/drain contact, being in contact with the sidewall of the source/drain contact. The contact liner structure includes a first contact liner and a second contact liner on the first contact liner. The first contact liner includes a first bottom portion, and a first vertical portion protruded from the first bottom portion and extended in a third direction. A lower surface of the contact liner structure is higher than an upper surface of the source/drain pattern.
    Type: Application
    Filed: March 6, 2023
    Publication date: December 7, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu-Hee HAN, Bong Kwan Baek, Jung Hwan Chun, Koung Min RYN, Jong Min Baek, Jung Hoo Shin, Jun Hyuk Lim, Sang Shin Jang
  • Patent number: 11837618
    Abstract: An image sensor includes a semiconductor substrate having a plurality of pixel regions arranged in a first direction and a second direction that are parallel to an upper surface of the semiconductor substrate. The first direction is perpendicular to the second direction. A grid structure extends in the first direction and the second direction on the semiconductor substrate to define openings corresponding to a plurality of sub-pixel regions of the plurality of the pixel regions, respectively. Color filters are disposed in the openings of the grid structure, respectively. A protective layer covers sidewalls of the grid structure and bottom surfaces of the color filters. The protective layer includes silicon oxide including carbon (C) or nitrogen (N).
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: December 5, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jaesung Hur, Taeksoo Jeon, Jongmin Baek, Sanghoon Ahn, Jangho Lee, Kyu-Hee Han
  • Patent number: 11839127
    Abstract: Disclosed is a light emitting display device which prevents pixel shrinkage and improves reliability by changing the structure of a bank and the inner structures of light emitting devices outside an active area of the light emitting display device.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: December 5, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kyu Il Han, Mi So Kim, Hwa Yong Shin, Ji Hyung Lee
  • Publication number: 20230378068
    Abstract: A semiconductor device may include PMOSFET and NMOSFET regions spaced apart from each other on a substrate, first and second active patterns provided on the PMOSFET and NMOSFET regions, respectively, a first channel pattern on the first active pattern, a source/drain pattern electrically connected to the first channel pattern, an active contact electrically connected to the source/drain pattern, the active contact including a first conductive pattern and a first barrier pattern enclosing a portion of a side surface and a bottom surface of the first conductive pattern, a gate electrode extending in a direction crossing the first channel pattern, a gate contact electrically connected to the gate electrode, an air gap provided on the first barrier pattern and between the gate contact and the first conductive pattern, and a lower via provided on the active contact. The lower via may be adjacent to the air gap.
    Type: Application
    Filed: January 19, 2023
    Publication date: November 23, 2023
    Inventors: JUNGHOO SHIN, SANGHYUN LEE, KOUNGMIN RYU, JONGMIN BAEK, KYUNGYUB JEON, KYU-HEE HAN
  • Patent number: 11823952
    Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woojin Lee, Hoon Seok Seo, Sanghoon Ahn, Kyu-Hee Han
  • Patent number: 11814723
    Abstract: A stabilized elementary metal structure is disclosed. The stabilized elementary metal structure may include an elementary metal having at least one layer and having a two-dimensional layer structure, and an organic molecular layer provided on at least one of a top surface and a bottom surface of the elementary metal.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: November 14, 2023
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Hong Bum Kim, Jin Won Jung, Kyu Seok Han
  • Publication number: 20230363091
    Abstract: A connection member includes a first region, a second region, and a third region, where a number of conductive layers in the second region is greater than a number of conductive layers in the first region and is greater than a number of conductive layers in the third region, a first layer, which is an uppermost layer of the second region, extends to the third region, a second layer, which is a lowermost layer of the third region, extends to the second region, and a side portion of the second region at a boundary between the second region and the third region is covered by the first layer and the second layer.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Inventors: Kyu Min HAN, Seung Hwan CHEONG
  • Patent number: 11794461
    Abstract: Disclosed is a lamination system. A lamination system, which bonds a panel and a bonding target panel to from a panel assembly, according to one embodiment of the present invention may include a transfer which moves along a transfer shuttle and supports any one among the panel, the bonding target panel, and the panel assembly, a bonding chamber which is provided parallel to the transfer shuttle and bonds the panel and the bonding target panel, and a first robot which transfers any one among the panel, the bonding target panel, and the panel assembly between the transfer and the bonding chamber.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: October 24, 2023
    Assignee: STI CO., LTD.
    Inventors: Eun Su Jeon, Kyu Yong Han, Sang Pil Park, Jae Hwan Kim
  • Publication number: 20230323058
    Abstract: An optical multilayer structure including a hard coating layer, a low-reflective adhesion reinforcement layer, and a water repellent layer on a substrate layer. The optical multilayer structure includes a structure in which a hard coating layer, a low-reflective adhesion reinforcement layer including a siloxane-based compound, and a water repellent layer including an alkoxysilane-based compound containing a fluorine atom are laminated on a substrate layer, thereby having high wear resistance and water contact angle simultaneously.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 12, 2023
    Inventors: Kyu Seok HAN, Cheol Woo KIM, So Young LEE, Jeong Min CHOI, Sin Woo KIM
  • Publication number: 20230326964
    Abstract: Semiconductor devices with improved performance and reliability and methods for forming the same are provided. The semiconductor devices include an active pattern extending in a first direction, gate structures spaced apart from each other in the first direction on the active pattern, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner extending along a sidewall of the source/drain contacts. A carbon concentration of the contact liner at a first point of the contact liner is different from a carbon concentration of the contact liner at a second point of the contact liner, and the first point is at a first height from an upper surface of the active pattern, the second point is at a second height from the upper surface of the active pattern, and the first height is smaller than the second height.
    Type: Application
    Filed: November 18, 2022
    Publication date: October 12, 2023
    Inventors: Bong Kwan Baek, Jun Hyuk Lim, Jung Hwan Chun, Kyu-Hee Han, Jong Min Baek, Koung Min Ryu, Jung Hoo Shin, Sang Shin Jang