Patents by Inventor Li Wu

Li Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934066
    Abstract: A display device and a manufacturing method thereof, an electronic device, and a light control panel are provided. The display device includes a light control panel and a display liquid crystal panel. The display liquid crystal panel is on a light-emitting side of the light control panel; the light control panel includes a light control region, and the light control region is configured to provide adjusted backlight to the display liquid crystal panel; the display liquid crystal panel includes a display region, and the display region is configured to receive the adjusted backlight to perform display; and a distance between two opposite edges of the light control region in at least one direction is greater than a distance between two opposite edges of the display region in the at least one direction.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: March 19, 2024
    Assignees: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuntian Zhang, Zhou Rui, Peng Jiang, Haipeng Yang, Chunxu Zhang, Zhonghou Wu, Li Tian, Ke Dai
  • Patent number: 11937481
    Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate and a white OLED display unit on the base substrate, and further includes: an optical adjustment structure on a light emitting side of the white OLED display unit, where the optical adjustment structure is in a peripheral region of each pixel region. The optical adjustment structure is configured to absorb light in a first wavelength range or convert light in a first wavelength range into light in a second wavelength range.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: March 19, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guang Yan, Changyen Wu, Linlin Wang, Yongqi Shen, Juanjuan You, Li Sun
  • Publication number: 20240083742
    Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li YANG, Kai-Di WU, Ming-Da CHENG, Wen-Hsiung LU, Cheng Jen LIN, Chin Wei KANG
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240087057
    Abstract: A power consumption monitoring device includes a sensor, a storage, and a processor. The sensor is configured to detect a power-consuming device quantity and a power consumption amount. The storage is configured to store the power-consuming device quantity and the power consumption amount. The processor is communicatively connected to the sensor and the storage. The processor is configured to calculate a power-consuming device idling indicator based on the power-consuming device quantity and the power consumption amount in a monitoring time interval, wherein the power-consuming device idling indicator is used for indicating a deviation status of the power-consuming device quantity and the power consumption amount. The processor is further configured to determine whether the power-consuming device idling indicator exceeds a warning threshold. In response to the power-consuming device idling indicator exceeding the warning threshold, the processor is further configured to generate a warning message.
    Type: Application
    Filed: December 20, 2022
    Publication date: March 14, 2024
    Inventors: Wei-Chao CHEN, Ming-Chi CHANG, Chih-Pin WEI, Ke-Li WU, Hua-Hsiu CHIANG, Yu-Lun CHANG
  • Patent number: 11928311
    Abstract: The present application discloses a communication method, a terminal, a server, a communication system, a computer device and a medium. The communication method includes that a server establishes a connection and feeds back a display control in response to requests of a first terminal and a second terminal; then, the server feeds back function feedback information in response to a function request of the first terminal, and feeds back function feedback information in response to a menu request of the second terminal; and the servers presents multiple interface components and maintains and updates each interface component in response to management operation of a third user.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: March 12, 2024
    Assignees: Beijing Zhongxiangying Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Ming Ding, Li Ma, Yang Wu, Wanwan Tang, Dachuan Wang, Hong Wang, Guangyu Shao, Chaozheng Liu
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11927664
    Abstract: In one example, a radar circuit uses computer processing circuitry for processing data corresponding to reflection signals via a sparse array. Output data indicative of signal magnitude associated with the reflection signals is generated, and then angle-of-arrival information is discerned therefrom by (e.g., iteratively): correlating the output data with at least one spatial frequency support vector indicative of a correlation peak for the output data; generating upper-side and lower-side support vectors which are neighbors along the spatial frequency spectrum for said at least one spatial frequency support vector, and providing, via a correlation of the upper-side and lower-side support vectors and said at least one spatial frequency support vector, at least one new vector that is more refined along the spatial frequency spectrum for said at least one spatial frequency support vector.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 12, 2024
    Assignee: NXP B.V.
    Inventors: Ryan Haoyun Wu, Jun Li, Maik Brett, Michael Andreas Staudenmaier
  • Patent number: 11929716
    Abstract: The disclosure provides a Sense Amplifier (SA), a memory and a method for controlling the SA, and relates to the technical field of semiconductor memories. The SA includes: an amplifier module; an offset voltage storage unit electrically connected to the amplifier module and configured to store an offset voltage of the amplifier module in an offset elimination stage of the SA; and a load compensation unit electrically connected to the amplifier module and configured to compensate a difference between loads of the amplifier module in an amplification stage of the SA. The disclosure may improve an accuracy of reading data of the SA.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: March 12, 2024
    Assignees: ANHUI UNIVERSITY, CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Xiulong Wu, Li Zhao, Yangkuo Zhao, Jun He, Xin Li, Zhan Ying, Kanyu Cao, Wenjuan Lu, Chunyu Peng, Zhiting Lin, Junning Chen
  • Publication number: 20240078646
    Abstract: An image processing method includes: acquiring an input image of a teaching scenario; performing detection on the input image to determine a rectangular detection area that includes a blackboard-writing area; analyzing the rectangular detection area to determine a target area corresponding to the blackboard-writing area; determining four vertices of the target area; and according to the four vertices of the target area, performing coordinate transformation on the target area to obtain a corrected blackboard-writing area image.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 7, 2024
    Applicant: NEW ORIENTAL EDUCATION & TECHNOLOGY GROUP INC.
    Inventors: Haichun YUE, Jun ZHANG, Yongliang LAN, Bochuan WU, Li LI
  • Publication number: 20240078979
    Abstract: An electronic device including a display device is provided. The display device includes a sharing area, a junction area, and a privacy area. The junction area is positioned between the sharing area and the privacy area. The display device includes a privacy panel. A transmittance of the privacy panel corresponding to the sharing area is greater than a transmittance of the privacy panel corresponding to the junction area, and the transmittance of the privacy panel corresponding to the junction area is greater than a transmittance of the privacy panel corresponding to the privacy area.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 7, 2024
    Applicants: Innolux Corporation, CARUX TECHNOLOGY PTE. LTD.
    Inventors: Li-Wei Sung, Chia-Hsien Lin, Cheng-Wu Lin, Yu-Ming Wu
  • Publication number: 20240078976
    Abstract: Disclosed is a pixel circuit arranged in a display substrate, which comprises a first driving mode and a second driving mode. Content displayed in the display substrate comprises multiple display frames. In the first driving mode and the second driving mode, the display frames comprise refresh frames. A signal of a second scanning line is the same as that of a third scanning line. The time of which the signal of the second scanning line is an active level signal comprises a first refresh time period, a second refresh time period and a third refresh time period, which sequentially occur at intervals. During the second refresh time period, a signal of a first scanning line is an inactive level signal. The voltage of a signal at a reset voltage end is a positive voltage, and the voltage of a signal at a first initial voltage end is a negative voltage.
    Type: Application
    Filed: July 29, 2022
    Publication date: March 7, 2024
    Inventors: Tianyi CHENG, Haigang QING, Hongda CUI, Sifei AI, Guowei ZHAO, Yang YU, Li WANG, Baoyun WU
  • Patent number: 11923199
    Abstract: Aspects of the disclosure provide a method. The method includes forming a structure over a substrate, and forming a spacer layer on the structure, wherein the spacer layer has a recess. The method includes forming a mask layer over the spacer layer and in the recess, the mask layer including a first layer, a second layer and a third layer. The method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer to form an opening to expose the recess of the spacer layer, wherein the opening in the second layer has a first width; and. The method includes removing the second layer using a wet etchant, wherein the opening in the third layer has a second width, and the second with is greater than the first width.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20240073681
    Abstract: This application provides security activation methods and communication apparatuses. In an example method, a first access network device in a first communication standard requests a second access network device in a second communication standard to allocate a resource for dual connectivity of a terminal device, and sends, to the second access network device, a user plane security policy. The first access network device further receives identification information of a bearer and a security activation status from the second access network device and sends the identification information of the bearer and the security activation status to the terminal device.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Li HU, He LI, Rong WU
  • Publication number: 20240071958
    Abstract: A chip package and method for fabricating the same are provided that includes embedded off-die inductors coupled in series. One of the off-die inductors is disposed in a redistribution layer formed on a bottom surface of an integrated circuit (IC) die. The other of the series connected off-die inductors is disposed in a substrate of the chip package. The substrate may be either an interposer or a package substrate.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Hong SHI, Li-Sheng WENG, Frank Peter LAMBRECHT, Jing JING, Shuxian WU
  • Patent number: 11916067
    Abstract: The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: February 27, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Higgins, Henry Litzmann Edwards, Xiaoju Wu, Shariq Arshad, Li Wang, Jonathan Philip Davis, Tathagata Chatterjee
  • Patent number: 11915359
    Abstract: Systems, apparatuses, and methods for implementing kernel software driven color remapping of rendered primary surfaces are disclosed. A system includes at least a general processor, a graphics processor, and a memory. The general processor executes a user-mode application, a user-mode driver, and a kernel-mode driver. A primary surface is rendered on the graphics processor on behalf of the user-mode application. The primary surface is stored in memory locations allocated for the primary surface by the user-mode driver and the kernel-mode driver is notified when the primary surface is ready to be displayed. Rather than displaying the primary surface, the kernel-mode driver causes the pixels of the primary surface to be remapped on the graphics processor using a selected lookup table (LUT) so as to generate a remapped surface which stored in memory locations allocated for the remapped surface by the user-mode driver. Then, the remapped surface is displayed.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 27, 2024
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Jason Wen-Tse Wu, Parimalkumar Patel, Jia Hui Li, Chao Zhan
  • Patent number: 11914433
    Abstract: A hinge and a mobile terminal to resolve poor use effect of a foldable electronic device. The hinge includes a main body, and a first folding assembly and a second folding assembly that are symmetrically disposed along the main body. When the first folding assembly and the second folding assembly are rotated toward each other, a length of the hinge can be extended, and an accommodation space for accommodating the flexible display can be formed. When the first folding assembly and the second folding assembly are rotated away from each other, the length of the hinge can be reduced, and a support surface for supporting the flexible display can be formed, so that the flexible display cannot be stretched, compressed, or the like during folding and unfolding, thereby improving the use effect and safety of the mobile terminal.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 27, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Changliang Liao, Weifeng Wu, Li Liao, Kenji Nagai, Ding Zhong, Qiao Deng
  • Patent number: 11867595
    Abstract: This disclosure relates to an apparatus and methods for applying X-ray reflectometry (XRR) in characterizing three dimensional nanostructures supported on a flat substrate with a miniscule sampling area and a thickness in nanometers. In particular, this disclosure is targeted for addressing the difficulties encountered when XRR is applied to samples with intricate nanostructures along all three directions, e.g. arrays of nanostructured poles or shafts. Convergent X-ray with long wavelength, greater than that from a copper anode of 0.154 nm and less than twice of the characteristic dimensions along the film thickness direction, is preferably used with appropriate collimations on both incident and detection arms to enable the XRR for measurements of samples with limited sample area and scattering volumes. In one embodiment, the incident angle of the long-wavelength focused X-ray is ?24°, and the sample area is ?25 ?m×25 ?m.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: January 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Ting Liu, Wen-Li Wu, Bo-Ching He, Guo-Dung Chen, Sheng-Hsun Wu, Wei-En Fu
  • Publication number: 20230420331
    Abstract: A semiconductor package including one or more heat dissipation systems and a method of forming are provided. The semiconductor package may include one or more integrated circuit dies, an encapsulant surrounding the one or more integrated circuit dies, a redistribution structure over the one or more integrated circuit dies and the encapsulant. The redistribution structure may include one or more heat dissipation systems, which are electrically isolated from remaining portions of the redistribution structure. Each heat dissipation system may include a first metal pad, a second metal pad, and one or more metal vias connecting the first metal pad to the second metal pad.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Ban-Li Wu, Tsung-Hsien Chiang, Tzu-Sung Huang, Chao-Hsien Huang, Chia-Lun Chang, Hsiu-Jen Lin, Ming Hung Tseng, Hao-Yi Tsai