Abstract: An integrated circuit includes a first nanosheet transistor and a second nanosheet transistor on a substrate. The first and second nanosheet each include gate electrodes. A gate isolation structure extends from a backside of the substrate between the gate electrodes. The gate isolation structure physically and electrically isolates the first and second gate electrodes from each other.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.

Abstract: A circuit board assembly in a camera module for blocking unwanted light when images are captured includes a circuit board, a sensor, and an optical blocking body connecting the circuit board and the sensor. The circuit board includes a base board and a photomask. The photomask is arranged on a surface of the base board, the base board includes conductive circuit layers and dielectric layers, the conductive circuit layers and the dielectric layers are alternately arranged, the sensor being electronically connected to the conductive layers. The optical blocking body, the photomask, and the dielectric layers block ambient light entering the camera module other than through the lens assembly of the camera module.

Abstract: Apparatus and methods are provided for determining AR filter coefficient and numbers of synchronization. In one novel aspect, the AR filter coefficient and times of synchronization are determined based on the temperatures of the oscillator. In one embodiment, the UE determines a temperature drift rate by collecting sets of temperatures before and after the UE in the sleep mode of the CDRX, generates one or more threshold look-up tables and performs an optimization selection based on the temperature drift rate and the one or more threshold of look-up tables, wherein the optimization selection comprising selecting an alpha coefficient and a number of subframes for synchronization. In another embodiment, the optimization selection is further determined based on a subcarrier spacing, and a channel type of being a static channel type and a fading channel type. The UE further performs an on-the-fly oscillator S-curve calibration based on the set of temperatures.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor with a passivation layer for dark current reduction. A device layer overlies a substrate. Further, a cap layer overlies the device layer. The cap and device layers and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate may be silicon, whereas the device layer may be or comprise germanium. A photodetector is in the device and cap layers, and the passivation layer overlies the cap layer. The passivation layer comprises a high k dielectric material and induces formation of a dipole moment along a top surface of the cap layer.

Abstract: Systems and methods for sharing a resource pool in wireless sidelink communications are disclosed herein. In one embodiment, a method performed by a first node is disclosed. The method comprises: sensing on a resource pool shared by a group of nodes for sidelink communications; and transmitting a report related to the shared resource pool to a second node, wherein the second node is outside the group of nodes and schedules sidelink communication resources for at least one node of the group of nodes based on the report.

Abstract: A method and system or device such as a hearing aid are provided for processing audio signals. In accordance with the method, an audio signal is received and divided into a plurality of frequency sub-bands. For each of the frequency sub-band signals, the signal is further divided into overlapping temporal frames. Each of the temporal frames are windowed. Frequency warping is performed on each of the windowed frames. Overlap-and-add is performed on the frequency warped frames. The frequency warped sub-bands are combined into a full band to provide a frequency warped signal.

Abstract: An image display device is provided. The image display device includes a display unit and a backlight module. The display unit is used for displaying pictures in an image frame cycle. The backlight module includes a plurality of light sources of different colors. The image frame cycle is divided into a first interval, a second interval and a third interval in sequence, and the second interval is adjacent to the first interval. The backlight module provides a white light source with a first intensity in the first interval and provides a white light source with a second intensity in the second interval, and the second intensity is smaller than the first intensity. The backlight module is turned off in the third interval.

Abstract: The invention relates to a foldable greeting card having an outer side and an inner side and a number of electronic and electrical components, the card (1) being provided in a foldable manner, comprising a fold at one point which divides the card preferably into two parts (2, 3) of equal size, thus having two halves which can be folded congruently on top of one another, at least one part (2) being provided at least partially in two layers with an inner and an outer layer, and at least some of the electronic and electrical components comprising light and acoustic elements (5, 9) for generating light and sound effects, a switch (8) for activating the light and acoustic elements (5, 9), a circuit or microprocessor (7) for controlling the electrical components, and a power supply (10) being provided between the inner and outer layers of the card (1), and wherein the inner side of the two-layered part (2) comprises cut-outs (4) through which various light effects of the light elements (5) can shine through and whe

Abstract: The present invention relates to methods of preparing a thin layer comprising lithium. One or more interlayer materials are applied onto a substrate to form an interlayer material coated substrate. The interlayer material coated substrate is heated to an elevated temperature. One or more metal layers are applied onto the interlayer material coated substrate, wherein the metal layer comprises lithium.

Abstract: A device includes a first vertical stack of first nanostructures formed over a substrate, a second vertical stack of second nanostructures adjacent to the first vertical stack, and a first gate structure adjacent the first nanostructures. The first gate structure includes a first gate portion between the first nanostructures, and a second gate portion extending from a first sidewall of the first gate portion to a second sidewall of the first gate portion. The second sidewall is between the first sidewall and the substrate, and is a different material than the first gate portion. A second gate structure is adjacent the second nanostructures, and a second wall structure is between the second gate portion and the second gate structure.

Abstract: The present invention relates to materials and methods for components of lithium batteries, such as metal anodes having a protective coating.

Abstract: A pixel sensor may include a main deep trench isolation (DTI) structure and one or more sub-DTI structures in a substrate of the pixel sensor to increase the quantum efficiency of the pixel sensor at large incident angles. The one or more sub-DTI structures may be located within the perimeter of the main DTI structure and above a photodiode. The one or more sub-DTI structures may be configured to provide a path of travel for incident light into the photodiode from large incident angles in that the one or more sub-DTI structures may be filled with an oxide material to increase light penetration into the one or more sub-DTI structures. This may reduce reflections at a top surface of the substrate, thereby permitting incident light to refract into the substrate and toward the photodiode.

Abstract: Provided herein are a lappaconitine derivative of formula (I), and a preparation and application thereof.

Abstract: The application discloses a main-machine interaction method and system, a computer device, and a storage medium. The method includes: an interaction end collects user information including biological sample information and preprocesses and filters the user information, and sends the preprocessed information to a central server; the central server assigns a biological recognition task and distributes the biological recognition task to a computing server; the computing server extracts biological characteristics from the biological sample information according to the biological recognition task, and returns obtained extraction results to the central server; the central server combines the extraction results to get a processing result; the processing result is returned to the interaction end; the interaction end responds to the processing result to complete a man-machine interaction with the user.

Abstract: A method for forming a semiconductor device structure includes forming first, second, and third fin structures from a substrate, wherein the first fin structure includes a first plurality of semiconductor layers, the second fin structure includes a second plurality of semiconductor layers, and the third fin structure includes a third plurality of semiconductor layers, and wherein each of the first, second, and third plurality of semiconductor layers comprises first semiconductor layers and second semiconductor layers.

Abstract: A semiconductor device includes a first channel member over a first backside dielectric feature, a first gate structure engaging the first channel member, a second channel member over a second backside dielectric feature, a second gate structure engaging the second channel member, and a first isolation feature includes a first portion laterally between the first and second backside dielectric features and a second portion laterally between the first and second gate structures. The first isolation feature is in physical contact with the first and second gate structures.

Abstract: A key structure including a carrier, a keycap, a lifting member, and an elastic member is provided. The carrier includes a carrier body and multiple positioning hooks. The carrier body has multiple vias, and the positioning hooks are respectively disposed corresponding to the vias. Orthographic projection of each of the positioning hooks falls in the corresponding via. Each of the positioning hooks includes a first positioning portion and a second positioning portion respectively connected to two inner wall surfaces in the corresponding via. The keycap is disposed above the carrier body. The lifting member is disposed between the carrier body and the keycap. One end of the lifting member is connected to the keycap, and an other end of the lifting member is connected to the positioning hooks. The elastic member is disposed between the carrier body and the keycap.

Abstract: Systems, apparatus and methods are provided for performing program operations in a non-volatile storage system. In one embodiment, there is provided a method that may comprise categorizing active storage blocks of a non-volatile storage device into a robust group and a less-robust group based on a number of factors including page error count, program time and number of Program/Erase (P/E) cycles; determining that a cache program operation needs to be performed; selecting a first storage block from the robust group to perform the cache program operation; determining that a regular program operation needs to be performed; and selecting a second storage block from the less-robust group to perform the regular program operation.