Abstract: A Bluetooth earphone includes an earbud portion and an earphone handle portion. A receiver module is disposed in the earbud portion. The earphone handle portion includes a connecting section connected to the earbud portion, and a top section and a bottom section located on both sides of the connecting section, a battery is disposed in the bottom section of the earphone handle portion. The Bluetooth earphone includes an antenna and a flexible circuit board. The antenna extends from the connecting section of the earphone handle portion to the top section of the earphone handle portion. The flexible circuit board includes a feeding part and a first extension part connected to the feeding part. The feeding part is located in the connecting section of the earphone handle portion, and is coupled to the antenna. The first extension part extends to the earbud portion.

Abstract: The invention provides a semiconductor bonding structure, the semiconductor bonding structure includes a first chip and a second chip which are bonded with each other, the first chip has a first bonding pad and the second bonding pad contacted and electrically connected to each other on a bonding interface, the first bonding pad and the second bonding pad are made of copper, and a heterogeneous contact combination in the first chip, the heterogeneous contact combination comprises a contact stack structure of a copper element, a tungsten element and an aluminum element, the tungsten element is located between the copper element and the aluminum element.

Abstract: A current sense short protection circuit includes a switch unit, a current sensing unit, a detection circuit and a short detection module. The first terminal of the switch unit receives a first voltage. The control terminal of the switch unit receives a control signal. The first terminal of the current sensing unit is coupled to the second terminal of the switch unit. The second terminal of the current sensing unit receives a second voltage. The detection unit receives the second voltage and a third voltage provided by the first terminal of the current sensing unit, and generates a detection signal according to the second voltage and the third voltage. The short detection module receives the first voltage, the second voltage and the detection signal, and generates a short detection signal according to the first voltage, the second voltage and the detection signal.

Abstract: A package structure includes an insulating encapsulation, at least one semiconductor die, a redistribution circuit structure, and first reinforcement structures. The at least one semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure is located on the insulating encapsulation and electrically connected to the at least one semiconductor die. The first reinforcement structures are embedded in the redistribution circuit structure. A shape of the package structure includes a polygonal shape on a vertical projection along a stacking direction of the insulating encapsulation and the redistribution circuit structure, and the first reinforcement structures are located on and extended along diagonal lines of the package structure.

Abstract: A package structure includes an insulating encapsulation, at least one semiconductor die, a redistribution circuit structure, and first reinforcement structures. The at least one semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure is located on the insulating encapsulation and electrically connected to the at least one semiconductor die. The first reinforcement structures are embedded in the redistribution circuit structure. A shape of the package structure includes a polygonal shape on a vertical projection along a stacking direction of the insulating encapsulation and the redistribution circuit structure, and the first reinforcement structures are located on and extended along diagonal lines of the package structure.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, an apparatus may determine a time-averaged power limit of a set of antennas. The apparatus may modify an antenna switching configuration based at least in part on the time-averaged power limit. The apparatus may transmit a signal using an antenna, from the set of antennas, associated with the modified antenna switching configuration, wherein the antenna is associated with a higher power limit than one or more other antennas. Numerous other aspects are described.

Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.

Abstract: In one or more implementations, systems, methods and computer implemented processes are provided that are directed to a method of treating a subject with a lung tumor, the method comprising: obtaining computed tomography (CT) image slices of the subject, wherein the CT image slices comprise images of the lung tumor. In a further implementation, the systems, methods and computer implemented processes are directed to identifying a first CT image slice where the lung tumor has a largest diameter among the CT image slices; and determining intensity-skewness of the lung tumor on the first CT image slice. In a further implementation, the systems, methods and computer implemented processes are directed to treating the subject with surgery, chemotherapy and/or radiotherapy, if the intensity-skewness is no greater than -1.5.

Abstract: Certain aspects of the present disclosure provide techniques for exception-robust time-averaged radio frequency (RF) exposure compliance continuity. A method that may be performed by a user equipment (UE) generally includes transmitting a first signal at a first transmission power based on time-averaged RF exposure measurements over a time window and storing RF exposure information associated with the time window. The method may also include detecting that an exception event associated with the UE occurred and transmitting a second signal at a second transmission power based at least in part on the stored RF exposure information in response to the detection of the event.

Abstract: The invention, which relates to a liquid-carrying roller for wet etching and a wet etching method, belongs to the technical field of solar cell manufacturing, and solves the problem of abnormal roller levelness in a process of manufacturing a solar cell in the prior art. The liquid-carrying roller for wet etching of the invention comprises a first end shaft, a second end shaft, and a liquid-carrying shaft, the first end shaft and the second end shaft being located at both ends of the liquid-carrying shaft, respectively, the first end shaft, the second end shaft and the liquid-carrying shaft being arranged concentrically, and the diameters of the first end shaft and the second end shaft being both adjustable.

Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,

Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.

Abstract: In certain aspects, a method implemented in a wireless device includes determining a specific absorption rate (SAR) distribution for a first wireless communication technology, determining a power density (PD) distribution for a second wireless communication technology, and combining the SAR distribution and the PD distribution to generate a combined RF exposure distribution. The method also includes determining at least one first maximum allowable power level and at least one second maximum allowable power level for a future time slot based on the combined RF exposure distribution, setting at least one transmission power limit for a first transmitter in the future time slot based on the at least one first maximum allowable power level, and setting at least one transmission power limit for a second transmitter in the future time slot based on the at least one second maximum allowable power level.

Abstract: A light-emitting device includes a substrate including circuit pads and a resin portion. A frame disposed on the substrate to form a first space, first to third light sources, and first and second encapsulants. The frame includes an outer wall and a first partition in the first space to form the first space as independent second and third spaces. A first and second light sources are disposed at the second space and provide first and second light beams respectively. A third light source is disposed at the third space and provides a third light beam. A first encapsulant is filled at the second space to seal the first and second light sources. A second encapsulant is filled at the third space to seal the third light source. The second encapsulant includes a first wavelength conversion material converting the third light beam into a fourth light beam.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and form a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.

Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.

Abstract: A through-substrate via (TSV) test structure including a substrate, a first TSV, and a test device is provided. The substrate includes a test region. The first TSV is located in the substrate of the test region. The test device is located on the substrate of the test region. The test device and the first TSV are separated from each other. The shortest distance between the test device and the first TSV is less than 10 ?m.

Abstract: According to certain aspects a wireless device includes transmitters, and a processor coupled to the transmitters. The processor is configured to determine a radio frequency (RF) exposure value at a peak location based on transmission power levels for the transmitters, determine a contribution of each one of the transmitters to the RF exposure value at the peak location, and reduce the transmission power level for each one of one or more of the transmitters based on the contributions of the transmitters to the RF exposure value at the peak location.

Abstract: A circuit structure for testing through silicon vias (TSVs) in a 3D IC, including a TSV area with multiple TSVs formed therein, and a switch circuit with multiple column lines and row lines forming an addressable test array, wherein two ends of each TSV are connected respectively with a column line and a row line. The switch circuit applies test voltage signals through one of the row lines to the TSVs in the same row and receives current signals flowing through the TSVs in the row from the columns lines, or the switch circuit applies test voltage signals through one of the column lines to the TSVs in the same column and receives current signals flowing through the TSVs in the column from the row lines.

Abstract: An integrated fan-out package includes a first redistribution structure, a die, an insulation encapsulation, and at least one first through interlayer via. The first redistribution structure includes a dielectric layer, a feed line at least partially disposed on the dielectric layer and a signal enhancement layer covering the feed line, wherein the signal enhancement layer has a lower dissipation factor (Df) and/or a lower permittivity (Dk) than the dielectric layer. The die is disposed on the first redistribution structure. The insulation encapsulation encapsulates the die. The at least one first TIV is embedded in the insulation encapsulation and the signal enhancement layer.